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63 lines
2.2 KiB
C
63 lines
2.2 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* AMD SEV header common between the guest and the hypervisor.
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*
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* Author: Brijesh Singh <brijesh.singh@amd.com>
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*/
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#ifndef __ASM_X86_SEV_COMMON_H
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#define __ASM_X86_SEV_COMMON_H
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#define GHCB_MSR_INFO_POS 0
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#define GHCB_MSR_INFO_MASK (BIT_ULL(12) - 1)
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#define GHCB_MSR_SEV_INFO_RESP 0x001
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#define GHCB_MSR_SEV_INFO_REQ 0x002
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#define GHCB_MSR_VER_MAX_POS 48
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#define GHCB_MSR_VER_MAX_MASK 0xffff
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#define GHCB_MSR_VER_MIN_POS 32
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#define GHCB_MSR_VER_MIN_MASK 0xffff
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#define GHCB_MSR_CBIT_POS 24
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#define GHCB_MSR_CBIT_MASK 0xff
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#define GHCB_MSR_SEV_INFO(_max, _min, _cbit) \
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((((_max) & GHCB_MSR_VER_MAX_MASK) << GHCB_MSR_VER_MAX_POS) | \
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(((_min) & GHCB_MSR_VER_MIN_MASK) << GHCB_MSR_VER_MIN_POS) | \
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(((_cbit) & GHCB_MSR_CBIT_MASK) << GHCB_MSR_CBIT_POS) | \
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GHCB_MSR_SEV_INFO_RESP)
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#define GHCB_MSR_INFO(v) ((v) & 0xfffUL)
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#define GHCB_MSR_PROTO_MAX(v) (((v) >> GHCB_MSR_VER_MAX_POS) & GHCB_MSR_VER_MAX_MASK)
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#define GHCB_MSR_PROTO_MIN(v) (((v) >> GHCB_MSR_VER_MIN_POS) & GHCB_MSR_VER_MIN_MASK)
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#define GHCB_MSR_CPUID_REQ 0x004
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#define GHCB_MSR_CPUID_RESP 0x005
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#define GHCB_MSR_CPUID_FUNC_POS 32
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#define GHCB_MSR_CPUID_FUNC_MASK 0xffffffff
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#define GHCB_MSR_CPUID_VALUE_POS 32
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#define GHCB_MSR_CPUID_VALUE_MASK 0xffffffff
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#define GHCB_MSR_CPUID_REG_POS 30
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#define GHCB_MSR_CPUID_REG_MASK 0x3
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#define GHCB_CPUID_REQ_EAX 0
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#define GHCB_CPUID_REQ_EBX 1
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#define GHCB_CPUID_REQ_ECX 2
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#define GHCB_CPUID_REQ_EDX 3
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#define GHCB_CPUID_REQ(fn, reg) \
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(GHCB_MSR_CPUID_REQ | \
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(((unsigned long)reg & GHCB_MSR_CPUID_REG_MASK) << GHCB_MSR_CPUID_REG_POS) | \
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(((unsigned long)fn) << GHCB_MSR_CPUID_FUNC_POS))
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#define GHCB_MSR_TERM_REQ 0x100
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#define GHCB_MSR_TERM_REASON_SET_POS 12
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#define GHCB_MSR_TERM_REASON_SET_MASK 0xf
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#define GHCB_MSR_TERM_REASON_POS 16
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#define GHCB_MSR_TERM_REASON_MASK 0xff
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#define GHCB_SEV_TERM_REASON(reason_set, reason_val) \
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(((((u64)reason_set) & GHCB_MSR_TERM_REASON_SET_MASK) << GHCB_MSR_TERM_REASON_SET_POS) | \
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((((u64)reason_val) & GHCB_MSR_TERM_REASON_MASK) << GHCB_MSR_TERM_REASON_POS))
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#define GHCB_SEV_ES_REASON_GENERAL_REQUEST 0
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#define GHCB_SEV_ES_REASON_PROTOCOL_UNSUPPORTED 1
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#define GHCB_RESP_CODE(v) ((v) & GHCB_MSR_INFO_MASK)
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#endif
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