2022-04-02 18:08:56 +05:00
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# SPDX-License-Identifier: GPL-2.0
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menu "Host processor type and features"
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source "arch/x86/Kconfig.cpu"
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endmenu
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config UML_X86
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def_bool y
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2022-05-12 10:47:00 -07:00
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select ARCH_BINFMT_ELF_EXTRA_PHDRS if X86_32
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select DCACHE_WORD_ACCESS
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2022-04-02 18:08:56 +05:00
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config 64BIT
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bool "64-bit kernel" if "$(SUBARCH)" = "x86"
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default "$(SUBARCH)" != "i386"
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config X86_32
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def_bool !64BIT
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select ARCH_32BIT_OFF_T
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select ARCH_WANT_IPC_PARSE_VERSION
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select MODULES_USE_ELF_REL
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select CLONE_BACKWARDS
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select OLD_SIGSUSPEND3
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select OLD_SIGACTION
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config X86_64
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def_bool 64BIT
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select MODULES_USE_ELF_RELA
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config 3_LEVEL_PGTABLES
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bool "Three-level pagetables" if !64BIT
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default 64BIT
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help
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2022-09-13 23:14:27 +05:00
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Three-level pagetables will let UML have more than 4G of physical
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memory. All the memory that can't be mapped directly will be treated
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as high memory.
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2022-04-02 18:08:56 +05:00
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2022-09-13 23:14:27 +05:00
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However, this it experimental on 32-bit architectures, so if unsure say
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N (on x86-64 it's automatically enabled, instead, as it's safe there).
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2022-04-02 18:08:56 +05:00
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config ARCH_HAS_SC_SIGNALS
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def_bool !64BIT
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config ARCH_REUSE_HOST_VSYSCALL_AREA
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def_bool !64BIT
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config GENERIC_HWEIGHT
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def_bool y
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