"BriefDescription":"Cycles while L3 cache miss demand load is outstanding.",
"Counter":"0,1,2,3",
"CounterHTOff":"0,1,2,3,4,5,6,7",
"CounterMask":"2",
"EventCode":"0xA3",
"EventName":"CYCLE_ACTIVITY.CYCLES_L3_MISS",
"SampleAfterValue":"2000003",
"UMask":"0x2"
},
{
"BriefDescription":"Execution stalls while L3 cache miss demand load is outstanding.",
"Counter":"0,1,2,3",
"CounterHTOff":"0,1,2,3,4,5,6,7",
"CounterMask":"6",
"EventCode":"0xA3",
"EventName":"CYCLE_ACTIVITY.STALLS_L3_MISS",
"SampleAfterValue":"2000003",
"UMask":"0x6"
},
{
"BriefDescription":"Number of times an HLE execution aborted due to any reasons (multiple categories may count as one).",
"Counter":"0,1,2,3",
"CounterHTOff":"0,1,2,3,4,5,6,7",
"EventCode":"0xC8",
"EventName":"HLE_RETIRED.ABORTED",
"PEBS":"1",
"PublicDescription":"Number of times HLE abort was triggered.",
"SampleAfterValue":"2000003",
"UMask":"0x4"
},
{
"BriefDescription":"Number of times an HLE execution aborted due to unfriendly events (such as interrupts).",
"Counter":"0,1,2,3",
"CounterHTOff":"0,1,2,3,4,5,6,7",
"EventCode":"0xC8",
"EventName":"HLE_RETIRED.ABORTED_EVENTS",
"SampleAfterValue":"2000003",
"UMask":"0x80"
},
{
"BriefDescription":"Number of times an HLE execution aborted due to various memory events (e.g., read/write capacity and conflicts).",
"Counter":"0,1,2,3",
"CounterHTOff":"0,1,2,3,4,5,6,7",
"EventCode":"0xC8",
"EventName":"HLE_RETIRED.ABORTED_MEM",
"SampleAfterValue":"2000003",
"UMask":"0x8"
},
{
"BriefDescription":"Number of times an HLE execution aborted due to incompatible memory type",
"Counter":"0,1,2,3",
"CounterHTOff":"0,1,2,3,4,5,6,7",
"EventCode":"0xC8",
"EventName":"HLE_RETIRED.ABORTED_MEMTYPE",
"PublicDescription":"Number of times an HLE execution aborted due to incompatible memory type.",
"SampleAfterValue":"2000003",
"UMask":"0x40"
},
{
"BriefDescription":"Number of times an HLE execution aborted due to hardware timer expiration.",
"Counter":"0,1,2,3",
"CounterHTOff":"0,1,2,3,4,5,6,7",
"EventCode":"0xC8",
"EventName":"HLE_RETIRED.ABORTED_TIMER",
"SampleAfterValue":"2000003",
"UMask":"0x10"
},
{
"BriefDescription":"Number of times an HLE execution aborted due to HLE-unfriendly instructions and certain unfriendly events (such as AD assists etc.).",
"Counter":"0,1,2,3",
"CounterHTOff":"0,1,2,3,4,5,6,7",
"EventCode":"0xC8",
"EventName":"HLE_RETIRED.ABORTED_UNFRIENDLY",
"SampleAfterValue":"2000003",
"UMask":"0x20"
},
{
"BriefDescription":"Number of times an HLE execution successfully committed",
"Counter":"0,1,2,3",
"CounterHTOff":"0,1,2,3,4,5,6,7",
"EventCode":"0xC8",
"EventName":"HLE_RETIRED.COMMIT",
"PublicDescription":"Number of times HLE commit succeeded.",
"SampleAfterValue":"2000003",
"UMask":"0x2"
},
{
"BriefDescription":"Number of times an HLE execution started.",
"Counter":"0,1,2,3",
"CounterHTOff":"0,1,2,3,4,5,6,7",
"EventCode":"0xC8",
"EventName":"HLE_RETIRED.START",
"PublicDescription":"Number of times we entered an HLE region. Does not count nested transactions.",
"SampleAfterValue":"2000003",
"UMask":"0x1"
},
{
"BriefDescription":"Counts the number of machine clears due to memory order conflicts.",
"Counter":"0,1,2,3",
"CounterHTOff":"0,1,2,3,4,5,6,7",
"Errata":"SKL089",
"EventCode":"0xC3",
"EventName":"MACHINE_CLEARS.MEMORY_ORDERING",
"PublicDescription":"Counts the number of memory ordering Machine Clears detected. Memory Ordering Machine Clears can result from one of the following:a. memory disambiguation,b. external snoop, orc. cross SMT-HW-thread snoop (stores) hitting load buffer.",
"SampleAfterValue":"100003",
"UMask":"0x2"
},
{
"BriefDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles.",
"PublicDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 128 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue":"1009",
"TakenAlone":"1",
"UMask":"0x1"
},
{
"BriefDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles.",
"PublicDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 16 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue":"20011",
"TakenAlone":"1",
"UMask":"0x1"
},
{
"BriefDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles.",
"PublicDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 256 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue":"503",
"TakenAlone":"1",
"UMask":"0x1"
},
{
"BriefDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles.",
"PublicDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 32 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue":"100007",
"TakenAlone":"1",
"UMask":"0x1"
},
{
"BriefDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles.",
"PublicDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 4 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue":"100003",
"TakenAlone":"1",
"UMask":"0x1"
},
{
"BriefDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles.",
"PublicDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 512 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue":"101",
"TakenAlone":"1",
"UMask":"0x1"
},
{
"BriefDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles.",
"PublicDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 64 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue":"2003",
"TakenAlone":"1",
"UMask":"0x1"
},
{
"BriefDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles.",
"PublicDescription":"Counts randomly selected loads when the latency from first dispatch to completion is greater than 8 cycles. Reported latency may be longer than just the memory latency.",
"SampleAfterValue":"50021",
"TakenAlone":"1",
"UMask":"0x1"
},
{
"BriefDescription":"Demand Data Read requests who miss L3 cache",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"PublicDescription":"Offcore response can be programmed only with a specific pair of event select and counter MSR, and with specific event codes and predefine mask bit value in a dedicated MSR to specify attributes of the offcore transaction.",
"BriefDescription":"Counts the number of times a class of instructions that may cause a transactional abort was executed. Since this is the count of execution, it may not always cause a transactional abort.",
"BriefDescription":"Counts the number of times a class of instructions (e.g., vzeroupper) that may cause a transactional abort was executed inside a transactional region",
"BriefDescription":"Number of times an HLE transactional execution aborted due to XRELEASE lock not satisfying the address and value requirements in the elision buffer",
"BriefDescription":"Number of times a HLE transactional region aborted due to a non XRELEASE prefixed instruction writing to an elided lock in the elision buffer",
