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93 lines
2.7 KiB
Plaintext
93 lines
2.7 KiB
Plaintext
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# SPDX-License-Identifier: GPL-2.0-only
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if ARCH_IXP4XX
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menu "Intel IXP4xx Implementation Options"
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comment "IXP4xx Platforms"
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config MACH_IXP4XX_OF
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bool
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prompt "Device Tree IXP4xx boards"
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default y
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select ARM_APPENDED_DTB # Old Redboot bootloaders deployed
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select I2C
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select I2C_IOP3XX
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select PCI
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select USE_OF
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help
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Say 'Y' here to support Device Tree-based IXP4xx platforms.
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config MACH_GATEWAY7001
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bool "Gateway 7001"
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depends on IXP4XX_PCI_LEGACY
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help
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Say 'Y' here if you want your kernel to support Gateway's
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7001 Access Point. For more information on this platform,
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see http://openwrt.org
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config MACH_GORAMO_MLR
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bool "GORAMO Multi Link Router"
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depends on IXP4XX_PCI_LEGACY
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help
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Say 'Y' here if you want your kernel to support GORAMO
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MultiLink router.
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config ARCH_PRPMC1100
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bool "PrPMC1100"
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help
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Say 'Y' here if you want your kernel to support the Motorola
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PrPCM1100 Processor Mezanine Module. For more information on
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this platform, see <file:Documentation/arm/ixp4xx.rst>.
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#
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# Certain registers and IRQs are only enabled if supporting IXP465 CPUs
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#
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config CPU_IXP46X
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bool
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depends on MACH_IXDP465
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default y
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config CPU_IXP43X
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bool
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depends on MACH_KIXRP435
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default y
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comment "IXP4xx Options"
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config IXP4XX_PCI_LEGACY
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bool "IXP4xx legacy PCI driver support"
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depends on PCI
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help
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Selects legacy PCI driver.
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Not recommended for new development.
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config IXP4XX_INDIRECT_PCI
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bool "Use indirect PCI memory access"
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depends on IXP4XX_PCI_LEGACY
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help
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IXP4xx provides two methods of accessing PCI memory space:
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1) A direct mapped window from 0x48000000 to 0x4BFFFFFF (64MB).
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To access PCI via this space, we simply ioremap() the BAR
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into the kernel and we can use the standard read[bwl]/write[bwl]
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macros. This is the preferred method due to speed but it
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limits the system to just 64MB of PCI memory. This can be
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problematic if using video cards and other memory-heavy devices.
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2) If > 64MB of memory space is required, the IXP4xx can be
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configured to use indirect registers to access the whole PCI
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memory space. This currently allows for up to 1 GB (0x10000000
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to 0x4FFFFFFF) of memory on the bus. The disadvantage of this
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is that every PCI access requires three local register accesses
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plus a spinlock, but in some cases the performance hit is
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acceptable. In addition, you cannot mmap() PCI devices in this
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case due to the indirect nature of the PCI window.
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By default, the direct method is used. Choose this option if you
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need to use the indirect method instead. If you don't know
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what you need, leave this option unselected.
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endmenu
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endif
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