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T3Q is that cuck who took his gay date at his pops old home dressed like an Italian chef.

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This commit is contained in:
Raziel K. Crowe 2022-03-22 19:00:15 +05:00
parent 52d5978d29
commit 7390a54372
37 changed files with 407 additions and 250 deletions
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25
drivers/gpu/drm/drm_atomic_state_helper.c
View File

@ -243,11 +243,36 @@ EXPORT_SYMBOL(drm_atomic_helper_crtc_destroy_state);
void __drm_atomic_helper_plane_state_reset(struct drm_plane_state *plane_state,
struct drm_plane *plane)
{
u64 val;
plane_state->plane = plane;
plane_state->rotation = DRM_MODE_ROTATE_0;
plane_state->alpha = DRM_BLEND_ALPHA_OPAQUE;
plane_state->pixel_blend_mode = DRM_MODE_BLEND_PREMULTI;
if (plane->color_encoding_property) {
if (!drm_object_property_get_default_value(&plane->base,
plane->color_encoding_property,
&val))
plane_state->color_encoding = val;
}
if (plane->color_range_property) {
if (!drm_object_property_get_default_value(&plane->base,
plane->color_range_property,
&val))
plane_state->color_range = val;
}
if (plane->zpos_property) {
if (!drm_object_property_get_default_value(&plane->base,
plane->zpos_property,
&val)) {
plane_state->zpos = val;
plane_state->normalized_zpos = val;
}
}
}
EXPORT_SYMBOL(__drm_atomic_helper_plane_state_reset);

3
drivers/gpu/drm/drm_connector.c
View File

@ -2233,6 +2233,9 @@ EXPORT_SYMBOL(drm_connector_atomic_hdr_metadata_equal);
void drm_connector_set_vrr_capable_property(
struct drm_connector *connector, bool capable)
{
if (!connector->vrr_capable_property)
return;
drm_object_property_set_value(&connector->base,
connector->vrr_capable_property,
capable);

7
drivers/hid/hid-elo.c
View File

@ -228,7 +228,6 @@ static int elo_probe(struct hid_device *hdev, const struct hid_device_id *id)
{
struct elo_priv *priv;
int ret;
struct usb_device *udev;
if (!hid_is_usb(hdev))
return -EINVAL;
@ -238,8 +237,7 @@ static int elo_probe(struct hid_device *hdev, const struct hid_device_id *id)
return -ENOMEM;
INIT_DELAYED_WORK(&priv->work, elo_work);
udev = interface_to_usbdev(to_usb_interface(hdev->dev.parent));
priv->usbdev = usb_get_dev(udev);
priv->usbdev = interface_to_usbdev(to_usb_interface(hdev->dev.parent));
hid_set_drvdata(hdev, priv);
@ -262,7 +260,6 @@ static int elo_probe(struct hid_device *hdev, const struct hid_device_id *id)
return 0;
err_free:
usb_put_dev(udev);
kfree(priv);
return ret;
}
@ -271,8 +268,6 @@ static void elo_remove(struct hid_device *hdev)
{
struct elo_priv *priv = hid_get_drvdata(hdev);
usb_put_dev(priv->usbdev);
hid_hw_stop(hdev);
cancel_delayed_work_sync(&priv->work);
kfree(priv);

6
drivers/hid/hid-thrustmaster.c
View File

@ -158,6 +158,12 @@ static void thrustmaster_interrupts(struct hid_device *hdev)
return;
}
if (usbif->cur_altsetting->desc.bNumEndpoints < 2) {
kfree(send_buf);
hid_err(hdev, "Wrong number of endpoints?\n");
return;
}
ep = &usbif->cur_altsetting->endpoint[1];
b_ep = ep->desc.bEndpointAddress;

2
drivers/hid/hid-vivaldi.c
View File

@ -143,7 +143,7 @@ static void vivaldi_feature_mapping(struct hid_device *hdev,
static int vivaldi_input_configured(struct hid_device *hdev,
struct hid_input *hidinput)
{
return sysfs_create_group(&hdev->dev.kobj, &input_attribute_group);
return devm_device_add_group(&hdev->dev, &input_attribute_group);
}
static const struct hid_device_id vivaldi_table[] = {

2
drivers/net/ethernet/broadcom/bnx2.c
View File

@ -8212,7 +8212,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
rc = dma_set_coherent_mask(&pdev->dev, persist_dma_mask);
if (rc) {
dev_err(&pdev->dev,
"pci_set_consistent_dma_mask failed, aborting\n");
"dma_set_coherent_mask failed, aborting\n");
goto err_out_unmap;
}
} else if ((rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) != 0) {

7
drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c
View File

@ -40,6 +40,13 @@
void bcmgenet_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
{
struct bcmgenet_priv *priv = netdev_priv(dev);
struct device *kdev = &priv->pdev->dev;
if (!device_can_wakeup(kdev)) {
wol->supported = 0;
wol->wolopts = 0;
return;
}
wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;
wol->wolopts = priv->wolopts;

25
drivers/net/ethernet/cadence/macb_main.c
View File

@ -1606,7 +1606,14 @@ static int macb_poll(struct napi_struct *napi, int budget)
if (work_done < budget) {
napi_complete_done(napi, work_done);
/* Packets received while interrupts were disabled */
/* RSR bits only seem to propagate to raise interrupts when
* interrupts are enabled at the time, so if bits are already
* set due to packets received while interrupts were disabled,
* they will not cause another interrupt to be generated when
* interrupts are re-enabled.
* Check for this case here. This has been seen to happen
* around 30% of the time under heavy network load.
*/
status = macb_readl(bp, RSR);
if (status) {
if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
@ -1614,6 +1621,22 @@ static int macb_poll(struct napi_struct *napi, int budget)
napi_reschedule(napi);
} else {
queue_writel(queue, IER, bp->rx_intr_mask);
/* In rare cases, packets could have been received in
* the window between the check above and re-enabling
* interrupts. Therefore, a double-check is required
* to avoid losing a wakeup. This can potentially race
* with the interrupt handler doing the same actions
* if an interrupt is raised just after enabling them,
* but this should be harmless.
*/
status = macb_readl(bp, RSR);
if (unlikely(status)) {
queue_writel(queue, IDR, bp->rx_intr_mask);
if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
queue_writel(queue, ISR, MACB_BIT(RCOMP));
napi_schedule(napi);
}
}
}

1
drivers/net/ethernet/freescale/gianfar_ethtool.c
View File

@ -1460,6 +1460,7 @@ static int gfar_get_ts_info(struct net_device *dev,
ptp_node = of_find_compatible_node(NULL, NULL, "fsl,etsec-ptp");
if (ptp_node) {
ptp_dev = of_find_device_by_node(ptp_node);
of_node_put(ptp_node);
if (ptp_dev)
ptp = platform_get_drvdata(ptp_dev);
}

6
drivers/net/ethernet/intel/i40e/i40e_debugfs.c
View File

@ -742,10 +742,8 @@ static void i40e_dbg_dump_vf(struct i40e_pf *pf, int vf_id)
vsi = pf->vsi[vf->lan_vsi_idx];
dev_info(&pf->pdev->dev, "vf %2d: VSI id=%d, seid=%d, qps=%d\n",
vf_id, vf->lan_vsi_id, vsi->seid, vf->num_queue_pairs);
dev_info(&pf->pdev->dev, " num MDD=%lld, invalid msg=%lld, valid msg=%lld\n",
vf->num_mdd_events,
vf->num_invalid_msgs,
vf->num_valid_msgs);
dev_info(&pf->pdev->dev, " num MDD=%lld\n",
vf->num_mdd_events);
} else {
dev_info(&pf->pdev->dev, "invalid VF id %d\n", vf_id);
}

57
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
View File

@ -1917,19 +1917,17 @@ int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
/***********************virtual channel routines******************/
/**
* i40e_vc_send_msg_to_vf_ex
* i40e_vc_send_msg_to_vf
* @vf: pointer to the VF info
* @v_opcode: virtual channel opcode
* @v_retval: virtual channel return value
* @msg: pointer to the msg buffer
* @msglen: msg length
* @is_quiet: true for not printing unsuccessful return values, false otherwise
*
* send msg to VF
**/
static int i40e_vc_send_msg_to_vf_ex(struct i40e_vf *vf, u32 v_opcode,
u32 v_retval, u8 *msg, u16 msglen,
bool is_quiet)
static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
u32 v_retval, u8 *msg, u16 msglen)
{
struct i40e_pf *pf;
struct i40e_hw *hw;
@ -1944,25 +1942,6 @@ static int i40e_vc_send_msg_to_vf_ex(struct i40e_vf *vf, u32 v_opcode,
hw = &pf->hw;
abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
/* single place to detect unsuccessful return values */
if (v_retval && !is_quiet) {
vf->num_invalid_msgs++;
dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
vf->vf_id, v_opcode, v_retval);
if (vf->num_invalid_msgs >
I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
dev_err(&pf->pdev->dev,
"Number of invalid messages exceeded for VF %d\n",
vf->vf_id);
dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
}
} else {
vf->num_valid_msgs++;
/* reset the invalid counter, if a valid message is received. */
vf->num_invalid_msgs = 0;
}
aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
msg, msglen, NULL);
if (aq_ret) {
@ -1975,23 +1954,6 @@ static int i40e_vc_send_msg_to_vf_ex(struct i40e_vf *vf, u32 v_opcode,
return 0;
}
/**
* i40e_vc_send_msg_to_vf
* @vf: pointer to the VF info
* @v_opcode: virtual channel opcode
* @v_retval: virtual channel return value
* @msg: pointer to the msg buffer
* @msglen: msg length
*
* send msg to VF
**/
static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
u32 v_retval, u8 *msg, u16 msglen)
{
return i40e_vc_send_msg_to_vf_ex(vf, v_opcode, v_retval,
msg, msglen, false);
}
/**
* i40e_vc_send_resp_to_vf
* @vf: pointer to the VF info
@ -2813,7 +2775,6 @@ static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg)
* i40e_check_vf_permission
* @vf: pointer to the VF info
* @al: MAC address list from virtchnl
* @is_quiet: set true for printing msg without opcode info, false otherwise
*
* Check that the given list of MAC addresses is allowed. Will return -EPERM
* if any address in the list is not valid. Checks the following conditions:
@ -2828,15 +2789,13 @@ static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg)
* addresses might not be accurate.
**/
static inline int i40e_check_vf_permission(struct i40e_vf *vf,
struct virtchnl_ether_addr_list *al,
bool *is_quiet)
struct virtchnl_ether_addr_list *al)
{
struct i40e_pf *pf = vf->pf;
struct i40e_vsi *vsi = pf->vsi[vf->lan_vsi_idx];
int mac2add_cnt = 0;
int i;
*is_quiet = false;
for (i = 0; i < al->num_elements; i++) {
struct i40e_mac_filter *f;
u8 *addr = al->list[i].addr;
@ -2860,7 +2819,6 @@ static inline int i40e_check_vf_permission(struct i40e_vf *vf,
!ether_addr_equal(addr, vf->default_lan_addr.addr)) {
dev_err(&pf->pdev->dev,
"VF attempting to override administratively set MAC address, bring down and up the VF interface to resume normal operation\n");
*is_quiet = true;
return -EPERM;
}
@ -2897,7 +2855,6 @@ static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg)
(struct virtchnl_ether_addr_list *)msg;
struct i40e_pf *pf = vf->pf;
struct i40e_vsi *vsi = NULL;
bool is_quiet = false;
i40e_status ret = 0;
int i;
@ -2914,7 +2871,7 @@ static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg)
*/
spin_lock_bh(&vsi->mac_filter_hash_lock);
ret = i40e_check_vf_permission(vf, al, &is_quiet);
ret = i40e_check_vf_permission(vf, al);
if (ret) {
spin_unlock_bh(&vsi->mac_filter_hash_lock);
goto error_param;
@ -2952,8 +2909,8 @@ static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg)
error_param:
/* send the response to the VF */
return i40e_vc_send_msg_to_vf_ex(vf, VIRTCHNL_OP_ADD_ETH_ADDR,
ret, NULL, 0, is_quiet);
return i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_ADD_ETH_ADDR,
ret, NULL, 0);
}
/**

5
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h
View File

@ -10,8 +10,6 @@
#define I40E_VIRTCHNL_SUPPORTED_QTYPES 2
#define I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED 10
#define I40E_VLAN_PRIORITY_SHIFT 13
#define I40E_VLAN_MASK 0xFFF
#define I40E_PRIORITY_MASK 0xE000
@ -92,9 +90,6 @@ struct i40e_vf {
u8 num_queue_pairs; /* num of qps assigned to VF vsis */
u8 num_req_queues; /* num of requested qps */
u64 num_mdd_events; /* num of mdd events detected */
/* num of continuous malformed or invalid msgs detected */
u64 num_invalid_msgs;
u64 num_valid_msgs; /* num of valid msgs detected */
unsigned long vf_caps; /* vf's adv. capabilities */
unsigned long vf_states; /* vf's runtime states */

40
drivers/net/ethernet/intel/iavf/iavf_virtchnl.c
View File

@ -1460,6 +1460,22 @@ void iavf_request_reset(struct iavf_adapter *adapter)
adapter->current_op = VIRTCHNL_OP_UNKNOWN;
}
/**
* iavf_netdev_features_vlan_strip_set - update vlan strip status
* @netdev: ptr to netdev being adjusted
* @enable: enable or disable vlan strip
*
* Helper function to change vlan strip status in netdev->features.
*/
static void iavf_netdev_features_vlan_strip_set(struct net_device *netdev,
const bool enable)
{
if (enable)
netdev->features |= NETIF_F_HW_VLAN_CTAG_RX;
else
netdev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
}
/**
* iavf_virtchnl_completion
* @adapter: adapter structure
@ -1683,8 +1699,18 @@ void iavf_virtchnl_completion(struct iavf_adapter *adapter,
}
break;
case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:
dev_warn(&adapter->pdev->dev, "Changing VLAN Stripping is not allowed when Port VLAN is configured\n");
/* Vlan stripping could not be enabled by ethtool.
* Disable it in netdev->features.
*/
iavf_netdev_features_vlan_strip_set(netdev, false);
break;
case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING:
dev_warn(&adapter->pdev->dev, "Changing VLAN Stripping is not allowed when Port VLAN is configured\n");
/* Vlan stripping could not be disabled by ethtool.
* Enable it in netdev->features.
*/
iavf_netdev_features_vlan_strip_set(netdev, true);
break;
default:
dev_err(&adapter->pdev->dev, "PF returned error %d (%s) to our request %d\n",
@ -1918,6 +1944,20 @@ void iavf_virtchnl_completion(struct iavf_adapter *adapter,
spin_unlock_bh(&adapter->adv_rss_lock);
}
break;
case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:
/* PF enabled vlan strip on this VF.
* Update netdev->features if needed to be in sync with ethtool.
*/
if (!v_retval)
iavf_netdev_features_vlan_strip_set(netdev, true);
break;
case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING:
/* PF disabled vlan strip on this VF.
* Update netdev->features if needed to be in sync with ethtool.
*/
if (!v_retval)
iavf_netdev_features_vlan_strip_set(netdev, false);
break;
default:
if (adapter->current_op && (v_opcode != adapter->current_op))
dev_warn(&adapter->pdev->dev, "Expected response %d from PF, received %d\n",

12
drivers/net/ethernet/intel/ice/ice.h
View File

@ -398,6 +398,7 @@ enum ice_pf_flags {
ICE_FLAG_MDD_AUTO_RESET_VF,
ICE_FLAG_LINK_LENIENT_MODE_ENA,
ICE_FLAG_PLUG_AUX_DEV,
ICE_FLAG_MTU_CHANGED,
ICE_PF_FLAGS_NBITS /* must be last */
};
@ -702,7 +703,16 @@ static inline void ice_set_rdma_cap(struct ice_pf *pf)
*/
static inline void ice_clear_rdma_cap(struct ice_pf *pf)
{
ice_unplug_aux_dev(pf);
/* We can directly unplug aux device here only if the flag bit
* ICE_FLAG_PLUG_AUX_DEV is not set because ice_unplug_aux_dev()
* could race with ice_plug_aux_dev() called from
* ice_service_task(). In this case we only clear that bit now and
* aux device will be unplugged later once ice_plug_aux_device()
* called from ice_service_task() finishes (see ice_service_task()).
*/
if (!test_and_clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags))
ice_unplug_aux_dev(pf);
clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
clear_bit(ICE_FLAG_AUX_ENA, pf->flags);
}

2
drivers/net/ethernet/intel/ice/ice_ethtool.c
View File

@ -2275,7 +2275,7 @@ ice_set_link_ksettings(struct net_device *netdev,
goto done;
}
curr_link_speed = pi->phy.link_info.link_speed;
curr_link_speed = pi->phy.curr_user_speed_req;
adv_link_speed = ice_ksettings_find_adv_link_speed(ks);
/* If speed didn't get set, set it to what it currently is.

43
drivers/net/ethernet/intel/ice/ice_main.c
View File

@ -2143,9 +2143,30 @@ static void ice_service_task(struct work_struct *work)
return;
}
if (test_and_clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags))
if (test_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags)) {
/* Plug aux device per request */
ice_plug_aux_dev(pf);
/* Mark plugging as done but check whether unplug was
* requested during ice_plug_aux_dev() call
* (e.g. from ice_clear_rdma_cap()) and if so then
* plug aux device.
*/
if (!test_and_clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags))
ice_unplug_aux_dev(pf);
}
if (test_and_clear_bit(ICE_FLAG_MTU_CHANGED, pf->flags)) {
struct iidc_event *event;
event = kzalloc(sizeof(*event), GFP_KERNEL);
if (event) {
set_bit(IIDC_EVENT_AFTER_MTU_CHANGE, event->type);
ice_send_event_to_aux(pf, event);
kfree(event);
}
}
ice_clean_adminq_subtask(pf);
ice_check_media_subtask(pf);
ice_check_for_hang_subtask(pf);
@ -2863,7 +2884,7 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data)
struct iidc_event *event;
ena_mask &= ~ICE_AUX_CRIT_ERR;
event = kzalloc(sizeof(*event), GFP_KERNEL);
event = kzalloc(sizeof(*event), GFP_ATOMIC);
if (event) {
set_bit(IIDC_EVENT_CRIT_ERR, event->type);
/* report the entire OICR value to AUX driver */
@ -6532,7 +6553,6 @@ static int ice_change_mtu(struct net_device *netdev, int new_mtu)
struct ice_netdev_priv *np = netdev_priv(netdev);
struct ice_vsi *vsi = np->vsi;
struct ice_pf *pf = vsi->back;
struct iidc_event *event;
u8 count = 0;
int err = 0;
@ -6567,14 +6587,6 @@ static int ice_change_mtu(struct net_device *netdev, int new_mtu)
return -EBUSY;
}
event = kzalloc(sizeof(*event), GFP_KERNEL);
if (!event)
return -ENOMEM;
set_bit(IIDC_EVENT_BEFORE_MTU_CHANGE, event->type);
ice_send_event_to_aux(pf, event);
clear_bit(IIDC_EVENT_BEFORE_MTU_CHANGE, event->type);
netdev->mtu = (unsigned int)new_mtu;
/* if VSI is up, bring it down and then back up */
@ -6582,21 +6594,18 @@ static int ice_change_mtu(struct net_device *netdev, int new_mtu)
err = ice_down(vsi);
if (err) {
netdev_err(netdev, "change MTU if_down err %d\n", err);
goto event_after;
return err;
}
err = ice_up(vsi);
if (err) {
netdev_err(netdev, "change MTU if_up err %d\n", err);
goto event_after;
return err;
}
}
netdev_dbg(netdev, "changed MTU to %d\n", new_mtu);
event_after:
set_bit(IIDC_EVENT_AFTER_MTU_CHANGE, event->type);
ice_send_event_to_aux(pf, event);
kfree(event);
set_bit(ICE_FLAG_MTU_CHANGED, pf->flags);
return err;
}

18
drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c
View File

@ -2234,24 +2234,6 @@ ice_vc_send_msg_to_vf(struct ice_vf *vf, u32 v_opcode,
dev = ice_pf_to_dev(pf);
/* single place to detect unsuccessful return values */
if (v_retval) {
vf->num_inval_msgs++;
dev_info(dev, "VF %d failed opcode %d, retval: %d\n", vf->vf_id,
v_opcode, v_retval);
if (vf->num_inval_msgs > ICE_DFLT_NUM_INVAL_MSGS_ALLOWED) {
dev_err(dev, "Number of invalid messages exceeded for VF %d\n",
vf->vf_id);
dev_err(dev, "Use PF Control I/F to enable the VF\n");
set_bit(ICE_VF_STATE_DIS, vf->vf_states);
return -EIO;
}
} else {
vf->num_valid_msgs++;
/* reset the invalid counter, if a valid message is received. */
vf->num_inval_msgs = 0;
}
aq_ret = ice_aq_send_msg_to_vf(&pf->hw, vf->vf_id, v_opcode, v_retval,
msg, msglen, NULL);
if (aq_ret && pf->hw.mailboxq.sq_last_status != ICE_AQ_RC_ENOSYS) {

3
drivers/net/ethernet/intel/ice/ice_virtchnl_pf.h
View File

@ -14,7 +14,6 @@
#define ICE_MAX_MACADDR_PER_VF 18
/* Malicious Driver Detection */
#define ICE_DFLT_NUM_INVAL_MSGS_ALLOWED 10
#define ICE_MDD_EVENTS_THRESHOLD 30
/* Static VF transaction/status register def */
@ -107,8 +106,6 @@ struct ice_vf {
unsigned int tx_rate; /* Tx bandwidth limit in Mbps */
DECLARE_BITMAP(vf_states, ICE_VF_STATES_NBITS); /* VF runtime states */
u64 num_inval_msgs; /* number of continuous invalid msgs */
u64 num_valid_msgs; /* number of valid msgs detected */
unsigned long vf_caps; /* VF's adv. capabilities */
u8 num_req_qs; /* num of queue pairs requested by VF */
u16 num_mac;

1
drivers/net/ethernet/marvell/prestera/prestera_main.c
View File

@ -492,6 +492,7 @@ static int prestera_switch_set_base_mac_addr(struct prestera_switch *sw)
dev_info(prestera_dev(sw), "using random base mac address\n");
}
of_node_put(base_mac_np);
of_node_put(np);
return prestera_hw_switch_mac_set(sw, sw->base_mac);
}

15
drivers/net/ethernet/mellanox/mlx5/core/cmd.c
View File

@ -130,11 +130,8 @@ static int cmd_alloc_index(struct mlx5_cmd *cmd)
static void cmd_free_index(struct mlx5_cmd *cmd, int idx)
{
unsigned long flags;
spin_lock_irqsave(&cmd->alloc_lock, flags);
lockdep_assert_held(&cmd->alloc_lock);
set_bit(idx, &cmd->bitmask);
spin_unlock_irqrestore(&cmd->alloc_lock, flags);
}
static void cmd_ent_get(struct mlx5_cmd_work_ent *ent)
@ -144,17 +141,21 @@ static void cmd_ent_get(struct mlx5_cmd_work_ent *ent)
static void cmd_ent_put(struct mlx5_cmd_work_ent *ent)
{
struct mlx5_cmd *cmd = ent->cmd;
unsigned long flags;
spin_lock_irqsave(&cmd->alloc_lock, flags);
if (!refcount_dec_and_test(&ent->refcnt))
return;
goto out;
if (ent->idx >= 0) {
struct mlx5_cmd *cmd = ent->cmd;
cmd_free_index(cmd, ent->idx);
up(ent->page_queue ? &cmd->pages_sem : &cmd->sem);
}
cmd_free_ent(ent);
out:
spin_unlock_irqrestore(&cmd->alloc_lock, flags);
}
static struct mlx5_cmd_layout *get_inst(struct mlx5_cmd *cmd, int idx)

11
drivers/net/ethernet/mellanox/mlx5/core/lag_mp.c
View File

@ -126,6 +126,10 @@ static void mlx5_lag_fib_route_event(struct mlx5_lag *ldev,
return;
}
/* Handle multipath entry with lower priority value */
if (mp->mfi && mp->mfi != fi && fi->fib_priority >= mp->mfi->fib_priority)
return;
/* Handle add/replace event */
nhs = fib_info_num_path(fi);
if (nhs == 1) {
@ -135,12 +139,13 @@ static void mlx5_lag_fib_route_event(struct mlx5_lag *ldev,
int i = mlx5_lag_dev_get_netdev_idx(ldev, nh_dev);
if (i < 0)
i = MLX5_LAG_NORMAL_AFFINITY;
else
++i;
return;
i++;
mlx5_lag_set_port_affinity(ldev, i);
}
mp->mfi = fi;
return;
}

3
drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c
View File

@ -121,9 +121,6 @@ u32 mlx5_chains_get_nf_ft_chain(struct mlx5_fs_chains *chains)
u32 mlx5_chains_get_prio_range(struct mlx5_fs_chains *chains)
{
if (!mlx5_chains_prios_supported(chains))
return 1;
if (mlx5_chains_ignore_flow_level_supported(chains))
return UINT_MAX;

5
drivers/net/ethernet/nxp/lpc_eth.c
View File

@ -1469,6 +1469,7 @@ static int lpc_eth_drv_resume(struct platform_device *pdev)
{
struct net_device *ndev = platform_get_drvdata(pdev);
struct netdata_local *pldat;
int ret;
if (device_may_wakeup(&pdev->dev))
disable_irq_wake(ndev->irq);
@ -1478,7 +1479,9 @@ static int lpc_eth_drv_resume(struct platform_device *pdev)
pldat = netdev_priv(ndev);
/* Enable interface clock */
clk_enable(pldat->clk);
ret = clk_enable(pldat->clk);
if (ret)
return ret;
/* Reset and initialize */
__lpc_eth_reset(pldat);

18
drivers/net/ethernet/qlogic/qed/qed_sriov.c
View File

@ -3778,11 +3778,11 @@ bool qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
return found;
}
static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
u16 vfid,
struct qed_mcp_link_params *p_params,
struct qed_mcp_link_state *p_link,
struct qed_mcp_link_capabilities *p_caps)
static int qed_iov_get_link(struct qed_hwfn *p_hwfn,
u16 vfid,
struct qed_mcp_link_params *p_params,
struct qed_mcp_link_state *p_link,
struct qed_mcp_link_capabilities *p_caps)
{
struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
vfid,
@ -3790,7 +3790,7 @@ static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
struct qed_bulletin_content *p_bulletin;
if (!p_vf)
return;
return -EINVAL;
p_bulletin = p_vf->bulletin.p_virt;
@ -3800,6 +3800,7 @@ static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
__qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
if (p_caps)
__qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
return 0;
}
static int
@ -4658,6 +4659,7 @@ static int qed_get_vf_config(struct qed_dev *cdev,
struct qed_public_vf_info *vf_info;
struct qed_mcp_link_state link;
u32 tx_rate;
int ret;
/* Sanitize request */
if (IS_VF(cdev))
@ -4671,7 +4673,9 @@ static int qed_get_vf_config(struct qed_dev *cdev,
vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
ret = qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
if (ret)
return ret;
/* Fill information about VF */
ivi->vf = vf_id;

7
drivers/net/ethernet/qlogic/qed/qed_vf.c
View File

@ -513,6 +513,9 @@ int qed_vf_hw_prepare(struct qed_hwfn *p_hwfn)
p_iov->bulletin.size,
&p_iov->bulletin.phys,
GFP_KERNEL);
if (!p_iov->bulletin.p_virt)
goto free_pf2vf_reply;
DP_VERBOSE(p_hwfn, QED_MSG_IOV,
"VF's bulletin Board [%p virt 0x%llx phys 0x%08x bytes]\n",
p_iov->bulletin.p_virt,
@ -552,6 +555,10 @@ int qed_vf_hw_prepare(struct qed_hwfn *p_hwfn)
return rc;
free_pf2vf_reply:
dma_free_coherent(&p_hwfn->cdev->pdev->dev,
sizeof(union pfvf_tlvs),
p_iov->pf2vf_reply, p_iov->pf2vf_reply_phys);
free_vf2pf_request:
dma_free_coherent(&p_hwfn->cdev->pdev->dev,
sizeof(union vfpf_tlvs),

4
drivers/net/ethernet/ti/cpts.c
View File

@ -568,7 +568,9 @@ int cpts_register(struct cpts *cpts)
for (i = 0; i < CPTS_MAX_EVENTS; i++)
list_add(&cpts->pool_data[i].list, &cpts->pool);
clk_enable(cpts->refclk);
err = clk_enable(cpts->refclk);
if (err)
return err;
cpts_write32(cpts, CPTS_EN, control);
cpts_write32(cpts, TS_PEND_EN, int_enable);

4
drivers/net/ethernet/xilinx/xilinx_emaclite.c
View File

@ -1185,7 +1185,7 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
if (rc) {
dev_err(dev,
"Cannot register network device, aborting\n");
goto error;
goto put_node;
}
dev_info(dev,
@ -1193,6 +1193,8 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
(unsigned long __force)ndev->mem_start, lp->base_addr, ndev->irq);
return 0;
put_node:
of_node_put(lp->phy_node);
error:
free_netdev(ndev);
return rc;

1
drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
View File

@ -295,7 +295,6 @@ static const u8 he_if_types_ext_capa_sta[] = {
[0] = WLAN_EXT_CAPA1_EXT_CHANNEL_SWITCHING,
[2] = WLAN_EXT_CAPA3_MULTI_BSSID_SUPPORT,
[7] = WLAN_EXT_CAPA8_OPMODE_NOTIF,
[9] = WLAN_EXT_CAPA10_TWT_REQUESTER_SUPPORT,
};
static const struct wiphy_iftype_ext_capab he_iftypes_ext_capa[] = {

14
drivers/net/xen-netback/xenbus.c
View File

@ -256,6 +256,7 @@ static void backend_disconnect(struct backend_info *be)
unsigned int queue_index;
xen_unregister_watchers(vif);
xenbus_rm(XBT_NIL, be->dev->nodename, "hotplug-status");
#ifdef CONFIG_DEBUG_FS
xenvif_debugfs_delif(vif);
#endif /* CONFIG_DEBUG_FS */
@ -675,7 +676,6 @@ static void hotplug_status_changed(struct xenbus_watch *watch,
/* Not interested in this watch anymore. */
unregister_hotplug_status_watch(be);
xenbus_rm(XBT_NIL, be->dev->nodename, "hotplug-status");
}
kfree(str);
}
@ -824,15 +824,11 @@ static void connect(struct backend_info *be)
xenvif_carrier_on(be->vif);
unregister_hotplug_status_watch(be);
if (xenbus_exists(XBT_NIL, dev->nodename, "hotplug-status")) {
err = xenbus_watch_pathfmt(dev, &be->hotplug_status_watch,
NULL, hotplug_status_changed,
"%s/%s", dev->nodename,
"hotplug-status");
if (err)
goto err;
err = xenbus_watch_pathfmt(dev, &be->hotplug_status_watch, NULL,
hotplug_status_changed,
"%s/%s", dev->nodename, "hotplug-status");
if (!err)
be->have_hotplug_status_watch = 1;
}
netif_tx_wake_all_queues(be->vif->dev);

5
drivers/staging/gdm724x/gdm_lte.c
View File

@ -76,14 +76,15 @@ static void tx_complete(void *arg)
static int gdm_lte_rx(struct sk_buff *skb, struct nic *nic, int nic_type)
{
int ret;
int ret, len;
len = skb->len + ETH_HLEN;
ret = netif_rx_ni(skb);
if (ret == NET_RX_DROP) {
nic->stats.rx_dropped++;
} else {
nic->stats.rx_packets++;
nic->stats.rx_bytes += skb->len + ETH_HLEN;
nic->stats.rx_bytes += len;
}
return 0;

7
drivers/staging/rtl8723bs/core/rtw_mlme_ext.c
View File

@ -5915,6 +5915,7 @@ u8 chk_bmc_sleepq_hdl(struct adapter *padapter, unsigned char *pbuf)
struct sta_info *psta_bmc;
struct list_head *xmitframe_plist, *xmitframe_phead, *tmp;
struct xmit_frame *pxmitframe = NULL;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct sta_priv *pstapriv = &padapter->stapriv;
/* for BC/MC Frames */
@ -5925,7 +5926,8 @@ u8 chk_bmc_sleepq_hdl(struct adapter *padapter, unsigned char *pbuf)
if ((pstapriv->tim_bitmap&BIT(0)) && (psta_bmc->sleepq_len > 0)) {
msleep(10);/* 10ms, ATIM(HIQ) Windows */
spin_lock_bh(&psta_bmc->sleep_q.lock);
/* spin_lock_bh(&psta_bmc->sleep_q.lock); */
spin_lock_bh(&pxmitpriv->lock);
xmitframe_phead = get_list_head(&psta_bmc->sleep_q);
list_for_each_safe(xmitframe_plist, tmp, xmitframe_phead) {
@ -5948,7 +5950,8 @@ u8 chk_bmc_sleepq_hdl(struct adapter *padapter, unsigned char *pbuf)
rtw_hal_xmitframe_enqueue(padapter, pxmitframe);
}
spin_unlock_bh(&psta_bmc->sleep_q.lock);
/* spin_unlock_bh(&psta_bmc->sleep_q.lock); */
spin_unlock_bh(&pxmitpriv->lock);
/* check hi queue and bmc_sleepq */
rtw_chk_hi_queue_cmd(padapter);

10
drivers/staging/rtl8723bs/core/rtw_recv.c
View File

@ -953,8 +953,10 @@ static signed int validate_recv_ctrl_frame(struct adapter *padapter, union recv_
if ((psta->state&WIFI_SLEEP_STATE) && (pstapriv->sta_dz_bitmap&BIT(psta->aid))) {
struct list_head *xmitframe_plist, *xmitframe_phead;
struct xmit_frame *pxmitframe = NULL;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
spin_lock_bh(&psta->sleep_q.lock);
/* spin_lock_bh(&psta->sleep_q.lock); */
spin_lock_bh(&pxmitpriv->lock);
xmitframe_phead = get_list_head(&psta->sleep_q);
xmitframe_plist = get_next(xmitframe_phead);
@ -985,10 +987,12 @@ static signed int validate_recv_ctrl_frame(struct adapter *padapter, union recv_
update_beacon(padapter, WLAN_EID_TIM, NULL, true);
}
spin_unlock_bh(&psta->sleep_q.lock);
/* spin_unlock_bh(&psta->sleep_q.lock); */
spin_unlock_bh(&pxmitpriv->lock);
} else {
spin_unlock_bh(&psta->sleep_q.lock);
/* spin_unlock_bh(&psta->sleep_q.lock); */
spin_unlock_bh(&pxmitpriv->lock);
if (pstapriv->tim_bitmap&BIT(psta->aid)) {
if (psta->sleepq_len == 0) {

24
drivers/staging/rtl8723bs/core/rtw_sta_mgt.c
View File

@ -288,48 +288,46 @@ u32 rtw_free_stainfo(struct adapter *padapter, struct sta_info *psta)
/* list_del_init(&psta->wakeup_list); */
spin_lock_bh(&psta->sleep_q.lock);
rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q);
psta->sleepq_len = 0;
spin_unlock_bh(&psta->sleep_q.lock);
spin_lock_bh(&pxmitpriv->lock);
rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q);
psta->sleepq_len = 0;
/* vo */
spin_lock_bh(&pstaxmitpriv->vo_q.sta_pending.lock);
/* spin_lock_bh(&(pxmitpriv->vo_pending.lock)); */
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vo_q.sta_pending);
list_del_init(&(pstaxmitpriv->vo_q.tx_pending));
phwxmit = pxmitpriv->hwxmits;
phwxmit->accnt -= pstaxmitpriv->vo_q.qcnt;
pstaxmitpriv->vo_q.qcnt = 0;
spin_unlock_bh(&pstaxmitpriv->vo_q.sta_pending.lock);
/* spin_unlock_bh(&(pxmitpriv->vo_pending.lock)); */
/* vi */
spin_lock_bh(&pstaxmitpriv->vi_q.sta_pending.lock);
/* spin_lock_bh(&(pxmitpriv->vi_pending.lock)); */
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vi_q.sta_pending);
list_del_init(&(pstaxmitpriv->vi_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+1;
phwxmit->accnt -= pstaxmitpriv->vi_q.qcnt;
pstaxmitpriv->vi_q.qcnt = 0;
spin_unlock_bh(&pstaxmitpriv->vi_q.sta_pending.lock);
/* spin_unlock_bh(&(pxmitpriv->vi_pending.lock)); */
/* be */
spin_lock_bh(&pstaxmitpriv->be_q.sta_pending.lock);
/* spin_lock_bh(&(pxmitpriv->be_pending.lock)); */
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->be_q.sta_pending);
list_del_init(&(pstaxmitpriv->be_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+2;
phwxmit->accnt -= pstaxmitpriv->be_q.qcnt;
pstaxmitpriv->be_q.qcnt = 0;
spin_unlock_bh(&pstaxmitpriv->be_q.sta_pending.lock);
/* spin_unlock_bh(&(pxmitpriv->be_pending.lock)); */
/* bk */
spin_lock_bh(&pstaxmitpriv->bk_q.sta_pending.lock);
/* spin_lock_bh(&(pxmitpriv->bk_pending.lock)); */
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->bk_q.sta_pending);
list_del_init(&(pstaxmitpriv->bk_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+3;
phwxmit->accnt -= pstaxmitpriv->bk_q.qcnt;
pstaxmitpriv->bk_q.qcnt = 0;
spin_unlock_bh(&pstaxmitpriv->bk_q.sta_pending.lock);
/* spin_unlock_bh(&(pxmitpriv->bk_pending.lock)); */
spin_unlock_bh(&pxmitpriv->lock);

16
drivers/staging/rtl8723bs/core/rtw_xmit.c
View File

@ -1723,12 +1723,15 @@ void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, struct __queue *pfram
struct list_head *plist, *phead, *tmp;
struct xmit_frame *pxmitframe;
spin_lock_bh(&pframequeue->lock);
phead = get_list_head(pframequeue);
list_for_each_safe(plist, tmp, phead) {
pxmitframe = list_entry(plist, struct xmit_frame, list);
rtw_free_xmitframe(pxmitpriv, pxmitframe);
}
spin_unlock_bh(&pframequeue->lock);
}
s32 rtw_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe)
@ -1783,7 +1786,6 @@ s32 rtw_xmit_classifier(struct adapter *padapter, struct xmit_frame *pxmitframe)
struct sta_info *psta;
struct tx_servq *ptxservq;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct xmit_priv *xmit_priv = &padapter->xmitpriv;
struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits;
signed int res = _SUCCESS;
@ -1801,14 +1803,12 @@ s32 rtw_xmit_classifier(struct adapter *padapter, struct xmit_frame *pxmitframe)
ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index));
spin_lock_bh(&xmit_priv->lock);
if (list_empty(&ptxservq->tx_pending))
list_add_tail(&ptxservq->tx_pending, get_list_head(phwxmits[ac_index].sta_queue));
list_add_tail(&pxmitframe->list, get_list_head(&ptxservq->sta_pending));
ptxservq->qcnt++;
phwxmits[ac_index].accnt++;
spin_unlock_bh(&xmit_priv->lock);
exit:
@ -2191,10 +2191,11 @@ void wakeup_sta_to_xmit(struct adapter *padapter, struct sta_info *psta)
struct list_head *xmitframe_plist, *xmitframe_phead, *tmp;
struct xmit_frame *pxmitframe = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
psta_bmc = rtw_get_bcmc_stainfo(padapter);
spin_lock_bh(&psta->sleep_q.lock);
spin_lock_bh(&pxmitpriv->lock);
xmitframe_phead = get_list_head(&psta->sleep_q);
list_for_each_safe(xmitframe_plist, tmp, xmitframe_phead) {
@ -2295,7 +2296,7 @@ void wakeup_sta_to_xmit(struct adapter *padapter, struct sta_info *psta)
_exit:
spin_unlock_bh(&psta->sleep_q.lock);
spin_unlock_bh(&pxmitpriv->lock);
if (update_mask)
update_beacon(padapter, WLAN_EID_TIM, NULL, true);
@ -2307,8 +2308,9 @@ void xmit_delivery_enabled_frames(struct adapter *padapter, struct sta_info *pst
struct list_head *xmitframe_plist, *xmitframe_phead, *tmp;
struct xmit_frame *pxmitframe = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
spin_lock_bh(&psta->sleep_q.lock);
spin_lock_bh(&pxmitpriv->lock);
xmitframe_phead = get_list_head(&psta->sleep_q);
list_for_each_safe(xmitframe_plist, tmp, xmitframe_phead) {
@ -2361,7 +2363,7 @@ void xmit_delivery_enabled_frames(struct adapter *padapter, struct sta_info *pst
}
}
spin_unlock_bh(&psta->sleep_q.lock);
spin_unlock_bh(&pxmitpriv->lock);
}
void enqueue_pending_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)

2
drivers/staging/rtl8723bs/hal/rtl8723bs_xmit.c
View File

@ -507,7 +507,9 @@ s32 rtl8723bs_hal_xmit(
rtw_issue_addbareq_cmd(padapter, pxmitframe);
}
spin_lock_bh(&pxmitpriv->lock);
err = rtw_xmitframe_enqueue(padapter, pxmitframe);
spin_unlock_bh(&pxmitpriv->lock);
if (err != _SUCCESS) {
rtw_free_xmitframe(pxmitpriv, pxmitframe);

244
drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c
View File

@ -62,6 +62,10 @@ static int deinterlace_video_nr = 18;
module_param(deinterlace_video_nr, int, 0644);
MODULE_PARM_DESC(deinterlace_video_nr, "deinterlace video device number");
static int encode_image_nr = 31;
module_param(encode_image_nr, int, 0644);
MODULE_PARM_DESC(encode_image_nr, "encoder image device number");
/*
* Workaround for GStreamer v4l2convert component not considering Bayer formats
* as raw, and therefore not considering a V4L2 device that supports them as
@ -88,6 +92,7 @@ enum bcm2835_codec_role {
ENCODE,
ISP,
DEINTERLACE,
ENCODE_IMAGE,
NUM_ROLES
};
@ -96,6 +101,7 @@ static const char * const roles[] = {
"encode",
"isp",
"image_fx",
"encode_image",
};
static const char * const components[] = {
@ -103,6 +109,7 @@ static const char * const components[] = {
"ril.video_encode",
"ril.isp",
"ril.image_fx",
"ril.image_encode",
};
/* Timeout for stop_streaming to allow all buffers to return */
@ -136,6 +143,8 @@ static const char * const components[] = {
*/
#define DEF_COMP_BUF_SIZE_GREATER_720P (768 << 10)
#define DEF_COMP_BUF_SIZE_720P_OR_LESS (512 << 10)
/* JPEG image can be very large. For paranoid reasons 4MB is used */
#define DEF_COMP_BUF_SIZE_JPEG (4096 << 10)
/* Flags that indicate a format can be used for capture/output */
#define MEM2MEM_CAPTURE BIT(0)
@ -158,63 +167,63 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* YUV formats */
.fourcc = V4L2_PIX_FMT_YUV420,
.depth = 8,
.bytesperline_align = { 32, 64, 64, 32 },
.bytesperline_align = { 32, 64, 64, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_I420,
.size_multiplier_x2 = 3,
}, {
.fourcc = V4L2_PIX_FMT_YVU420,
.depth = 8,
.bytesperline_align = { 32, 64, 64, 32 },
.bytesperline_align = { 32, 64, 64, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_YV12,
.size_multiplier_x2 = 3,
}, {
.fourcc = V4L2_PIX_FMT_NV12,
.depth = 8,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_NV12,
.size_multiplier_x2 = 3,
}, {
.fourcc = V4L2_PIX_FMT_NV21,
.depth = 8,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_NV21,
.size_multiplier_x2 = 3,
}, {
.fourcc = V4L2_PIX_FMT_RGB565,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_RGB16,
.size_multiplier_x2 = 2,
}, {
.fourcc = V4L2_PIX_FMT_YUYV,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_YUYV,
.size_multiplier_x2 = 2,
}, {
.fourcc = V4L2_PIX_FMT_UYVY,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_UYVY,
.size_multiplier_x2 = 2,
}, {
.fourcc = V4L2_PIX_FMT_YVYU,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_YVYU,
.size_multiplier_x2 = 2,
}, {
.fourcc = V4L2_PIX_FMT_VYUY,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_VYUY,
.size_multiplier_x2 = 2,
@ -222,21 +231,21 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* RGB formats */
.fourcc = V4L2_PIX_FMT_RGB24,
.depth = 24,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_RGB24,
.size_multiplier_x2 = 2,
}, {
.fourcc = V4L2_PIX_FMT_BGR24,
.depth = 24,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BGR24,
.size_multiplier_x2 = 2,
}, {
.fourcc = V4L2_PIX_FMT_BGR32,
.depth = 32,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BGRA,
.size_multiplier_x2 = 2,
@ -252,7 +261,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 8 bit */
.fourcc = V4L2_PIX_FMT_SRGGB8,
.depth = 8,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SRGGB8,
.size_multiplier_x2 = 2,
@ -260,7 +269,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SBGGR8,
.depth = 8,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SBGGR8,
.size_multiplier_x2 = 2,
@ -268,7 +277,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGRBG8,
.depth = 8,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGRBG8,
.size_multiplier_x2 = 2,
@ -276,7 +285,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGBRG8,
.depth = 8,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGBRG8,
.size_multiplier_x2 = 2,
@ -285,7 +294,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 10 bit */
.fourcc = V4L2_PIX_FMT_SRGGB10P,
.depth = 10,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SRGGB10P,
.size_multiplier_x2 = 2,
@ -293,7 +302,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SBGGR10P,
.depth = 10,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SBGGR10P,
.size_multiplier_x2 = 2,
@ -301,7 +310,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGRBG10P,
.depth = 10,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGRBG10P,
.size_multiplier_x2 = 2,
@ -309,7 +318,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGBRG10P,
.depth = 10,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGBRG10P,
.size_multiplier_x2 = 2,
@ -318,7 +327,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 12 bit */
.fourcc = V4L2_PIX_FMT_SRGGB12P,
.depth = 12,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SRGGB12P,
.size_multiplier_x2 = 2,
@ -326,7 +335,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SBGGR12P,
.depth = 12,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SBGGR12P,
.size_multiplier_x2 = 2,
@ -334,7 +343,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGRBG12P,
.depth = 12,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGRBG12P,
.size_multiplier_x2 = 2,
@ -342,7 +351,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGBRG12P,
.depth = 12,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGBRG12P,
.size_multiplier_x2 = 2,
@ -351,7 +360,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 14 bit */
.fourcc = V4L2_PIX_FMT_SRGGB14P,
.depth = 14,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SRGGB14P,
.size_multiplier_x2 = 2,
@ -359,7 +368,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SBGGR14P,
.depth = 14,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SBGGR14P,
.size_multiplier_x2 = 2,
@ -368,7 +377,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGRBG14P,
.depth = 14,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGRBG14P,
.size_multiplier_x2 = 2,
@ -376,7 +385,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGBRG14P,
.depth = 14,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGBRG14P,
.size_multiplier_x2 = 2,
@ -385,7 +394,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 16 bit */
.fourcc = V4L2_PIX_FMT_SRGGB16,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SRGGB16,
.size_multiplier_x2 = 2,
@ -393,7 +402,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SBGGR16,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SBGGR16,
.size_multiplier_x2 = 2,
@ -401,7 +410,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGRBG16,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGRBG16,
.size_multiplier_x2 = 2,
@ -409,7 +418,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGBRG16,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGBRG16,
.size_multiplier_x2 = 2,
@ -419,7 +428,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 10 bit */
.fourcc = V4L2_PIX_FMT_SRGGB10,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SRGGB10,
.size_multiplier_x2 = 2,
@ -427,7 +436,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SBGGR10,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SBGGR10,
.size_multiplier_x2 = 2,
@ -435,7 +444,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGRBG10,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGRBG10,
.size_multiplier_x2 = 2,
@ -443,7 +452,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGBRG10,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGBRG10,
.size_multiplier_x2 = 2,
@ -452,7 +461,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 12 bit */
.fourcc = V4L2_PIX_FMT_SRGGB12,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SRGGB12,
.size_multiplier_x2 = 2,
@ -460,7 +469,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SBGGR12,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SBGGR12,
.size_multiplier_x2 = 2,
@ -468,7 +477,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGRBG12,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGRBG12,
.size_multiplier_x2 = 2,
@ -476,7 +485,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGBRG12,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGBRG12,
.size_multiplier_x2 = 2,
@ -485,7 +494,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 14 bit */
.fourcc = V4L2_PIX_FMT_SRGGB14,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SRGGB14,
.size_multiplier_x2 = 2,
@ -493,7 +502,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SBGGR14,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SBGGR14,
.size_multiplier_x2 = 2,
@ -501,7 +510,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGRBG14,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGRBG14,
.size_multiplier_x2 = 2,
@ -509,7 +518,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
}, {
.fourcc = V4L2_PIX_FMT_SGBRG14,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_BAYER_SGBRG14,
.size_multiplier_x2 = 2,
@ -519,7 +528,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 8 bit */
.fourcc = V4L2_PIX_FMT_GREY,
.depth = 8,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_GREY,
.size_multiplier_x2 = 2,
@ -527,7 +536,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 10 bit */
.fourcc = V4L2_PIX_FMT_Y10P,
.depth = 10,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_Y10P,
.size_multiplier_x2 = 2,
@ -535,7 +544,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 12 bit */
.fourcc = V4L2_PIX_FMT_Y12P,
.depth = 12,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_Y12P,
.size_multiplier_x2 = 2,
@ -543,7 +552,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 14 bit */
.fourcc = V4L2_PIX_FMT_Y14P,
.depth = 14,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_Y14P,
.size_multiplier_x2 = 2,
@ -551,7 +560,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 16 bit */
.fourcc = V4L2_PIX_FMT_Y16,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_Y16,
.size_multiplier_x2 = 2,
@ -559,7 +568,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 10 bit as 16bpp */
.fourcc = V4L2_PIX_FMT_Y10,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_Y10,
.size_multiplier_x2 = 2,
@ -567,7 +576,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 12 bit as 16bpp */
.fourcc = V4L2_PIX_FMT_Y12,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_Y12,
.size_multiplier_x2 = 2,
@ -575,7 +584,7 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
/* 14 bit as 16bpp */
.fourcc = V4L2_PIX_FMT_Y14,
.depth = 16,
.bytesperline_align = { 32, 32, 32, 32 },
.bytesperline_align = { 32, 32, 32, 32, 32 },
.flags = 0,
.mmal_fmt = MMAL_ENCODING_Y14,
.size_multiplier_x2 = 2,
@ -585,6 +594,11 @@ static const struct bcm2835_codec_fmt supported_formats[] = {
.depth = 0,
.flags = V4L2_FMT_FLAG_COMPRESSED,
.mmal_fmt = MMAL_ENCODING_H264,
}, {
.fourcc = V4L2_PIX_FMT_JPEG,
.depth = 0,
.flags = V4L2_FMT_FLAG_COMPRESSED,
.mmal_fmt = MMAL_ENCODING_JPEG,
}, {
.fourcc = V4L2_PIX_FMT_MJPEG,
.depth = 0,
@ -705,6 +719,7 @@ struct bcm2835_codec_driver {
struct bcm2835_codec_dev *decode;
struct bcm2835_codec_dev *isp;
struct bcm2835_codec_dev *deinterlace;
struct bcm2835_codec_dev *encode_image;
};
enum {
@ -838,6 +853,9 @@ static inline unsigned int get_sizeimage(int bpl, int width, int height,
struct bcm2835_codec_fmt *fmt)
{
if (fmt->flags & V4L2_FMT_FLAG_COMPRESSED) {
if (fmt->fourcc == V4L2_PIX_FMT_JPEG)
return DEF_COMP_BUF_SIZE_JPEG;
if (width * height > 1280 * 720)
return DEF_COMP_BUF_SIZE_GREATER_720P;
else
@ -1422,12 +1440,12 @@ static int vidioc_try_fmt(struct bcm2835_codec_ctx *ctx, struct v4l2_format *f,
f->fmt.pix_mp.height = MIN_H;
/*
* For decoders the buffer must have a vertical alignment of 16
* lines.
* For decoders and image encoders the buffer must have
* a vertical alignment of 16 lines.
* The selection will reflect any cropping rectangle when only
* some of the pixels are active.
*/
if (ctx->dev->role == DECODE)
if (ctx->dev->role == DECODE || ctx->dev->role == ENCODE_IMAGE)
f->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, 16);
}
f->fmt.pix_mp.num_planes = 1;
@ -1573,12 +1591,13 @@ static int vidioc_s_fmt(struct bcm2835_codec_ctx *ctx, struct v4l2_format *f,
v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "Calculated bpl as %u, size %u\n",
q_data->bytesperline, q_data->sizeimage);
if (ctx->dev->role == DECODE &&
if ((ctx->dev->role == DECODE || ctx->dev->role == ENCODE_IMAGE) &&
q_data->fmt->flags & V4L2_FMT_FLAG_COMPRESSED &&
q_data->crop_width && q_data->height) {
/*
* On the decoder, if provided with a resolution on the input
* side, then replicate that to the output side.
* On the decoder or image encoder, if provided with
* a resolution on the input side, then replicate that
* to the output side.
* GStreamer appears not to support V4L2_EVENT_SOURCE_CHANGE,
* nor set up a resolution on the output side, therefore
* we can't decode anything at a resolution other than the
@ -1719,7 +1738,7 @@ static int vidioc_g_selection(struct file *file, void *priv,
switch (s->type) {
case V4L2_BUF_TYPE_VIDEO_CAPTURE:
/* CAPTURE on encoder is not valid. */
if (ctx->dev->role == ENCODE)
if (ctx->dev->role == ENCODE || ctx->dev->role == ENCODE_IMAGE)
return -EINVAL;
q_data = &ctx->q_data[V4L2_M2M_DST];
break;
@ -1762,6 +1781,7 @@ static int vidioc_g_selection(struct file *file, void *priv,
}
break;
case ENCODE:
case ENCODE_IMAGE:
switch (s->target) {
case V4L2_SEL_TGT_CROP_DEFAULT:
case V4L2_SEL_TGT_CROP_BOUNDS:
@ -1846,7 +1866,7 @@ static int vidioc_s_selection(struct file *file, void *priv,
switch (s->type) {
case V4L2_BUF_TYPE_VIDEO_CAPTURE:
/* CAPTURE on encoder is not valid. */
if (ctx->dev->role == ENCODE)
if (ctx->dev->role == ENCODE || ctx->dev->role == ENCODE_IMAGE)
return -EINVAL;
q_data = &ctx->q_data[V4L2_M2M_DST];
break;
@ -1882,6 +1902,7 @@ static int vidioc_s_selection(struct file *file, void *priv,
}
break;
case ENCODE:
case ENCODE_IMAGE:
switch (s->target) {
case V4L2_SEL_TGT_CROP:
/* Only support crop from (0,0) */
@ -2266,6 +2287,16 @@ static int bcm2835_codec_s_ctrl(struct v4l2_ctrl *ctrl)
sizeof(u32_value));
break;
}
case V4L2_CID_JPEG_COMPRESSION_QUALITY:
if (!ctx->component)
break;
ret = vchiq_mmal_port_parameter_set(ctx->dev->instance,
&ctx->component->output[0],
MMAL_PARAMETER_JPEG_Q_FACTOR,
&ctrl->val,
sizeof(ctrl->val));
break;
default:
v4l2_err(&ctx->dev->v4l2_dev, "Invalid control\n");
@ -2364,7 +2395,7 @@ static int vidioc_try_encoder_cmd(struct file *file, void *priv,
{
struct bcm2835_codec_ctx *ctx = file2ctx(file);
if (ctx->dev->role != ENCODE)
if (ctx->dev->role != ENCODE && ctx->dev->role != ENCODE_IMAGE)
return -EINVAL;
switch (cmd->cmd) {
@ -2567,6 +2598,20 @@ static int bcm2835_codec_create_component(struct bcm2835_codec_ctx *ctx)
MMAL_PARAMETER_IMAGE_EFFECT_PARAMETERS,
&params,
sizeof(params));
} else if (dev->role == ENCODE_IMAGE) {
enable = 0;
vchiq_mmal_port_parameter_set(dev->instance,
&ctx->component->control,
MMAL_PARAMETER_EXIF_DISABLE,
&enable,
sizeof(enable));
enable = 1;
vchiq_mmal_port_parameter_set(dev->instance,
&ctx->component->output[0],
MMAL_PARAMETER_JPEG_IJG_SCALING,
&enable,
sizeof(enable));
}
setup_mmal_port_format(ctx, &ctx->q_data[V4L2_M2M_SRC],
@ -2595,7 +2640,7 @@ static int bcm2835_codec_create_component(struct bcm2835_codec_ctx *ctx)
goto destroy_component;
}
if (dev->role == ENCODE) {
if (dev->role == ENCODE || dev->role == ENCODE_IMAGE) {
u32 param = 1;
if (ctx->q_data[V4L2_M2M_SRC].sizeimage <
@ -2604,27 +2649,29 @@ static int bcm2835_codec_create_component(struct bcm2835_codec_ctx *ctx)
ctx->q_data[V4L2_M2M_SRC].sizeimage,
ctx->component->output[0].minimum_buffer.size);
/* Enable SPS Timing header so framerate information is encoded
* in the H264 header.
*/
vchiq_mmal_port_parameter_set(ctx->dev->instance,
&ctx->component->output[0],
MMAL_PARAMETER_VIDEO_ENCODE_SPS_TIMING,
&param, sizeof(param));
if (dev->role == ENCODE) {
/* Enable SPS Timing header so framerate information is encoded
* in the H264 header.
*/
vchiq_mmal_port_parameter_set(ctx->dev->instance,
&ctx->component->output[0],
MMAL_PARAMETER_VIDEO_ENCODE_SPS_TIMING,
&param, sizeof(param));
/* Enable inserting headers into the first frame */
vchiq_mmal_port_parameter_set(ctx->dev->instance,
&ctx->component->control,
MMAL_PARAMETER_VIDEO_ENCODE_HEADERS_WITH_FRAME,
&param, sizeof(param));
/*
* Avoid fragmenting the buffers over multiple frames (unless
* the frame is bigger than the whole buffer)
*/
vchiq_mmal_port_parameter_set(ctx->dev->instance,
&ctx->component->control,
MMAL_PARAMETER_MINIMISE_FRAGMENTATION,
&param, sizeof(param));
/* Enable inserting headers into the first frame */
vchiq_mmal_port_parameter_set(ctx->dev->instance,
&ctx->component->control,
MMAL_PARAMETER_VIDEO_ENCODE_HEADERS_WITH_FRAME,
&param, sizeof(param));
/*
* Avoid fragmenting the buffers over multiple frames (unless
* the frame is bigger than the whole buffer)
*/
vchiq_mmal_port_parameter_set(ctx->dev->instance,
&ctx->component->control,
MMAL_PARAMETER_MINIMISE_FRAGMENTATION,
&param, sizeof(param));
}
} else {
if (ctx->q_data[V4L2_M2M_DST].sizeimage <
ctx->component->output[0].minimum_buffer.size)
@ -3248,6 +3295,23 @@ static int bcm2835_codec_open(struct file *file)
v4l2_ctrl_handler_init(hdl, 0);
}
break;
case ENCODE_IMAGE:
{
/* Encode image controls */
v4l2_ctrl_handler_init(hdl, 1);
v4l2_ctrl_new_std(hdl, &bcm2835_codec_ctrl_ops,
V4L2_CID_JPEG_COMPRESSION_QUALITY,
1, 100,
1, 80);
if (hdl->error) {
rc = hdl->error;
goto free_ctrl_handler;
}
ctx->fh.ctrl_handler = hdl;
v4l2_ctrl_handler_setup(hdl);
}
break;
case NUM_ROLES:
break;
}
@ -3527,6 +3591,12 @@ static int bcm2835_codec_create(struct bcm2835_codec_driver *drv,
function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER;
video_nr = deinterlace_video_nr;
break;
case ENCODE_IMAGE:
v4l2_disable_ioctl(vfd, VIDIOC_DECODER_CMD);
v4l2_disable_ioctl(vfd, VIDIOC_TRY_DECODER_CMD);
function = MEDIA_ENT_F_PROC_VIDEO_ENCODER;
video_nr = encode_image_nr;
break;
default:
ret = -EINVAL;
goto unreg_dev;
@ -3626,6 +3696,10 @@ static int bcm2835_codec_probe(struct platform_device *pdev)
if (ret)
goto out;
ret = bcm2835_codec_create(drv, &drv->encode_image, ENCODE_IMAGE);
if (ret)
goto out;
/* Register the media device node */
if (media_device_register(mdev) < 0)
goto out;
@ -3635,6 +3709,10 @@ static int bcm2835_codec_probe(struct platform_device *pdev)
return 0;
out:
if (drv->encode_image) {
bcm2835_codec_destroy(drv->encode_image);
drv->encode_image = NULL;
}
if (drv->deinterlace) {
bcm2835_codec_destroy(drv->deinterlace);
drv->deinterlace = NULL;
@ -3660,6 +3738,8 @@ static int bcm2835_codec_remove(struct platform_device *pdev)
media_device_unregister(&drv->mdev);
bcm2835_codec_destroy(drv->encode_image);
bcm2835_codec_destroy(drv->deinterlace);
bcm2835_codec_destroy(drv->isp);

2
drivers/staging/vc04_services/vchiq-mmal/mmal-parameters.h
View File

@ -279,6 +279,8 @@ enum mmal_parameter_camera_type {
MMAL_PARAMETER_GAMMA,
/**< Takes a @ref MMAL_PARAMETER_CDN_T */
MMAL_PARAMETER_CDN,
/**< Takes a @ref MMAL_PARAMETER_BOOLEAN_T */
MMAL_PARAMETER_JPEG_IJG_SCALING,
};
struct mmal_parameter_rational {