diff --git a/arch/Kconfig b/arch/Kconfig index 8df1c71026..d1e69d6e84 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1234,6 +1234,9 @@ config RELR config ARCH_HAS_MEM_ENCRYPT bool +config ARCH_HAS_CC_PLATFORM + bool + config HAVE_SPARSE_SYSCALL_NR bool help diff --git a/arch/arc/kernel/process.c b/arch/arc/kernel/process.c index 3793876f42..8e90052f6f 100644 --- a/arch/arc/kernel/process.c +++ b/arch/arc/kernel/process.c @@ -294,7 +294,7 @@ int elf_check_arch(const struct elf32_hdr *x) eflags = x->e_flags; if ((eflags & EF_ARC_OSABI_MSK) != EF_ARC_OSABI_CURRENT) { pr_err("ABI mismatch - you need newer toolchain\n"); - force_sigsegv(SIGSEGV); + force_fatal_sig(SIGSEGV); return 0; } diff --git a/arch/h8300/Kbuild b/arch/h8300/Kbuild index e4703f3534..b2583e7efb 100644 --- a/arch/h8300/Kbuild +++ b/arch/h8300/Kbuild @@ -1,5 +1,2 @@ # SPDX-License-Identifier: GPL-2.0-only obj-y += kernel/ mm/ boot/dts/ - -# for cleaning -subdir- += boot diff --git a/arch/h8300/Makefile b/arch/h8300/Makefile index 807f41e60e..eb4cb8f683 100644 --- a/arch/h8300/Makefile +++ b/arch/h8300/Makefile @@ -34,6 +34,9 @@ libs-y += arch/$(ARCH)/lib/ boot := arch/h8300/boot +archclean: + $(Q)$(MAKE) $(clean)=$(boot) + vmlinux.srec vmlinux.bin zImage uImage.bin: vmlinux $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ diff --git a/arch/h8300/boot/compressed/Makefile b/arch/h8300/boot/compressed/Makefile index 6ab2fa5ba1..5942793f77 100644 --- a/arch/h8300/boot/compressed/Makefile +++ b/arch/h8300/boot/compressed/Makefile @@ -30,11 +30,9 @@ $(obj)/vmlinux.bin: vmlinux FORCE suffix-$(CONFIG_KERNEL_GZIP) := gzip suffix-$(CONFIG_KERNEL_LZO) := lzo -compress-$(CONFIG_KERNEL_GZIP) := gzip -compress-$(CONFIG_KERNEL_LZO) := lzo_with_size $(obj)/vmlinux.bin.$(suffix-y): $(obj)/vmlinux.bin FORCE - $(call if_changed,$(compress-y)) + $(call if_changed,$(suffix-y)) LDFLAGS_piggy.o := -r --format binary --oformat elf32-h8300-linux -T OBJCOPYFLAGS := -O binary diff --git a/arch/h8300/boot/dts/Makefile b/arch/h8300/boot/dts/Makefile index c36bbd1f25..69fcd81789 100644 --- a/arch/h8300/boot/dts/Makefile +++ b/arch/h8300/boot/dts/Makefile @@ -1,5 +1,9 @@ # SPDX-License-Identifier: GPL-2.0 -obj-y += $(addsuffix .dtb.o, $(CONFIG_H8300_BUILTIN_DTB)) +ifneq '$(CONFIG_H8300_BUILTIN_DTB)' '""' +BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_H8300_BUILTIN_DTB)).dtb.o +endif + +obj-y += $(BUILTIN_DTB) dtb-$(CONFIG_H8300H_SIM) := h8300h_sim.dtb dtb-$(CONFIG_H8S_SIM) := h8s_sim.dtb diff --git a/arch/h8300/include/asm/bitops.h b/arch/h8300/include/asm/bitops.h index 4489e3d6ed..c867a80cab 100644 --- a/arch/h8300/include/asm/bitops.h +++ b/arch/h8300/include/asm/bitops.h @@ -168,6 +168,7 @@ static inline unsigned long __ffs(unsigned long word) return result; } +#include #include #include #include diff --git a/arch/h8300/include/asm/irq.h b/arch/h8300/include/asm/irq.h index 776cf06d7a..5fc5b436dd 100644 --- a/arch/h8300/include/asm/irq.h +++ b/arch/h8300/include/asm/irq.h @@ -2,6 +2,8 @@ #ifndef _H8300_IRQ_H_ #define _H8300_IRQ_H_ +#include + #if defined(CONFIG_CPU_H8300H) #define NR_IRQS 64 #define IRQ_CHIP h8300h_irq_chip diff --git a/arch/h8300/include/asm/processor.h b/arch/h8300/include/asm/processor.h index 141a23eb62..a060b41b2d 100644 --- a/arch/h8300/include/asm/processor.h +++ b/arch/h8300/include/asm/processor.h @@ -105,7 +105,7 @@ static inline void release_thread(struct task_struct *dead_task) { } -unsigned long __get_wchan(struct task_struct *p); +unsigned long get_wchan(struct task_struct *p); #define KSTK_EIP(tsk) \ ({ \ diff --git a/arch/h8300/kernel/irq.c b/arch/h8300/kernel/irq.c index 8ad6d702cd..834e4d7b1b 100644 --- a/arch/h8300/kernel/irq.c +++ b/arch/h8300/kernel/irq.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/h8300/kernel/process.c b/arch/h8300/kernel/process.c index 8833fa4f5d..2ac27e4248 100644 --- a/arch/h8300/kernel/process.c +++ b/arch/h8300/kernel/process.c @@ -128,12 +128,15 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, return 0; } -unsigned long __get_wchan(struct task_struct *p) +unsigned long get_wchan(struct task_struct *p) { unsigned long fp, pc; unsigned long stack_page; int count = 0; + if (!p || p == current || task_is_running(p)) + return 0; + stack_page = (unsigned long)p; fp = ((struct pt_regs *)p->thread.ksp)->er6; do { diff --git a/arch/h8300/kernel/traps.c b/arch/h8300/kernel/traps.c index a92c39e038..bdbe988d8d 100644 --- a/arch/h8300/kernel/traps.c +++ b/arch/h8300/kernel/traps.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include @@ -107,7 +106,7 @@ void die(const char *str, struct pt_regs *fp, unsigned long err) dump(fp); spin_unlock_irq(&die_lock); - make_task_dead(SIGSEGV); + do_exit(SIGSEGV); } static int kstack_depth_to_print = 24; diff --git a/arch/h8300/mm/fault.c b/arch/h8300/mm/fault.c index b465441f49..d4bc9c16f2 100644 --- a/arch/h8300/mm/fault.c +++ b/arch/h8300/mm/fault.c @@ -51,7 +51,7 @@ asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, printk(" at virtual address %08lx\n", address); if (!user_mode(regs)) die("Oops", regs, error_code); - make_task_dead(SIGKILL); + do_exit(SIGKILL); return 1; } diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index a7e01573ab..1e33666fa6 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -32,7 +32,6 @@ config IA64 select HAVE_FTRACE_MCOUNT_RECORD select HAVE_DYNAMIC_FTRACE if (!ITANIUM) select HAVE_FUNCTION_TRACER - select HAVE_SETUP_PER_CPU_AREA select TTY select HAVE_ARCH_TRACEHOOK select HAVE_VIRT_CPU_ACCOUNTING @@ -89,6 +88,9 @@ config GENERIC_CALIBRATE_DELAY bool default y +config HAVE_SETUP_PER_CPU_AREA + def_bool y + config DMI bool default y @@ -290,7 +292,6 @@ config NUMA bool "NUMA support" depends on !FLATMEM select SMP - select USE_PERCPU_NUMA_NODE_ID help Say Y to compile the kernel to support NUMA (Non-Uniform Memory Access). This option is for configuring high-end multiprocessor @@ -310,6 +311,10 @@ config HAVE_ARCH_NODEDATA_EXTENSION def_bool y depends on NUMA +config USE_PERCPU_NUMA_NODE_ID + def_bool y + depends on NUMA + config HAVE_MEMORYLESS_NODES def_bool NUMA @@ -318,7 +323,7 @@ config ARCH_PROC_KCORE_TEXT depends on PROC_KCORE config IA64_MCA_RECOVERY - bool "MCA recovery from errors other than TLB." + tristate "MCA recovery from errors other than TLB." config IA64_PALINFO tristate "/proc/pal support" diff --git a/arch/ia64/Makefile b/arch/ia64/Makefile index 3b3ac3e1f2..7e548c654a 100644 --- a/arch/ia64/Makefile +++ b/arch/ia64/Makefile @@ -67,6 +67,8 @@ vmlinux.bin: vmlinux FORCE unwcheck: vmlinux -$(Q)READELF=$(READELF) $(PYTHON3) $(srctree)/arch/ia64/scripts/unwcheck.py $< +archclean: + archheaders: $(Q)$(MAKE) $(build)=arch/ia64/kernel/syscalls all diff --git a/arch/ia64/include/asm/bitops.h b/arch/ia64/include/asm/bitops.h index 577be93c08..2f24ee6459 100644 --- a/arch/ia64/include/asm/bitops.h +++ b/arch/ia64/include/asm/bitops.h @@ -441,6 +441,8 @@ static __inline__ unsigned long __arch_hweight64(unsigned long x) #endif /* __KERNEL__ */ +#include + #ifdef __KERNEL__ #include diff --git a/arch/ia64/include/asm/processor.h b/arch/ia64/include/asm/processor.h index 45365c2ef5..2d8bcdc27d 100644 --- a/arch/ia64/include/asm/processor.h +++ b/arch/ia64/include/asm/processor.h @@ -330,7 +330,7 @@ struct task_struct; #define release_thread(dead_task) /* Get wait channel for task P. */ -extern unsigned long __get_wchan (struct task_struct *p); +extern unsigned long get_wchan (struct task_struct *p); /* Return instruction pointer of blocked task TSK. */ #define KSTK_EIP(tsk) \ diff --git a/arch/ia64/include/asm/ptrace.h b/arch/ia64/include/asm/ptrace.h index a10a498eed..0817913590 100644 --- a/arch/ia64/include/asm/ptrace.h +++ b/arch/ia64/include/asm/ptrace.h @@ -51,11 +51,6 @@ * the canonical representation by adding to instruction pointer. */ # define instruction_pointer(regs) ((regs)->cr_iip + ia64_psr(regs)->ri) -# define instruction_pointer_set(regs, val) \ -({ \ - ia64_psr(regs)->ri = (val & 0xf); \ - regs->cr_iip = (val & ~0xfULL); \ -}) static inline unsigned long user_stack_pointer(struct pt_regs *regs) { @@ -134,9 +129,9 @@ static inline long regs_return_value(struct pt_regs *regs) extern void ia64_decrement_ip (struct pt_regs *pt); extern void ia64_ptrace_stop(void); - #define arch_ptrace_stop() \ + #define arch_ptrace_stop(code, info) \ ia64_ptrace_stop() - #define arch_ptrace_stop_needed() \ + #define arch_ptrace_stop_needed(code, info) \ (!test_thread_flag(TIF_RESTORE_RSE)) extern void ptrace_attach_sync_user_rbs (struct task_struct *); diff --git a/arch/ia64/include/asm/spinlock.h b/arch/ia64/include/asm/spinlock.h index 0e5c1ad323..864775970c 100644 --- a/arch/ia64/include/asm/spinlock.h +++ b/arch/ia64/include/asm/spinlock.h @@ -124,13 +124,18 @@ static __always_inline void arch_spin_unlock(arch_spinlock_t *lock) __ticket_spin_unlock(lock); } +static __always_inline void arch_spin_lock_flags(arch_spinlock_t *lock, + unsigned long flags) +{ + arch_spin_lock(lock); +} +#define arch_spin_lock_flags arch_spin_lock_flags + #ifdef ASM_SUPPORTED static __always_inline void -arch_read_lock(arch_rwlock_t *lock) +arch_read_lock_flags(arch_rwlock_t *lock, unsigned long flags) { - unsigned long flags = 0; - __asm__ __volatile__ ( "tbit.nz p6, p0 = %1,%2\n" "br.few 3f\n" @@ -152,8 +157,13 @@ arch_read_lock(arch_rwlock_t *lock) : "p6", "p7", "r2", "memory"); } +#define arch_read_lock_flags arch_read_lock_flags +#define arch_read_lock(lock) arch_read_lock_flags(lock, 0) + #else /* !ASM_SUPPORTED */ +#define arch_read_lock_flags(rw, flags) arch_read_lock(rw) + #define arch_read_lock(rw) \ do { \ arch_rwlock_t *__read_lock_ptr = (rw); \ @@ -176,10 +186,8 @@ do { \ #ifdef ASM_SUPPORTED static __always_inline void -arch_write_lock(arch_rwlock_t *lock) +arch_write_lock_flags(arch_rwlock_t *lock, unsigned long flags) { - unsigned long flags = 0; - __asm__ __volatile__ ( "tbit.nz p6, p0 = %1, %2\n" "mov ar.ccv = r0\n" @@ -202,6 +210,9 @@ arch_write_lock(arch_rwlock_t *lock) : "ar.ccv", "p6", "p7", "r2", "r29", "memory"); } +#define arch_write_lock_flags arch_write_lock_flags +#define arch_write_lock(rw) arch_write_lock_flags(rw, 0) + #define arch_write_trylock(rw) \ ({ \ register long result; \ diff --git a/arch/ia64/include/asm/spinlock_types.h b/arch/ia64/include/asm/spinlock_types.h index 14b8a161c1..6e345fefcd 100644 --- a/arch/ia64/include/asm/spinlock_types.h +++ b/arch/ia64/include/asm/spinlock_types.h @@ -2,7 +2,7 @@ #ifndef _ASM_IA64_SPINLOCK_TYPES_H #define _ASM_IA64_SPINLOCK_TYPES_H -#ifndef __LINUX_SPINLOCK_TYPES_RAW_H +#ifndef __LINUX_SPINLOCK_TYPES_H # error "please don't include this file directly" #endif diff --git a/arch/ia64/include/asm/syscall.h b/arch/ia64/include/asm/syscall.h index 2b02a3fb86..0d23c00493 100644 --- a/arch/ia64/include/asm/syscall.h +++ b/arch/ia64/include/asm/syscall.h @@ -55,8 +55,21 @@ static inline void syscall_set_return_value(struct task_struct *task, } } -extern void syscall_get_arguments(struct task_struct *task, - struct pt_regs *regs, unsigned long *args); +extern void ia64_syscall_get_set_arguments(struct task_struct *task, + struct pt_regs *regs, unsigned long *args, int rw); +static inline void syscall_get_arguments(struct task_struct *task, + struct pt_regs *regs, + unsigned long *args) +{ + ia64_syscall_get_set_arguments(task, regs, args, 0); +} + +static inline void syscall_set_arguments(struct task_struct *task, + struct pt_regs *regs, + unsigned long *args) +{ + ia64_syscall_get_set_arguments(task, regs, args, 1); +} static inline int syscall_get_arch(struct task_struct *task) { diff --git a/arch/ia64/kernel/audit.c b/arch/ia64/kernel/audit.c index ec61f20ca6..5192ca899f 100644 --- a/arch/ia64/kernel/audit.c +++ b/arch/ia64/kernel/audit.c @@ -38,15 +38,13 @@ int audit_classify_syscall(int abi, unsigned syscall) { switch(syscall) { case __NR_open: - return AUDITSC_OPEN; + return 2; case __NR_openat: - return AUDITSC_OPENAT; + return 3; case __NR_execve: - return AUDITSC_EXECVE; - case __NR_openat2: - return AUDITSC_OPENAT2; + return 5; default: - return AUDITSC_NATIVE; + return 0; } } diff --git a/arch/ia64/kernel/ftrace.c b/arch/ia64/kernel/ftrace.c index d6360fd404..b2ab2d58fb 100644 --- a/arch/ia64/kernel/ftrace.c +++ b/arch/ia64/kernel/ftrace.c @@ -194,3 +194,9 @@ int ftrace_update_ftrace_func(ftrace_func_t func) flush_icache_range(addr, addr + 16); return 0; } + +/* run from kstop_machine */ +int __init ftrace_dyn_arch_init(void) +{ + return 0; +} diff --git a/arch/ia64/kernel/kprobes.c b/arch/ia64/kernel/kprobes.c index 1a7bab1c5d..d4048518a1 100644 --- a/arch/ia64/kernel/kprobes.c +++ b/arch/ia64/kernel/kprobes.c @@ -392,13 +392,14 @@ static void __kprobes set_current_kprobe(struct kprobe *p, __this_cpu_write(current_kprobe, p); } -void __kretprobe_trampoline(void) +static void kretprobe_trampoline(void) { } int __kprobes trampoline_probe_handler(struct kprobe *p, struct pt_regs *regs) { - regs->cr_iip = __kretprobe_trampoline_handler(regs, NULL); + regs->cr_iip = __kretprobe_trampoline_handler(regs, + dereference_function_descriptor(kretprobe_trampoline), NULL); /* * By returning a non-zero value, we are telling * kprobe_handler() that we don't want the post_handler @@ -414,7 +415,7 @@ void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, ri->fp = NULL; /* Replace the return addr with trampoline addr */ - regs->b0 = (unsigned long)dereference_function_descriptor(__kretprobe_trampoline); + regs->b0 = (unsigned long)dereference_function_descriptor(kretprobe_trampoline); } /* Check the instruction in the slot is break */ @@ -890,6 +891,11 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self, return ret; } +unsigned long arch_deref_entry_point(void *entry) +{ + return ((struct fnptr *)entry)->ip; +} + static struct kprobe trampoline_p = { .pre_handler = trampoline_probe_handler }; @@ -897,14 +903,14 @@ static struct kprobe trampoline_p = { int __init arch_init_kprobes(void) { trampoline_p.addr = - dereference_function_descriptor(__kretprobe_trampoline); + dereference_function_descriptor(kretprobe_trampoline); return register_kprobe(&trampoline_p); } int __kprobes arch_trampoline_kprobe(struct kprobe *p) { if (p->addr == - dereference_function_descriptor(__kretprobe_trampoline)) + dereference_function_descriptor(kretprobe_trampoline)) return 1; return 0; diff --git a/arch/ia64/kernel/mca_drv.c b/arch/ia64/kernel/mca_drv.c index 23c203639a..5bfc79be4c 100644 --- a/arch/ia64/kernel/mca_drv.c +++ b/arch/ia64/kernel/mca_drv.c @@ -176,7 +176,7 @@ mca_handler_bh(unsigned long paddr, void *iip, unsigned long ipsr) spin_unlock(&mca_bh_lock); /* This process is about to be killed itself */ - make_task_dead(SIGKILL); + do_exit(SIGKILL); } /** diff --git a/arch/ia64/kernel/module.c b/arch/ia64/kernel/module.c index 360f36b0eb..2cba53c1da 100644 --- a/arch/ia64/kernel/module.c +++ b/arch/ia64/kernel/module.c @@ -848,7 +848,7 @@ register_unwind_table (struct module *mod) { struct unw_table_entry *start = (void *) mod->arch.unwind->sh_addr; struct unw_table_entry *end = start + mod->arch.unwind->sh_size / sizeof (*start); - struct unw_table_entry *e1, *e2, *core, *init; + struct unw_table_entry tmp, *e1, *e2, *core, *init; unsigned long num_init = 0, num_core = 0; /* First, count how many init and core unwind-table entries there are. */ @@ -865,7 +865,9 @@ register_unwind_table (struct module *mod) for (e1 = start; e1 < end; ++e1) { for (e2 = e1 + 1; e2 < end; ++e2) { if (e2->start_offset < e1->start_offset) { - swap(*e1, *e2); + tmp = *e1; + *e1 = *e2; + *e2 = tmp; } } } diff --git a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c index 834df24a88..e56d63f4ab 100644 --- a/arch/ia64/kernel/process.c +++ b/arch/ia64/kernel/process.c @@ -523,12 +523,15 @@ exit_thread (struct task_struct *tsk) } unsigned long -__get_wchan (struct task_struct *p) +get_wchan (struct task_struct *p) { struct unw_frame_info info; unsigned long ip; int count = 0; + if (!p || p == current || task_is_running(p)) + return 0; + /* * Note: p may not be a blocked task (it could be current or * another process running on some other CPU. Rather than diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c index 6a1439eaa0..df28c7dd16 100644 --- a/arch/ia64/kernel/ptrace.c +++ b/arch/ia64/kernel/ptrace.c @@ -2001,16 +2001,17 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *tsk) return &user_ia64_view; } -struct syscall_get_args { +struct syscall_get_set_args { unsigned int i; unsigned int n; unsigned long *args; struct pt_regs *regs; + int rw; }; -static void syscall_get_args_cb(struct unw_frame_info *info, void *data) +static void syscall_get_set_args_cb(struct unw_frame_info *info, void *data) { - struct syscall_get_args *args = data; + struct syscall_get_set_args *args = data; struct pt_regs *pt = args->regs; unsigned long *krbs, cfm, ndirty, nlocals, nouts; int i, count; @@ -2041,31 +2042,37 @@ static void syscall_get_args_cb(struct unw_frame_info *info, void *data) /* Iterate over outs. */ for (i = 0; i < count; i++) { int j = ndirty + nlocals + i + args->i; - args->args[i] = *ia64_rse_skip_regs(krbs, j); + if (args->rw) + *ia64_rse_skip_regs(krbs, j) = args->args[i]; + else + args->args[i] = *ia64_rse_skip_regs(krbs, j); } - while (i < args->n) { - args->args[i] = 0; - i++; + if (!args->rw) { + while (i < args->n) { + args->args[i] = 0; + i++; + } } } -void syscall_get_arguments(struct task_struct *task, - struct pt_regs *regs, unsigned long *args) +void ia64_syscall_get_set_arguments(struct task_struct *task, + struct pt_regs *regs, unsigned long *args, int rw) { - struct syscall_get_args data = { + struct syscall_get_set_args data = { .i = 0, .n = 6, .args = args, .regs = regs, + .rw = rw, }; if (task == current) - unw_init_running(syscall_get_args_cb, &data); + unw_init_running(syscall_get_set_args_cb, &data); else { struct unw_frame_info ufi; memset(&ufi, 0, sizeof(ufi)); unw_init_from_blocked_task(&ufi, task); - syscall_get_args_cb(&ufi, &data); + syscall_get_set_args_cb(&ufi, &data); } } diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c index 5010348fa2..31fb84de2d 100644 --- a/arch/ia64/kernel/setup.c +++ b/arch/ia64/kernel/setup.c @@ -208,7 +208,10 @@ sort_regions (struct rsvd_region *rsvd_region, int max) while (max--) { for (j = 0; j < max; ++j) { if (rsvd_region[j].start > rsvd_region[j+1].start) { - swap(rsvd_region[j], rsvd_region[j + 1]); + struct rsvd_region tmp; + tmp = rsvd_region[j]; + rsvd_region[j] = rsvd_region[j + 1]; + rsvd_region[j + 1] = tmp; } } } diff --git a/arch/ia64/kernel/syscalls/syscall.tbl b/arch/ia64/kernel/syscalls/syscall.tbl index 78b1d03e86..6fea1844fb 100644 --- a/arch/ia64/kernel/syscalls/syscall.tbl +++ b/arch/ia64/kernel/syscalls/syscall.tbl @@ -369,5 +369,3 @@ 446 common landlock_restrict_self sys_landlock_restrict_self # 447 reserved for memfd_secret 448 common process_mrelease sys_process_mrelease -449 common futex_waitv sys_futex_waitv -450 common set_mempolicy_home_node sys_set_mempolicy_home_node diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c index e4992917a2..3639e0a7cb 100644 --- a/arch/ia64/kernel/topology.c +++ b/arch/ia64/kernel/topology.c @@ -264,7 +264,6 @@ static struct attribute * cache_default_attrs[] = { &shared_cpu_map.attr, NULL }; -ATTRIBUTE_GROUPS(cache_default); #define to_object(k) container_of(k, struct cache_info, kobj) #define to_attr(a) container_of(a, struct cache_attr, attr) @@ -285,7 +284,7 @@ static const struct sysfs_ops cache_sysfs_ops = { static struct kobj_type cache_ktype = { .sysfs_ops = &cache_sysfs_ops, - .default_groups = cache_default_groups, + .default_attrs = cache_default_attrs, }; static struct kobj_type cache_ktype_percpu_entry = { diff --git a/arch/ia64/kernel/traps.c b/arch/ia64/kernel/traps.c index 753642366e..e13cb90593 100644 --- a/arch/ia64/kernel/traps.c +++ b/arch/ia64/kernel/traps.c @@ -85,7 +85,7 @@ die (const char *str, struct pt_regs *regs, long err) if (panic_on_oops) panic("Fatal exception"); - make_task_dead(SIGSEGV); + do_exit(SIGSEGV); return 0; } diff --git a/arch/ia64/kernel/uncached.c b/arch/ia64/kernel/uncached.c index 816803636a..51883a66ae 100644 --- a/arch/ia64/kernel/uncached.c +++ b/arch/ia64/kernel/uncached.c @@ -171,7 +171,7 @@ static int uncached_add_chunk(struct uncached_pool *uc_pool, int nid) * @n_pages: number of contiguous pages to allocate * * Allocate the specified number of contiguous uncached pages on the - * requested node. If not enough contiguous uncached pages are available + * the requested node. If not enough contiguous uncached pages are available * on the requested node, roundrobin starting with the next higher node. */ unsigned long uncached_alloc_page(int starting_nid, int n_pages) diff --git a/arch/ia64/mm/contig.c b/arch/ia64/mm/contig.c index 24901d8093..42e025cfbd 100644 --- a/arch/ia64/mm/contig.c +++ b/arch/ia64/mm/contig.c @@ -153,7 +153,7 @@ find_memory (void) efi_memmap_walk(find_max_min_low_pfn, NULL); max_pfn = max_low_pfn; - memblock_add_node(0, PFN_PHYS(max_low_pfn), 0, MEMBLOCK_NONE); + memblock_add_node(0, PFN_PHYS(max_low_pfn), 0); find_initrd(); diff --git a/arch/ia64/mm/fault.c b/arch/ia64/mm/fault.c index 07379d1a22..02de2e70c5 100644 --- a/arch/ia64/mm/fault.c +++ b/arch/ia64/mm/fault.c @@ -156,15 +156,17 @@ ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *re BUG(); } - if (fault & VM_FAULT_RETRY) { - flags |= FAULT_FLAG_TRIED; + if (flags & FAULT_FLAG_ALLOW_RETRY) { + if (fault & VM_FAULT_RETRY) { + flags |= FAULT_FLAG_TRIED; - /* No need to mmap_read_unlock(mm) as we would - * have already released it in __lock_page_or_retry - * in mm/filemap.c. - */ + /* No need to mmap_read_unlock(mm) as we would + * have already released it in __lock_page_or_retry + * in mm/filemap.c. + */ - goto retry; + goto retry; + } } mmap_read_unlock(mm); @@ -257,7 +259,7 @@ ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *re regs = NULL; bust_spinlocks(0); if (regs) - make_task_dead(SIGKILL); + do_exit(SIGKILL); return; out_of_memory: diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c index 5d165607bf..5c6da8d83c 100644 --- a/arch/ia64/mm/init.c +++ b/arch/ia64/mm/init.c @@ -378,7 +378,7 @@ int __init register_active_ranges(u64 start, u64 len, int nid) #endif if (start < end) - memblock_add_node(__pa(start), end - start, nid, MEMBLOCK_NONE); + memblock_add_node(__pa(start), end - start, nid); return 0; } diff --git a/arch/microblaze/Kbuild b/arch/microblaze/Kbuild index 077a0b8e96..a1c5978893 100644 --- a/arch/microblaze/Kbuild +++ b/arch/microblaze/Kbuild @@ -3,6 +3,3 @@ obj-y += kernel/ obj-y += mm/ obj-$(CONFIG_PCI) += pci/ obj-y += boot/dts/ - -# for cleaning -subdir- += boot diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile index 1826d9ce44..9adc6b6434 100644 --- a/arch/microblaze/Makefile +++ b/arch/microblaze/Makefile @@ -5,10 +5,10 @@ UTS_SYSNAME = -DUTS_SYSNAME=\"Linux\" # What CPU version are we building for, and crack it open # as major.minor.rev -CPU_VER := $(CONFIG_XILINX_MICROBLAZE0_HW_VER) -CPU_MAJOR := $(word 1, $(subst ., , $(CPU_VER))) -CPU_MINOR := $(word 2, $(subst ., , $(CPU_VER))) -CPU_REV := $(word 3, $(subst ., , $(CPU_VER))) +CPU_VER := $(shell echo $(CONFIG_XILINX_MICROBLAZE0_HW_VER)) +CPU_MAJOR := $(shell echo $(CPU_VER) | cut -d '.' -f 1) +CPU_MINOR := $(shell echo $(CPU_VER) | cut -d '.' -f 2) +CPU_REV := $(shell echo $(CPU_VER) | cut -d '.' -f 3) export CPU_VER CPU_MAJOR CPU_MINOR CPU_REV @@ -60,6 +60,9 @@ export DTB all: linux.bin +archclean: + $(Q)$(MAKE) $(clean)=$(boot) + archheaders: $(Q)$(MAKE) $(build)=arch/microblaze/kernel/syscalls all diff --git a/arch/microblaze/boot/dts/system.dts b/arch/microblaze/boot/dts/system.dts index 22252451ec..b7ee105677 100644 --- a/arch/microblaze/boot/dts/system.dts +++ b/arch/microblaze/boot/dts/system.dts @@ -347,7 +347,12 @@ xps_timer_1: timer@83c00000 { interrupts = < 3 2 >; reg = < 0x83c00000 0x10000 >; xlnx,count-width = <0x20>; + xlnx,family = "virtex5"; + xlnx,gen0-assert = <0x1>; + xlnx,gen1-assert = <0x1>; xlnx,one-timer-only = <0x0>; + xlnx,trig0-assert = <0x1>; + xlnx,trig1-assert = <0x1>; } ; } ; } ; diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h index 7e9e92670d..06c6e49359 100644 --- a/arch/microblaze/include/asm/processor.h +++ b/arch/microblaze/include/asm/processor.h @@ -68,7 +68,7 @@ static inline void release_thread(struct task_struct *dead_task) { } -unsigned long __get_wchan(struct task_struct *p); +unsigned long get_wchan(struct task_struct *p); /* The size allocated for kernel stacks. This _must_ be a power of two! */ # define KERNEL_STACK_SIZE 0x2000 diff --git a/arch/microblaze/include/asm/syscall.h b/arch/microblaze/include/asm/syscall.h index 5eb3f624cc..3a6924f3cb 100644 --- a/arch/microblaze/include/asm/syscall.h +++ b/arch/microblaze/include/asm/syscall.h @@ -58,6 +58,28 @@ static inline microblaze_reg_t microblaze_get_syscall_arg(struct pt_regs *regs, return ~0; } +static inline void microblaze_set_syscall_arg(struct pt_regs *regs, + unsigned int n, + unsigned long val) +{ + switch (n) { + case 5: + regs->r10 = val; + case 4: + regs->r9 = val; + case 3: + regs->r8 = val; + case 2: + regs->r7 = val; + case 1: + regs->r6 = val; + case 0: + regs->r5 = val; + default: + BUG(); + } +} + static inline void syscall_get_arguments(struct task_struct *task, struct pt_regs *regs, unsigned long *args) @@ -69,6 +91,17 @@ static inline void syscall_get_arguments(struct task_struct *task, *args++ = microblaze_get_syscall_arg(regs, i++); } +static inline void syscall_set_arguments(struct task_struct *task, + struct pt_regs *regs, + const unsigned long *args) +{ + unsigned int i = 0; + unsigned int n = 6; + + while (n--) + microblaze_set_syscall_arg(regs, i++, *args++); +} + asmlinkage unsigned long do_syscall_trace_enter(struct pt_regs *regs); asmlinkage void do_syscall_trace_leave(struct pt_regs *regs); diff --git a/arch/microblaze/kernel/exceptions.c b/arch/microblaze/kernel/exceptions.c index fd153d5fab..908788497b 100644 --- a/arch/microblaze/kernel/exceptions.c +++ b/arch/microblaze/kernel/exceptions.c @@ -44,10 +44,10 @@ void die(const char *str, struct pt_regs *fp, long err) pr_warn("Oops: %s, sig: %ld\n", str, err); show_regs(fp); spin_unlock_irq(&die_lock); - /* make_task_dead() should take care of panic'ing from an interrupt + /* do_exit() should take care of panic'ing from an interrupt * context so we don't handle it here */ - make_task_dead(err); + do_exit(err); } /* for user application debugging */ diff --git a/arch/microblaze/kernel/ftrace.c b/arch/microblaze/kernel/ftrace.c index 188749d627..224eea40e1 100644 --- a/arch/microblaze/kernel/ftrace.c +++ b/arch/microblaze/kernel/ftrace.c @@ -163,6 +163,11 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) return ret; } +int __init ftrace_dyn_arch_init(void) +{ + return 0; +} + int ftrace_update_ftrace_func(ftrace_func_t func) { unsigned long ip = (unsigned long)(&ftrace_call); diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c index 5e2b91c1e8..62aa237180 100644 --- a/arch/microblaze/kernel/process.c +++ b/arch/microblaze/kernel/process.c @@ -112,7 +112,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, unsigned long arg, return 0; } -unsigned long __get_wchan(struct task_struct *p) +unsigned long get_wchan(struct task_struct *p) { /* TBD (used by procfs) */ return 0; diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c index 23e8a9336a..fc61eb0eb8 100644 --- a/arch/microblaze/kernel/signal.c +++ b/arch/microblaze/kernel/signal.c @@ -283,7 +283,7 @@ static void do_signal(struct pt_regs *regs, int in_syscall) #ifdef DEBUG_SIG pr_info("do signal: %p %d\n", regs, in_syscall); pr_info("do signal2: %lx %lx %ld [%lx]\n", regs->pc, regs->r1, - regs->r12, read_thread_flags()); + regs->r12, current_thread_info()->flags); #endif if (get_signal(&ksig)) { diff --git a/arch/microblaze/kernel/syscalls/syscall.tbl b/arch/microblaze/kernel/syscalls/syscall.tbl index 820145e473..6b0e11362b 100644 --- a/arch/microblaze/kernel/syscalls/syscall.tbl +++ b/arch/microblaze/kernel/syscalls/syscall.tbl @@ -454,5 +454,3 @@ 446 common landlock_restrict_self sys_landlock_restrict_self # 447 reserved for memfd_secret 448 common process_mrelease sys_process_mrelease -449 common futex_waitv sys_futex_waitv -450 common set_mempolicy_home_node sys_set_mempolicy_home_node diff --git a/arch/microblaze/mm/fault.c b/arch/microblaze/mm/fault.c index a9626e6a68..b3fed2cecf 100644 --- a/arch/microblaze/mm/fault.c +++ b/arch/microblaze/mm/fault.c @@ -232,16 +232,18 @@ void do_page_fault(struct pt_regs *regs, unsigned long address, BUG(); } - if (fault & VM_FAULT_RETRY) { - flags |= FAULT_FLAG_TRIED; + if (flags & FAULT_FLAG_ALLOW_RETRY) { + if (fault & VM_FAULT_RETRY) { + flags |= FAULT_FLAG_TRIED; - /* - * No need to mmap_read_unlock(mm) as we would - * have already released it in __lock_page_or_retry - * in mm/filemap.c. - */ + /* + * No need to mmap_read_unlock(mm) as we would + * have already released it in __lock_page_or_retry + * in mm/filemap.c. + */ - goto retry; + goto retry; + } } mmap_read_unlock(mm); diff --git a/arch/microblaze/mm/pgtable.c b/arch/microblaze/mm/pgtable.c index 9f73265aad..c1833b159d 100644 --- a/arch/microblaze/mm/pgtable.c +++ b/arch/microblaze/mm/pgtable.c @@ -34,7 +34,6 @@ #include #include #include -#include #include #include @@ -172,7 +171,7 @@ void __init mapin_ram(void) for (s = 0; s < lowmem_size; s += PAGE_SIZE) { f = _PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_SHARED | _PAGE_HWEXEC; - if (!is_kernel_text(v)) + if ((char *) v < _stext || (char *) v >= _etext) f |= _PAGE_WRENABLE; else /* On the MicroBlaze, no user access diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c index 622a4867f9..557585f1be 100644 --- a/arch/microblaze/pci/pci-common.c +++ b/arch/microblaze/pci/pci-common.c @@ -587,12 +587,13 @@ static void pcibios_fixup_resources(struct pci_dev *dev) } DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources); -int pcibios_device_add(struct pci_dev *dev) +int pcibios_add_device(struct pci_dev *dev) { dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); return 0; } +EXPORT_SYMBOL(pcibios_add_device); /* * Reparent resource children of pr that conflict with res diff --git a/arch/mips/Kbuild b/arch/mips/Kbuild index 9e8071f0e5..d5d6ef9bb9 100644 --- a/arch/mips/Kbuild +++ b/arch/mips/Kbuild @@ -25,6 +25,3 @@ obj-y += vdso/ ifdef CONFIG_KVM obj-y += kvm/ endif - -# for cleaning -subdir- += boot diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms index 30193bcf9c..6e3f36c841 100644 --- a/arch/mips/Kbuild.platforms +++ b/arch/mips/Kbuild.platforms @@ -19,6 +19,7 @@ platform-$(CONFIG_MACH_LOONGSON32) += loongson32/ platform-$(CONFIG_MACH_LOONGSON64) += loongson64/ platform-$(CONFIG_MIPS_MALTA) += mti-malta/ platform-$(CONFIG_MACH_NINTENDO64) += n64/ +platform-$(CONFIG_NLM_COMMON) += netlogic/ platform-$(CONFIG_PIC32MZDA) += pic32/ platform-$(CONFIG_RALINK) += ralink/ platform-$(CONFIG_MIKROTIK_RB532) += rb532/ diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 058446f014..393eb21332 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -32,6 +32,7 @@ config MIPS select GENERIC_ATOMIC64 if !64BIT select GENERIC_CMOS_UPDATE select GENERIC_CPU_AUTOPROBE + select GENERIC_FIND_FIRST_BIT select GENERIC_GETTIMEOFDAY select GENERIC_IOMAP select GENERIC_IRQ_PROBE @@ -46,6 +47,7 @@ config MIPS select GENERIC_SMP_IDLE_THREAD select GENERIC_TIME_VSYSCALL select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT + select HANDLE_DOMAIN_IRQ select HAVE_ARCH_COMPILER_H select HAVE_ARCH_JUMP_LABEL select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT @@ -55,6 +57,7 @@ config MIPS select HAVE_ARCH_TRACEHOOK select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES select HAVE_ASM_MODVERSIONS + select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS select HAVE_CONTEXT_TRACKING select HAVE_TIF_NOHZ select HAVE_C_RECORDMCOUNT @@ -62,10 +65,7 @@ config MIPS select HAVE_DEBUG_STACKOVERFLOW select HAVE_DMA_CONTIGUOUS select HAVE_DYNAMIC_FTRACE - select HAVE_EBPF_JIT if !CPU_MICROMIPS && \ - !CPU_DADDI_WORKAROUNDS && \ - !CPU_R4000_WORKAROUNDS && \ - !CPU_R4400_WORKAROUNDS + select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2 select HAVE_EXIT_THREAD select HAVE_FAST_GUP select HAVE_FTRACE_MCOUNT_RECORD @@ -263,6 +263,7 @@ config BMIPS_GENERIC bool "Broadcom Generic BMIPS kernel" select ARCH_HAS_RESET_CONTROLLER select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL + select ARCH_HAS_PHYS_TO_DMA select BOOT_RAW select NO_EXCEPT_FILL select USE_OF @@ -290,8 +291,6 @@ config BMIPS_GENERIC select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN select HARDIRQS_SW_RESEND - select HAVE_PCI - select PCI_DRIVERS_GENERIC help Build a generic DT-based kernel image that boots on select BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top @@ -638,6 +637,9 @@ config MACH_REALTEK_RTL select SYS_SUPPORTS_MIPS16 select SYS_SUPPORTS_MULTITHREADING select SYS_SUPPORTS_VPE_LOADER + select SYS_HAS_EARLY_PRINTK + select SYS_HAS_EARLY_PRINTK_8250 + select USE_GENERIC_EARLY_PRINTK_8250 select BOOT_RAW select PINCTRL select USE_OF @@ -760,6 +762,7 @@ config SGI_IP30 select HAVE_PCI select IRQ_MIPS_CPU select IRQ_DOMAIN_HIERARCHY + select NR_CPUS_DEFAULT_2 select PCI_DRIVERS_GENERIC select PCI_XTALK_BRIDGE select SYS_HAS_EARLY_PRINTK @@ -994,6 +997,60 @@ config CAVIUM_OCTEON_SOC Hikari Say Y here for most Octeon reference boards. +config NLM_XLR_BOARD + bool "Netlogic XLR/XLS based systems" + select BOOT_ELF32 + select NLM_COMMON + select SYS_HAS_CPU_XLR + select SYS_SUPPORTS_SMP + select HAVE_PCI + select SWAP_IO_SPACE + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL + select PHYS_ADDR_T_64BIT + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select NR_CPUS_DEFAULT_32 + select CEVT_R4K + select CSRC_R4K + select IRQ_MIPS_CPU + select ZONE_DMA32 if 64BIT + select SYNC_R4K + select SYS_HAS_EARLY_PRINTK + select SYS_SUPPORTS_ZBOOT + select SYS_SUPPORTS_ZBOOT_UART16550 + help + Support for systems based on Netlogic XLR and XLS processors. + Say Y here if you have a XLR or XLS based board. + +config NLM_XLP_BOARD + bool "Netlogic XLP based systems" + select BOOT_ELF32 + select NLM_COMMON + select SYS_HAS_CPU_XLP + select SYS_SUPPORTS_SMP + select HAVE_PCI + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL + select PHYS_ADDR_T_64BIT + select GPIOLIB + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select NR_CPUS_DEFAULT_32 + select CEVT_R4K + select CSRC_R4K + select IRQ_MIPS_CPU + select ZONE_DMA32 if 64BIT + select SYNC_R4K + select SYS_HAS_EARLY_PRINTK + select USE_OF + select SYS_SUPPORTS_ZBOOT + select SYS_SUPPORTS_ZBOOT_UART16550 + help + This board is based on Netlogic XLP Processor. + Say Y here if you have a XLP based board. + endchoice source "arch/mips/alchemy/Kconfig" @@ -1016,6 +1073,7 @@ source "arch/mips/cavium-octeon/Kconfig" source "arch/mips/loongson2ef/Kconfig" source "arch/mips/loongson32/Kconfig" source "arch/mips/loongson64/Kconfig" +source "arch/mips/netlogic/Kconfig" endmenu @@ -1157,6 +1215,15 @@ config SYS_SUPPORTS_RELOCATABLE The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF to allow access to command line and entropy sources. +config MIPS_CBPF_JIT + def_bool y + depends on BPF_JIT && HAVE_CBPF_JIT + +config MIPS_EBPF_JIT + def_bool y + depends on BPF_JIT && HAVE_EBPF_JIT + + # # Endianness selection. Sufficiently obscure so many users don't know what to # answer,so we try hard to limit the available choices. Also the use of a @@ -1605,6 +1672,7 @@ config CPU_R4300 depends on SYS_HAS_CPU_R4300 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL + select CPU_HAS_LOAD_STORE_LR help MIPS Technologies R4300-series processors. @@ -1718,10 +1786,35 @@ config CPU_BMIPS select CPU_HAS_PREFETCH select CPU_SUPPORTS_CPUFREQ select MIPS_EXTERNAL_TIMER - select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU help Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. +config CPU_XLR + bool "Netlogic XLR SoC" + depends on SYS_HAS_CPU_XLR + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_HUGEPAGES + select WEAK_ORDERING + select WEAK_REORDERING_BEYOND_LLSC + help + Netlogic Microsystems XLR/XLS processors. + +config CPU_XLP + bool "Netlogic XLP SoC" + depends on SYS_HAS_CPU_XLP + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_64BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + select WEAK_ORDERING + select WEAK_REORDERING_BEYOND_LLSC + select CPU_HAS_PREFETCH + select CPU_MIPSR2 + select CPU_SUPPORTS_HUGEPAGES + select MIPS_ASID_BITS_VARIABLE + help + Netlogic Microsystems XLP processors. endchoice config CPU_MIPS32_3_5_FEATURES @@ -1972,6 +2065,12 @@ config SYS_HAS_CPU_BMIPS5000 select SYS_HAS_CPU_BMIPS select ARCH_HAS_SYNC_DMA_FOR_CPU +config SYS_HAS_CPU_XLR + bool + +config SYS_HAS_CPU_XLP + bool + # # CPU may reorder R->R, R->W, W->R, W->W # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC @@ -2066,7 +2165,7 @@ config CPU_SUPPORTS_HUGEPAGES config MIPS_PGD_C0_CONTEXT bool depends on 64BIT - default y if (CPU_MIPSR2 || CPU_MIPSR6) + default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP # # Set to y for ptrace access to watch registers. @@ -2113,16 +2212,6 @@ config MIPS_VA_BITS_48 If unsure, say N. -config ZBOOT_LOAD_ADDRESS - hex "Compressed kernel load address" - default 0xffffffff80400000 if BCM47XX - default 0x0 - depends on SYS_SUPPORTS_ZBOOT - help - The address to load compressed kernel, aka vmlinuz. - - This is only used if non-zero. - choice prompt "Kernel page size" default PAGE_SIZE_4KB @@ -2673,8 +2762,6 @@ config NUMA bool "NUMA Support" depends on SYS_SUPPORTS_NUMA select SMP - select HAVE_SETUP_PER_CPU_AREA - select NEED_PER_CPU_EMBED_FIRST_CHUNK help Say Y to compile the kernel to support NUMA (Non-Uniform Memory Access). This option improves performance on systems with more @@ -2685,6 +2772,14 @@ config NUMA config SYS_SUPPORTS_NUMA bool +config HAVE_SETUP_PER_CPU_AREA + def_bool y + depends on NUMA + +config NEED_PER_CPU_EMBED_FIRST_CHUNK + def_bool y + depends on NUMA + config RELOCATABLE bool "Relocatable kernel" depends on SYS_SUPPORTS_RELOCATABLE @@ -2753,7 +2848,7 @@ config NODES_SHIFT config HW_PERF_EVENTS bool "Enable hardware performance counter support for perf events" - depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64) + depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64) default y help Enable hardware performance counter support for perf events. If diff --git a/arch/mips/Makefile b/arch/mips/Makefile index e036fc025c..f7b58da2f3 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -8,7 +8,8 @@ # Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki # # This file is included by the global makefile so that you can add your own -# architecture-specific flags and dependencies. +# architecture-specific flags and dependencies. Remember to do have actions +# for "archclean" cleaning up for this architecture. # archscripts: scripts_basic @@ -253,7 +254,9 @@ endif # # Board-dependent options and extra files # +ifdef need-compiler include $(srctree)/arch/mips/Kbuild.platforms +endif ifdef CONFIG_PHYSICAL_START load-y = $(CONFIG_PHYSICAL_START) @@ -425,6 +428,11 @@ endif $(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE) $(Q)install -D -m 644 System.map $(INSTALL_PATH)/System.map-$(KERNELRELEASE) +archclean: + $(Q)$(MAKE) $(clean)=arch/mips/boot + $(Q)$(MAKE) $(clean)=arch/mips/boot/compressed + $(Q)$(MAKE) $(clean)=arch/mips/boot/tools + archheaders: $(Q)$(MAKE) $(build)=arch/mips/kernel/syscalls all diff --git a/arch/mips/alchemy/common/gpiolib.c b/arch/mips/alchemy/common/gpiolib.c index a17d7a8909..7d5da5edd7 100644 --- a/arch/mips/alchemy/common/gpiolib.c +++ b/arch/mips/alchemy/common/gpiolib.c @@ -23,6 +23,8 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. * * Notes : + * This file must ONLY be built when CONFIG_GPIOLIB=y and + * CONFIG_ALCHEMY_GPIO_INDIRECT=n, otherwise compilation will fail! * au1000 SoC have only one GPIO block : GPIO1 * Au1100, Au15x0, Au12x0 have a second one : GPIO2 * Au1300 is totally different: 1 block with up to 128 GPIOs diff --git a/arch/mips/alchemy/devboards/db1550.c b/arch/mips/alchemy/devboards/db1550.c index fd91d9c9a2..752b93d91a 100644 --- a/arch/mips/alchemy/devboards/db1550.c +++ b/arch/mips/alchemy/devboards/db1550.c @@ -66,7 +66,6 @@ int __init db1550_board_setup(void) case BCSR_WHOAMI_PB1550_DDR: bcsr_init(PB1550_BCSR_PHYS_ADDR, PB1550_BCSR_PHYS_ADDR + PB1550_BCSR_HEXLED_OFS); - break; case BCSR_WHOAMI_DB1550: break; default: diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c index 0ac435fe2d..891f495c4c 100644 --- a/arch/mips/ath79/setup.c +++ b/arch/mips/ath79/setup.c @@ -34,6 +34,15 @@ static char ath79_sys_type[ATH79_SYS_TYPE_LEN]; +static void ath79_restart(char *command) +{ + local_irq_disable(); + ath79_device_reset_set(AR71XX_RESET_FULL_CHIP); + for (;;) + if (cpu_wait) + cpu_wait(); +} + static void ath79_halt(void) { while (1) @@ -225,6 +234,7 @@ void __init plat_mem_setup(void) detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX); + _machine_restart = ath79_restart; _machine_halt = ath79_halt; pm_power_off = ath79_halt; } diff --git a/arch/mips/bcm47xx/Platform b/arch/mips/bcm47xx/Platform index fe6daba3f9..833b204fe5 100644 --- a/arch/mips/bcm47xx/Platform +++ b/arch/mips/bcm47xx/Platform @@ -4,3 +4,4 @@ cflags-$(CONFIG_BCM47XX) += \ -I$(srctree)/arch/mips/include/asm/mach-bcm47xx load-$(CONFIG_BCM47XX) := 0xffffffff80001000 +zload-$(CONFIG_BCM47XX) += 0xffffffff80400000 diff --git a/arch/mips/bcm47xx/board.c b/arch/mips/bcm47xx/board.c index 87dc76a1f9..35266a70e2 100644 --- a/arch/mips/bcm47xx/board.c +++ b/arch/mips/bcm47xx/board.c @@ -141,7 +141,6 @@ struct bcm47xx_board_type_list2 bcm47xx_board_list_boot_hw[] __initconst = { {{BCM47XX_BOARD_LINKSYS_WRT300NV11, "Linksys WRT300N V1.1"}, "WRT300N", "1.1"}, {{BCM47XX_BOARD_LINKSYS_WRT310NV1, "Linksys WRT310N V1"}, "WRT310N", "1.0"}, {{BCM47XX_BOARD_LINKSYS_WRT310NV2, "Linksys WRT310N V2"}, "WRT310N", "2.0"}, - {{BCM47XX_BOARD_LINKSYS_WRT320N_V1, "Linksys WRT320N V1"}, "WRT320N", "1.0"}, {{BCM47XX_BOARD_LINKSYS_WRT54G3GV2, "Linksys WRT54G3GV2-VF"}, "WRT54G3GV2-VF", "1.0"}, {{BCM47XX_BOARD_LINKSYS_WRT610NV1, "Linksys WRT610N V1"}, "WRT610N", "1.0"}, {{BCM47XX_BOARD_LINKSYS_WRT610NV2, "Linksys WRT610N V2"}, "WRT610N", "2.0"}, @@ -162,12 +161,9 @@ struct bcm47xx_board_type_list1 bcm47xx_board_list_board_id[] __initconst = { {{BCM47XX_BOARD_LUXUL_XWR_600_V1, "Luxul XWR-600 V1"}, "luxul_xwr600_v1"}, {{BCM47XX_BOARD_LUXUL_XWR_1750_V1, "Luxul XWR-1750 V1"}, "luxul_xwr1750_v1"}, {{BCM47XX_BOARD_NETGEAR_R6200_V1, "Netgear R6200 V1"}, "U12H192T00_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_R6300_V1, "Netgear R6300 V1"}, "U12H218T00_NETGEAR"}, {{BCM47XX_BOARD_NETGEAR_WGR614V8, "Netgear WGR614 V8"}, "U12H072T00_NETGEAR"}, {{BCM47XX_BOARD_NETGEAR_WGR614V9, "Netgear WGR614 V9"}, "U12H094T00_NETGEAR"}, {{BCM47XX_BOARD_NETGEAR_WGR614_V10, "Netgear WGR614 V10"}, "U12H139T01_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_WN2500RP_V1, "Netgear WN2500RP V1"}, "U12H197T00_NETGEAR"}, - {{BCM47XX_BOARD_NETGEAR_WN2500RP_V2, "Netgear WN2500RP V2"}, "U12H294T00_NETGEAR"}, {{BCM47XX_BOARD_NETGEAR_WNDR3300, "Netgear WNDR3300"}, "U12H093T00_NETGEAR"}, {{BCM47XX_BOARD_NETGEAR_WNDR3400V1, "Netgear WNDR3400 V1"}, "U12H155T00_NETGEAR"}, {{BCM47XX_BOARD_NETGEAR_WNDR3400V2, "Netgear WNDR3400 V2"}, "U12H187T00_NETGEAR"}, @@ -349,7 +345,7 @@ void __init bcm47xx_board_detect(void) board_detected = bcm47xx_board_get_nvram(); bcm47xx_board.board = board_detected->board; - strscpy(bcm47xx_board.name, board_detected->name, + strlcpy(bcm47xx_board.name, board_detected->name, BCM47XX_BOARD_MAX_NAME); } diff --git a/arch/mips/bcm47xx/buttons.c b/arch/mips/bcm47xx/buttons.c index 36f0b1aafa..535d84addc 100644 --- a/arch/mips/bcm47xx/buttons.c +++ b/arch/mips/bcm47xx/buttons.c @@ -26,12 +26,6 @@ /* Asus */ -static const struct gpio_keys_button -bcm47xx_buttons_asus_rtn10u[] __initconst = { - BCM47XX_GPIO_KEY(20, KEY_WPS_BUTTON), - BCM47XX_GPIO_KEY(21, KEY_RESTART), -}; - static const struct gpio_keys_button bcm47xx_buttons_asus_rtn12[] __initconst = { BCM47XX_GPIO_KEY(0, KEY_WPS_BUTTON), @@ -282,18 +276,6 @@ bcm47xx_buttons_linksys_wrt310nv1[] __initconst = { BCM47XX_GPIO_KEY(8, KEY_UNKNOWN), }; -static const struct gpio_keys_button -bcm47xx_buttons_linksys_wrt310n_v2[] __initconst = { - BCM47XX_GPIO_KEY(5, KEY_WPS_BUTTON), - BCM47XX_GPIO_KEY(6, KEY_RESTART), -}; - -static const struct gpio_keys_button -bcm47xx_buttons_linksys_wrt320n_v1[] __initconst = { - BCM47XX_GPIO_KEY(5, KEY_WPS_BUTTON), - BCM47XX_GPIO_KEY(8, KEY_RESTART), -}; - static const struct gpio_keys_button bcm47xx_buttons_linksys_wrt54g3gv2[] __initconst = { BCM47XX_GPIO_KEY(5, KEY_WIMAX), @@ -409,17 +391,6 @@ bcm47xx_buttons_netgear_r6200_v1[] __initconst = { BCM47XX_GPIO_KEY(4, KEY_WPS_BUTTON), }; -static const struct gpio_keys_button -bcm47xx_buttons_netgear_r6300_v1[] __initconst = { - BCM47XX_GPIO_KEY(6, KEY_RESTART), -}; - -static const struct gpio_keys_button -bcm47xx_buttons_netgear_wn2500rp_v1[] __initconst = { - BCM47XX_GPIO_KEY(12, KEY_RESTART), - BCM47XX_GPIO_KEY(31, KEY_WPS_BUTTON), -}; - static const struct gpio_keys_button bcm47xx_buttons_netgear_wndr3400v1[] __initconst = { BCM47XX_GPIO_KEY(4, KEY_RESTART), @@ -507,9 +478,6 @@ int __init bcm47xx_buttons_register(void) int err; switch (board) { - case BCM47XX_BOARD_ASUS_RTN10U: - err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_rtn10u); - break; case BCM47XX_BOARD_ASUS_RTN12: err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_rtn12); break; @@ -640,12 +608,6 @@ int __init bcm47xx_buttons_register(void) case BCM47XX_BOARD_LINKSYS_WRT310NV1: err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310nv1); break; - case BCM47XX_BOARD_LINKSYS_WRT310NV2: - err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310n_v2); - break; - case BCM47XX_BOARD_LINKSYS_WRT320N_V1: - err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt320n_v1); - break; case BCM47XX_BOARD_LINKSYS_WRT54G3GV2: err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt54g3gv2); break; @@ -712,12 +674,6 @@ int __init bcm47xx_buttons_register(void) case BCM47XX_BOARD_NETGEAR_R6200_V1: err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_r6200_v1); break; - case BCM47XX_BOARD_NETGEAR_R6300_V1: - err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_r6300_v1); - break; - case BCM47XX_BOARD_NETGEAR_WN2500RP_V1: - err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wn2500rp_v1); - break; case BCM47XX_BOARD_NETGEAR_WNDR3400V1: err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr3400v1); break; diff --git a/arch/mips/bcm47xx/leds.c b/arch/mips/bcm47xx/leds.c index 4648a302a3..167c42c71e 100644 --- a/arch/mips/bcm47xx/leds.c +++ b/arch/mips/bcm47xx/leds.c @@ -29,14 +29,6 @@ /* Asus */ -static const struct gpio_led -bcm47xx_leds_asus_rtn10u[] __initconst = { - BCM47XX_GPIO_LED(5, "green", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF), - BCM47XX_GPIO_LED(6, "green", "power", 1, LEDS_GPIO_DEFSTATE_ON), - BCM47XX_GPIO_LED(7, "green", "wps", 0, LEDS_GPIO_DEFSTATE_OFF), - BCM47XX_GPIO_LED(8, "green", "usb", 0, LEDS_GPIO_DEFSTATE_OFF), -}; - static const struct gpio_led bcm47xx_leds_asus_rtn12[] __initconst = { BCM47XX_GPIO_LED(2, "unk", "power", 1, LEDS_GPIO_DEFSTATE_ON), @@ -321,13 +313,6 @@ bcm47xx_leds_linksys_wrt310nv1[] __initconst = { BCM47XX_GPIO_LED(9, "blue", "wps", 1, LEDS_GPIO_DEFSTATE_OFF), }; -static const struct gpio_led -bcm47xx_leds_linksys_wrt320n_v1[] __initconst = { - BCM47XX_GPIO_LED(1, "blue", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF), - BCM47XX_GPIO_LED(2, "blue", "power", 0, LEDS_GPIO_DEFSTATE_ON), - BCM47XX_GPIO_LED(4, "amber", "wps", 1, LEDS_GPIO_DEFSTATE_OFF), -}; - static const struct gpio_led bcm47xx_leds_linksys_wrt54g_generic[] __initconst = { BCM47XX_GPIO_LED(0, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF), @@ -571,9 +556,6 @@ void __init bcm47xx_leds_register(void) enum bcm47xx_board board = bcm47xx_board_get(); switch (board) { - case BCM47XX_BOARD_ASUS_RTN10U: - bcm47xx_set_pdata(bcm47xx_leds_asus_rtn10u); - break; case BCM47XX_BOARD_ASUS_RTN12: bcm47xx_set_pdata(bcm47xx_leds_asus_rtn12); break; @@ -707,9 +689,6 @@ void __init bcm47xx_leds_register(void) case BCM47XX_BOARD_LINKSYS_WRT310NV1: bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt310nv1); break; - case BCM47XX_BOARD_LINKSYS_WRT320N_V1: - bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt320n_v1); - break; case BCM47XX_BOARD_LINKSYS_WRT54G3GV2: bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g3gv2); break; diff --git a/arch/mips/bcm63xx/dev-wdt.c b/arch/mips/bcm63xx/dev-wdt.c index 42130914a3..2a2346a99b 100644 --- a/arch/mips/bcm63xx/dev-wdt.c +++ b/arch/mips/bcm63xx/dev-wdt.c @@ -9,7 +9,6 @@ #include #include #include -#include #include static struct resource wdt_resources[] = { @@ -20,18 +19,11 @@ static struct resource wdt_resources[] = { }, }; -static struct bcm7038_wdt_platform_data bcm63xx_wdt_pdata = { - .clk_name = "periph", -}; - static struct platform_device bcm63xx_wdt_device = { .name = "bcm63xx-wdt", .id = -1, .num_resources = ARRAY_SIZE(wdt_resources), .resource = wdt_resources, - .dev = { - .platform_data = &bcm63xx_wdt_pdata, - }, }; int __init bcm63xx_wdt_register(void) diff --git a/arch/mips/bmips/dma.c b/arch/mips/bmips/dma.c index c535f9cb75..915ce4b189 100644 --- a/arch/mips/bmips/dma.c +++ b/arch/mips/bmips/dma.c @@ -1,8 +1,68 @@ -// SPDX-License-Identifier: GPL-2.0+ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2014 Kevin Cernekee + */ +#define pr_fmt(fmt) "bmips-dma: " fmt + +#include +#include +#include +#include +#include +#include +#include +#include #include #include -#include + +/* + * BCM338x has configurable address translation windows which allow the + * peripherals' DMA addresses to be different from the Zephyr-visible + * physical addresses. e.g. usb_dma_addr = zephyr_pa ^ 0x08000000 + * + * If the "brcm,ubus" node has a "dma-ranges" property we will enable this + * translation globally using the provided information. This implements a + * very limited subset of "dma-ranges" support and it will probably be + * replaced by a more generic version later. + */ + +struct bmips_dma_range { + u32 child_addr; + u32 parent_addr; + u32 size; +}; + +static struct bmips_dma_range *bmips_dma_ranges; + +#define FLUSH_RAC 0x100 + +dma_addr_t phys_to_dma(struct device *dev, phys_addr_t pa) +{ + struct bmips_dma_range *r; + + for (r = bmips_dma_ranges; r && r->size; r++) { + if (pa >= r->child_addr && + pa < (r->child_addr + r->size)) + return pa - r->child_addr + r->parent_addr; + } + return pa; +} + +phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dma_addr) +{ + struct bmips_dma_range *r; + + for (r = bmips_dma_ranges; r && r->size; r++) { + if (dma_addr >= r->parent_addr && + dma_addr < (r->parent_addr + r->size)) + return dma_addr - r->parent_addr + r->child_addr; + } + return dma_addr; +} void arch_sync_dma_for_cpu_all(void) { @@ -19,3 +79,45 @@ void arch_sync_dma_for_cpu_all(void) __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG); __raw_readl(cbr + BMIPS_RAC_CONFIG); } + +static int __init bmips_init_dma_ranges(void) +{ + struct device_node *np = + of_find_compatible_node(NULL, NULL, "brcm,ubus"); + const __be32 *data; + struct bmips_dma_range *r; + int len; + + if (!np) + return 0; + + data = of_get_property(np, "dma-ranges", &len); + if (!data) + goto out_good; + + len /= sizeof(*data) * 3; + if (!len) + goto out_bad; + + /* add a dummy (zero) entry at the end as a sentinel */ + bmips_dma_ranges = kcalloc(len + 1, sizeof(struct bmips_dma_range), + GFP_KERNEL); + if (!bmips_dma_ranges) + goto out_bad; + + for (r = bmips_dma_ranges; len; len--, r++) { + r->child_addr = be32_to_cpup(data++); + r->parent_addr = be32_to_cpup(data++); + r->size = be32_to_cpup(data++); + } + +out_good: + of_node_put(np); + return 0; + +out_bad: + pr_err("error parsing dma-ranges property\n"); + of_node_put(np); + return -EINVAL; +} +arch_initcall(bmips_init_dma_ranges); diff --git a/arch/mips/boot/Makefile b/arch/mips/boot/Makefile index 196c44fa72..a3da2c5d63 100644 --- a/arch/mips/boot/Makefile +++ b/arch/mips/boot/Makefile @@ -171,6 +171,3 @@ $(obj)/vmlinux.itb: $(obj)/vmlinux.its $(obj)/vmlinux.bin FORCE $(obj)/vmlinux.%.itb: $(obj)/vmlinux.%.its $(obj)/vmlinux.bin.% FORCE $(call if_changed,itb-image,$<) - -# for cleaning -subdir- += compressed tools diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile index 5a15d51e88..705b9e7f80 100644 --- a/arch/mips/boot/compressed/Makefile +++ b/arch/mips/boot/compressed/Makefile @@ -50,10 +50,26 @@ vmlinuzobjs-$(CONFIG_MIPS_ALCHEMY) += $(obj)/uart-alchemy.o vmlinuzobjs-$(CONFIG_ATH79) += $(obj)/uart-ath79.o endif +extra-y += uart-ath79.c +$(obj)/uart-ath79.c: $(srctree)/arch/mips/ath79/early_printk.c + $(call cmd,shipped) + vmlinuzobjs-$(CONFIG_KERNEL_XZ) += $(obj)/ashldi3.o vmlinuzobjs-$(CONFIG_KERNEL_ZSTD) += $(obj)/bswapdi.o $(obj)/ashldi3.o $(obj)/clz_ctz.o +extra-y += ashldi3.c +$(obj)/ashldi3.c: $(obj)/%.c: $(srctree)/lib/%.c FORCE + $(call if_changed,shipped) + +extra-y += bswapsi.c +$(obj)/bswapsi.c: $(obj)/%.c: $(srctree)/arch/mips/lib/%.c FORCE + $(call if_changed,shipped) + +extra-y += bswapdi.c +$(obj)/bswapdi.c: $(obj)/%.c: $(srctree)/arch/mips/lib/%.c FORCE + $(call if_changed,shipped) + targets := $(notdir $(vmlinuzobjs-y)) targets += vmlinux.bin @@ -64,12 +80,12 @@ $(obj)/vmlinux.bin: $(KBUILD_IMAGE) FORCE $(call if_changed,objcopy) tool_$(CONFIG_KERNEL_GZIP) = gzip -tool_$(CONFIG_KERNEL_BZIP2) = bzip2_with_size -tool_$(CONFIG_KERNEL_LZ4) = lz4_with_size -tool_$(CONFIG_KERNEL_LZMA) = lzma_with_size -tool_$(CONFIG_KERNEL_LZO) = lzo_with_size -tool_$(CONFIG_KERNEL_XZ) = xzkern_with_size -tool_$(CONFIG_KERNEL_ZSTD) = zstd22_with_size +tool_$(CONFIG_KERNEL_BZIP2) = bzip2 +tool_$(CONFIG_KERNEL_LZ4) = lz4 +tool_$(CONFIG_KERNEL_LZMA) = lzma +tool_$(CONFIG_KERNEL_LZO) = lzo +tool_$(CONFIG_KERNEL_XZ) = xzkern +tool_$(CONFIG_KERNEL_ZSTD) = zstd22 targets += vmlinux.bin.z @@ -89,10 +105,6 @@ HOSTCFLAGS_calc_vmlinuz_load_addr.o += $(LINUXINCLUDE) # Calculate the load address of the compressed kernel image hostprogs := calc_vmlinuz_load_addr -ifneq (0x0,$(CONFIG_ZBOOT_LOAD_ADDRESS)) -zload-y = $(CONFIG_ZBOOT_LOAD_ADDRESS) -endif - ifneq ($(zload-y),) VMLINUZ_LOAD_ADDRESS := $(zload-y) else diff --git a/arch/mips/boot/compressed/uart-16550.c b/arch/mips/boot/compressed/uart-16550.c index 96d28f2111..c18d7f72d9 100644 --- a/arch/mips/boot/compressed/uart-16550.c +++ b/arch/mips/boot/compressed/uart-16550.c @@ -23,6 +23,18 @@ #define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset)) #endif +#ifdef CONFIG_CPU_XLR +#define UART0_BASE 0x1EF14000 +#define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset)) +#define IOTYPE unsigned int +#endif + +#ifdef CONFIG_CPU_XLP +#define UART0_BASE 0x18030100 +#define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset)) +#define IOTYPE unsigned int +#endif + #ifndef IOTYPE #define IOTYPE char #endif diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile index 928f38a79d..be96d35eb5 100644 --- a/arch/mips/boot/dts/Makefile +++ b/arch/mips/boot/dts/Makefile @@ -9,6 +9,7 @@ subdir-$(CONFIG_MACH_LOONGSON64) += loongson subdir-$(CONFIG_SOC_VCOREIII) += mscc subdir-$(CONFIG_MIPS_MALTA) += mti subdir-$(CONFIG_LEGACY_BOARD_SEAD3) += mti +subdir-$(CONFIG_NLM_XLP_BOARD) += netlogic subdir-$(CONFIG_FIT_IMAGE_FDT_NI169445) += ni subdir-$(CONFIG_MACH_PIC32) += pic32 subdir-$(CONFIG_ATH79) += qca diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi index 62588c53d3..aa0b2d39c9 100644 --- a/arch/mips/boot/dts/brcm/bcm7425.dtsi +++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi @@ -584,34 +584,4 @@ shimphy@8000 { }; }; }; - - pcie_0: pcie@8b20000 { - status = "disabled"; - compatible = "brcm,bcm7425-pcie"; - - ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0x0 0x08000000 - 0x02000000 0x0 0xd8000000 0xd8000000 0x0 0x08000000 - 0x02000000 0x0 0xe0000000 0xe0000000 0x0 0x08000000 - 0x02000000 0x0 0xe8000000 0xe8000000 0x0 0x08000000>; - - reg = <0x10410000 0x19310>; - aspm-no-l0s; - device_type = "pci"; - msi-controller; - msi-parent = <&pcie_0>; - #address-cells = <0x3>; - #size-cells = <0x2>; - bus-range = <0x0 0xff>; - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - linux,pci-domain = <0x0>; - - interrupt-parent = <&periph_intc>; - interrupts = <37>, <37>; - interrupt-names = "pcie", "msi"; - #interrupt-cells = <0x1>; - interrupt-map = <0 0 0 1 &periph_intc 0x21 - 0 0 0 1 &periph_intc 0x22 - 0 0 0 1 &periph_intc 0x23 - 0 0 0 1 &periph_intc 0x24>; - }; }; diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi index 8c001b944c..8398b7f68b 100644 --- a/arch/mips/boot/dts/brcm/bcm7435.dtsi +++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi @@ -599,34 +599,4 @@ shimphy@8000 { }; }; }; - - pcie_0: pcie@8b20000 { - status = "disabled"; - compatible = "brcm,bcm7435-pcie"; - - ranges = <0x02000000 0x0 0xd0000000 0xd0000000 0x0 0x08000000 - 0x02000000 0x0 0xd8000000 0xd8000000 0x0 0x08000000 - 0x02000000 0x0 0xe0000000 0xe0000000 0x0 0x08000000 - 0x02000000 0x0 0xe8000000 0xe8000000 0x0 0x08000000>; - - reg = <0x10410000 0x19310>; - aspm-no-l0s; - device_type = "pci"; - msi-controller; - msi-parent = <&pcie_0>; - #address-cells = <0x3>; - #size-cells = <0x2>; - bus-range = <0x0 0xff>; - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - linux,pci-domain = <0x0>; - - interrupt-parent = <&periph_intc>; - interrupts = <39>, <39>; - interrupt-names = "pcie", "msi"; - #interrupt-cells = <0x1>; - interrupt-map = <0 0 0 1 &periph_intc 0x23 - 0 0 0 1 &periph_intc 0x24 - 0 0 0 1 &periph_intc 0x25 - 0 0 0 1 &periph_intc 0x26>; - }; }; diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts index f389349343..9efecfe1e0 100644 --- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts +++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts @@ -152,12 +152,3 @@ &mspi { &waketimer { status = "okay"; }; - -&pcie_0 { - status = "okay"; - /* 1GB Memc0, 1GB Memc1 */ - brcm,scb-sizes = <0 0x40000000 0 0x40000000>; - dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000 - 0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000 - 0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>; -}; diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts index a0cf53e23c..b653c6ff74 100644 --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts @@ -128,12 +128,3 @@ &mspi { &waketimer { status = "okay"; }; - -&pcie_0 { - status = "okay"; - /* 1GB Memc0, 1GB Memc1 */ - brcm,scb-sizes = <0 0x40000000 0 0x40000000>; - dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000 - 0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000 - 0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>; -}; diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index ab6e3dc0bc..a688809bee 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -78,20 +78,6 @@ eth0_power: fixedregulator@0 { enable-active-high; }; - hdmi_out: connector { - compatible = "hdmi-connector"; - label = "HDMI OUT"; - type = "a"; - - ddc-en-gpios = <&gpa 25 GPIO_ACTIVE_HIGH>; - - port { - hdmi_con: endpoint { - remote-endpoint = <&dw_hdmi_out>; - }; - }; - }; - ir: ir { compatible = "gpio-ir-receiver"; gpios = <&gpe 3 GPIO_ACTIVE_LOW>; @@ -127,13 +113,9 @@ &cgu { * Use the 32.768 kHz oscillator as the parent of the RTC for a higher * precision. */ - assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>, - <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>, - <&cgu JZ4780_CLK_HDMI>; - assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>, - <&cgu JZ4780_CLK_MPLL>, - <&cgu JZ4780_CLK_SSIPLL>; - assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>; + assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>; + assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>; + assigned-clock-rates = <48000000>; }; &tcu { @@ -524,12 +506,6 @@ pins_i2c4: i2c4 { bias-disable; }; - pins_hdmi_ddc: hdmi_ddc { - function = "hdmi-ddc"; - groups = "hdmi-ddc"; - bias-disable; - }; - pins_nemc: nemc { function = "nemc"; groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe"; @@ -560,39 +536,3 @@ pins_mmc1: mmc1 { bias-disable; }; }; - -&hdmi { - status = "okay"; - - pinctrl-names = "default"; - pinctrl-0 = <&pins_hdmi_ddc>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dw_hdmi_in: endpoint { - remote-endpoint = <&lcd_out>; - }; - }; - - port@1 { - reg = <1>; - dw_hdmi_out: endpoint { - remote-endpoint = <&hdmi_con>; - }; - }; - }; -}; - -&lcdc0 { - status = "okay"; - - port { - lcd_out: endpoint { - remote-endpoint = <&dw_hdmi_in>; - }; - }; -}; diff --git a/arch/mips/boot/dts/ingenic/jz4725b.dtsi b/arch/mips/boot/dts/ingenic/jz4725b.dtsi index e9e48022f6..a1f0b71c92 100644 --- a/arch/mips/boot/dts/ingenic/jz4725b.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4725b.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 -#include +#include #include / { @@ -321,7 +321,7 @@ udc: usb@13040000 { lcd: lcd-controller@13050000 { compatible = "ingenic,jz4725b-lcd"; - reg = <0x13050000 0x130>; /* tbc */ + reg = <0x13050000 0x1000>; interrupt-parent = <&intc>; interrupts = <31>; diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi index 7f76cba03a..c1afdfdaa8 100644 --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 -#include +#include #include / { @@ -323,7 +323,7 @@ udc: usb@13040000 { lcd: lcd-controller@13050000 { compatible = "ingenic,jz4740-lcd"; - reg = <0x13050000 0x60>; /* LCDCMD1+4 */ + reg = <0x13050000 0x1000>; interrupt-parent = <&intc>; interrupts = <30>; diff --git a/arch/mips/boot/dts/ingenic/jz4770.dtsi b/arch/mips/boot/dts/ingenic/jz4770.dtsi index bda0a3a86e..05c00b9308 100644 --- a/arch/mips/boot/dts/ingenic/jz4770.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4770.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 -#include +#include #include / { @@ -399,7 +399,7 @@ gpu: gpu@13040000 { lcd: lcd-controller@13050000 { compatible = "ingenic,jz4770-lcd"; - reg = <0x13050000 0x130>; /* tbc */ + reg = <0x13050000 0x300>; interrupt-parent = <&intc>; interrupts = <31>; diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index 3f9ea47a10..9e34f433b9 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -1,5 +1,5 @@ // SPDX-License-Identifier: GPL-2.0 -#include +#include #include #include @@ -255,23 +255,22 @@ gpf: gpio@5 { }; }; - spi0: spi@10043000 { - compatible = "ingenic,jz4780-spi"; - reg = <0x10043000 0x1c>; + spi_gpio { + compatible = "spi-gpio"; #address-cells = <1>; #size-cells = <0>; + num-chipselects = <2>; - interrupt-parent = <&intc>; - interrupts = <8>; + gpio-miso = <&gpe 14 0>; + gpio-sck = <&gpe 15 0>; + gpio-mosi = <&gpe 17 0>; + cs-gpios = <&gpe 16 0>, <&gpe 18 0>; - clocks = <&cgu JZ4780_CLK_SSI0>; - clock-names = "spi"; - - dmas = <&dma JZ4780_DMA_SSI0_RX 0xffffffff>, - <&dma JZ4780_DMA_SSI0_TX 0xffffffff>; - dma-names = "rx", "tx"; - - status = "disabled"; + spidev@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <1000000>; + }; }; uart0: serial@10030000 { @@ -339,25 +338,6 @@ uart4: serial@10034000 { status = "disabled"; }; - spi1: spi@10044000 { - compatible = "ingenic,jz4780-spi"; - reg = <0x10044000 0x1c>; - #address-cells = <1>; - #size-sells = <0>; - - interrupt-parent = <&intc>; - interrupts = <7>; - - clocks = <&cgu JZ4780_CLK_SSI1>; - clock-names = "spi"; - - dmas = <&dma JZ4780_DMA_SSI1_RX 0xffffffff>, - <&dma JZ4780_DMA_SSI1_TX 0xffffffff>; - dma-names = "rx", "tx"; - - status = "disabled"; - }; - i2c0: i2c@10050000 { compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; #address-cells = <1>; @@ -444,46 +424,6 @@ i2c4: i2c@10054000 { status = "disabled"; }; - hdmi: hdmi@10180000 { - compatible = "ingenic,jz4780-dw-hdmi"; - reg = <0x10180000 0x8000>; - reg-io-width = <4>; - - clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>; - clock-names = "iahb", "isfr"; - - interrupt-parent = <&intc>; - interrupts = <3>; - - status = "disabled"; - }; - - lcdc0: lcdc0@13050000 { - compatible = "ingenic,jz4780-lcd"; - reg = <0x13050000 0x1800>; - - clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>; - clock-names = "lcd", "lcd_pclk"; - - interrupt-parent = <&intc>; - interrupts = <31>; - - status = "disabled"; - }; - - lcdc1: lcdc1@130a0000 { - compatible = "ingenic,jz4780-lcd"; - reg = <0x130a0000 0x1800>; - - clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>; - clock-names = "lcd", "lcd_pclk"; - - interrupt-parent = <&intc>; - interrupts = <23>; - - status = "disabled"; - }; - nemc: nemc@13410000 { compatible = "ingenic,jz4780-nemc", "simple-mfd"; reg = <0x13410000 0x10000>; diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi index 8bd27edef2..dec7909d4b 100644 --- a/arch/mips/boot/dts/ingenic/x1000.dtsi +++ b/arch/mips/boot/dts/ingenic/x1000.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include -#include +#include #include / { diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi index 2595df8671..215257f8bb 100644 --- a/arch/mips/boot/dts/ingenic/x1830.dtsi +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 #include -#include +#include #include / { diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi index 8143a61111..bfc3d3243e 100644 --- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi +++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi @@ -52,11 +52,6 @@ package0: bus@10000000 { 0 0x40000000 0 0x40000000 0 0x40000000 0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>; - pm: reset-controller@1fe07000 { - compatible = "loongson,ls2k-pm"; - reg = <0 0x1fe07000 0 0x422>; - }; - liointc0: interrupt-controller@1fe11400 { compatible = "loongson,liointc-2.0"; reg = <0 0x1fe11400 0 0x40>, diff --git a/arch/mips/cavium-octeon/crypto/octeon-sha1.c b/arch/mips/cavium-octeon/crypto/octeon-sha1.c index 37a07b3c45..30f1d75208 100644 --- a/arch/mips/cavium-octeon/crypto/octeon-sha1.c +++ b/arch/mips/cavium-octeon/crypto/octeon-sha1.c @@ -15,7 +15,6 @@ #include #include -#include #include #include #include @@ -72,6 +71,20 @@ static void octeon_sha1_transform(const void *_block) octeon_sha1_start(block[7]); } +static int octeon_sha1_init(struct shash_desc *desc) +{ + struct sha1_state *sctx = shash_desc_ctx(desc); + + sctx->state[0] = SHA1_H0; + sctx->state[1] = SHA1_H1; + sctx->state[2] = SHA1_H2; + sctx->state[3] = SHA1_H3; + sctx->state[4] = SHA1_H4; + sctx->count = 0; + + return 0; +} + static void __octeon_sha1_update(struct sha1_state *sctx, const u8 *data, unsigned int len) { @@ -187,7 +200,7 @@ static int octeon_sha1_import(struct shash_desc *desc, const void *in) static struct shash_alg octeon_sha1_alg = { .digestsize = SHA1_DIGEST_SIZE, - .init = sha1_base_init, + .init = octeon_sha1_init, .update = octeon_sha1_update, .final = octeon_sha1_final, .export = octeon_sha1_export, diff --git a/arch/mips/cavium-octeon/crypto/octeon-sha256.c b/arch/mips/cavium-octeon/crypto/octeon-sha256.c index 435e4a6e7f..36cb92895d 100644 --- a/arch/mips/cavium-octeon/crypto/octeon-sha256.c +++ b/arch/mips/cavium-octeon/crypto/octeon-sha256.c @@ -16,7 +16,6 @@ #include #include -#include #include #include #include @@ -64,6 +63,40 @@ static void octeon_sha256_transform(const void *_block) octeon_sha256_start(block[7]); } +static int octeon_sha224_init(struct shash_desc *desc) +{ + struct sha256_state *sctx = shash_desc_ctx(desc); + + sctx->state[0] = SHA224_H0; + sctx->state[1] = SHA224_H1; + sctx->state[2] = SHA224_H2; + sctx->state[3] = SHA224_H3; + sctx->state[4] = SHA224_H4; + sctx->state[5] = SHA224_H5; + sctx->state[6] = SHA224_H6; + sctx->state[7] = SHA224_H7; + sctx->count = 0; + + return 0; +} + +static int octeon_sha256_init(struct shash_desc *desc) +{ + struct sha256_state *sctx = shash_desc_ctx(desc); + + sctx->state[0] = SHA256_H0; + sctx->state[1] = SHA256_H1; + sctx->state[2] = SHA256_H2; + sctx->state[3] = SHA256_H3; + sctx->state[4] = SHA256_H4; + sctx->state[5] = SHA256_H5; + sctx->state[6] = SHA256_H6; + sctx->state[7] = SHA256_H7; + sctx->count = 0; + + return 0; +} + static void __octeon_sha256_update(struct sha256_state *sctx, const u8 *data, unsigned int len) { @@ -191,7 +224,7 @@ static int octeon_sha256_import(struct shash_desc *desc, const void *in) static struct shash_alg octeon_sha256_algs[2] = { { .digestsize = SHA256_DIGEST_SIZE, - .init = sha256_base_init, + .init = octeon_sha256_init, .update = octeon_sha256_update, .final = octeon_sha256_final, .export = octeon_sha256_export, @@ -207,7 +240,7 @@ static struct shash_alg octeon_sha256_algs[2] = { { } }, { .digestsize = SHA224_DIGEST_SIZE, - .init = sha224_base_init, + .init = octeon_sha224_init, .update = octeon_sha256_update, .final = octeon_sha224_final, .descsize = sizeof(struct sha256_state), diff --git a/arch/mips/cavium-octeon/crypto/octeon-sha512.c b/arch/mips/cavium-octeon/crypto/octeon-sha512.c index 2dee9354e3..359f039820 100644 --- a/arch/mips/cavium-octeon/crypto/octeon-sha512.c +++ b/arch/mips/cavium-octeon/crypto/octeon-sha512.c @@ -15,7 +15,6 @@ #include #include -#include #include #include #include @@ -75,6 +74,40 @@ static void octeon_sha512_transform(const void *_block) octeon_sha512_start(block[15]); } +static int octeon_sha512_init(struct shash_desc *desc) +{ + struct sha512_state *sctx = shash_desc_ctx(desc); + + sctx->state[0] = SHA512_H0; + sctx->state[1] = SHA512_H1; + sctx->state[2] = SHA512_H2; + sctx->state[3] = SHA512_H3; + sctx->state[4] = SHA512_H4; + sctx->state[5] = SHA512_H5; + sctx->state[6] = SHA512_H6; + sctx->state[7] = SHA512_H7; + sctx->count[0] = sctx->count[1] = 0; + + return 0; +} + +static int octeon_sha384_init(struct shash_desc *desc) +{ + struct sha512_state *sctx = shash_desc_ctx(desc); + + sctx->state[0] = SHA384_H0; + sctx->state[1] = SHA384_H1; + sctx->state[2] = SHA384_H2; + sctx->state[3] = SHA384_H3; + sctx->state[4] = SHA384_H4; + sctx->state[5] = SHA384_H5; + sctx->state[6] = SHA384_H6; + sctx->state[7] = SHA384_H7; + sctx->count[0] = sctx->count[1] = 0; + + return 0; +} + static void __octeon_sha512_update(struct sha512_state *sctx, const u8 *data, unsigned int len) { @@ -190,7 +223,7 @@ static int octeon_sha384_final(struct shash_desc *desc, u8 *hash) static struct shash_alg octeon_sha512_algs[2] = { { .digestsize = SHA512_DIGEST_SIZE, - .init = sha512_base_init, + .init = octeon_sha512_init, .update = octeon_sha512_update, .final = octeon_sha512_final, .descsize = sizeof(struct sha512_state), @@ -203,7 +236,7 @@ static struct shash_alg octeon_sha512_algs[2] = { { } }, { .digestsize = SHA384_DIGEST_SIZE, - .init = sha384_base_init, + .init = octeon_sha384_init, .update = octeon_sha512_update, .final = octeon_sha384_final, .descsize = sizeof(struct sha512_state), diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper.c b/arch/mips/cavium-octeon/executive/cvmx-helper.c index b22f664e2d..6044ff4710 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper.c @@ -1055,6 +1055,16 @@ int cvmx_helper_initialize_packet_io_global(void) } EXPORT_SYMBOL_GPL(cvmx_helper_initialize_packet_io_global); +/** + * Does core local initialization for packet io + * + * Returns Zero on success, non-zero on failure + */ +int cvmx_helper_initialize_packet_io_local(void) +{ + return cvmx_pko_initialize_local(); +} + /** * Return the link state of an IPD/PKO port as returned by * auto negotiation. The result of this function may not match diff --git a/arch/mips/cavium-octeon/executive/cvmx-pko.c b/arch/mips/cavium-octeon/executive/cvmx-pko.c index ae8806e7bc..7c4879e743 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-pko.c +++ b/arch/mips/cavium-octeon/executive/cvmx-pko.c @@ -229,6 +229,20 @@ void cvmx_pko_initialize_global(void) } } +/* + * This function does per-core initialization required by the PKO routines. + * This must be called on all cores that will do packet output, and must + * be called after the FPA has been initialized and filled with pages. + * + * Returns 0 on success + * !0 on failure + */ +int cvmx_pko_initialize_local(void) +{ + /* Nothing to do */ + return 0; +} + /* * Enables the packet output hardware. It must already be * configured. diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index 844f882096..be5d4afcd3 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -2609,10 +2609,7 @@ static void octeon_irq_ciu3_ip2(void) else hw = intsn; - irq_enter(); - ret = generic_handle_domain_irq(domain, hw); - irq_exit(); - + ret = handle_domain_irq(domain, hw, NULL); if (ret < 0) { union cvmx_ciu3_iscx_w1c isc_w1c; u64 isc_w1c_addr = ciu3_addr + CIU3_ISC_W1C(intsn); diff --git a/arch/mips/configs/bmips_stb_defconfig b/arch/mips/configs/bmips_stb_defconfig index 5956fb95c1..625bd2d7e6 100644 --- a/arch/mips/configs/bmips_stb_defconfig +++ b/arch/mips/configs/bmips_stb_defconfig @@ -1,7 +1,6 @@ # CONFIG_LOCALVERSION_AUTO is not set # CONFIG_SWAP is not set CONFIG_NO_HZ=y -CONFIG_HZ=1000 CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y # CONFIG_VM_EVENT_COUNTERS is not set @@ -9,34 +8,17 @@ CONFIG_EXPERT=y CONFIG_BMIPS_GENERIC=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_HIGHMEM=y -CONFIG_HIGH_RES_TIMERS=y CONFIG_SMP=y CONFIG_NR_CPUS=4 -CONFIG_CC_STACKPROTECTOR_STRONG=y # CONFIG_SECCOMP is not set CONFIG_MIPS_O32_FP64_SUPPORT=y -# CONFIG_RD_GZIP is not set -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -CONFIG_RD_XZ=y -# CONFIG_RD_LZO is not set -# CONFIG_RD_LZ4 is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_PCI=y -CONFIG_PCI_MSI=y -CONFIG_PCIEASPM_POWERSAVE=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_BRCMSTB=y CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y CONFIG_BMIPS_CPUFREQ=y # CONFIG_BLK_DEV_BSG is not set CONFIG_NET=y @@ -50,99 +32,32 @@ CONFIG_INET=y # CONFIG_INET_DIAG is not set CONFIG_CFG80211=y CONFIG_NL80211_TESTMODE=y -CONFIG_WIRELESS=y CONFIG_MAC80211=y -CONFIG_NL80211=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_STANDALONE is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set -CONFIG_BRCMSTB_GISB_ARB=y -CONFIG_MODULES=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_IP_MULTICAST=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -CONFIG_IP_MROUTE=y -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -CONFIG_INET_UDP_DIAG=y -CONFIG_TCP_CONG_ADVANCED=y -CONFIG_TCP_CONG_BIC=y -# CONFIG_TCP_CONG_WESTWOOD is not set -# CONFIG_TCP_CONG_HTCP is not set -# CONFIG_IPV6 is not set -CONFIG_IP_NF_IPTABLES=y -CONFIG_IP_NF_FILTER=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_XTABLES=y -CONFIG_BRIDGE=y -CONFIG_BRIDGE_NETFILTER=m -CONFIG_BRIDGE_NF_EBTABLES=m -CONFIG_BRIDGE_EBT_BROUTE=m -CONFIG_NET_DSA=y -CONFIG_NET_SWITCHDEV=y -CONFIG_DMA_CMA=y -CONFIG_CMA_ALIGNMENT=12 -CONFIG_SPI=y -CONFIG_SPI_BRCMSTB=y CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_BLOCK=y CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_ROM=y -CONFIG_MTD_ABSENT=y -CONFIG_MTD_PHYSMAP_OF=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_BRCMNAND=y -CONFIG_MTD_SPI_NOR=y -# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_GLUEBI=y -CONFIG_PROC_DEVICETREE=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_MTD_PHYSMAP=y # CONFIG_BLK_DEV is not set CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -CONFIG_SCSI_MULTI_LUN=y # CONFIG_SCSI_LOWLEVEL is not set CONFIG_NETDEVICES=y -CONFIG_VLAN_8021Q=y -CONFIG_MACVLAN=y CONFIG_BCMGENET=y CONFIG_USB_USBNET=y -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT is not set # CONFIG_SERIO is not set -CONFIG_VT=y -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_DEVKMEM is not set +# CONFIG_VT is not set CONFIG_SERIAL_8250=y # CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y # CONFIG_HW_RANDOM is not set CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_BRCMSTB=y CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_SUPPLY=y # CONFIG_HWMON is not set @@ -154,76 +69,22 @@ CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_STORAGE=y CONFIG_SOC_BRCMSTB=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK_MINORS=16 -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y # CONFIG_DNOTIFY is not set -CONFIG_PROC_KCORE=y -CONFIG_CIFS=y -CONFIG_JBD2_DEBUG=y CONFIG_FUSE_FS=y -CONFIG_FHANDLE=y -CONFIG_CGROUPS=y -CONFIG_CUSE=y -CONFIG_ISO9660_FS=y -CONFIG_JOLIET=y -CONFIG_ZISOFS=y -CONFIG_UDF_FS=y -CONFIG_MSDOS_FS=y CONFIG_VFAT_FS=y +CONFIG_PROC_KCORE=y CONFIG_TMPFS=y -CONFIG_JFFS2_FS=y -CONFIG_UBIFS_FS=y -CONFIG_SQUASHFS=y -CONFIG_SQUASHFS_LZO=y -CONFIG_SQUASHFS_XZ=y CONFIG_NFS_FS=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_NFS_V4_1=y -CONFIG_NFS_V4_2=y -CONFIG_ROOT_NFS=y +CONFIG_CIFS=y CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y +# CONFIG_CRYPTO_HW is not set CONFIG_PRINTK_TIME=y -CONFIG_DYNAMIC_DEBUG=y -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_INFO_REDUCED is not set CONFIG_DEBUG_FS=y CONFIG_MAGIC_SYSRQ=y -CONFIG_LOCKUP_DETECTOR=y -CONFIG_DEBUG_USER=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="earlycon" -# CONFIG_MIPS_CMDLINE_FROM_DTB is not set -CONFIG_MIPS_CMDLINE_DTB_EXTEND=y -# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set -# CONFIG_CRYPTO_HW is not set -CONFIG_DT_BCM974XX=y -CONFIG_FW_CFE=y -CONFIG_ATA=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_AHCI_BRCMSTB=y -CONFIG_GENERIC_PHY=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_SYSFS=y -CONFIG_PHY_BRCM_USB=y -CONFIG_PHY_BRCM_SATA=y -CONFIG_PM_RUNTIME=y -CONFIG_PM_DEBUG=y -CONFIG_SYSVIPC=y -CONFIG_FUNCTION_GRAPH_TRACER=y -CONFIG_DYNAMIC_FTRACE=y -CONFIG_FUNCTION_TRACER=y -CONFIG_FUNCTION_PROFILER=y -CONFIG_IRQSOFF_TRACER=y -CONFIG_SCHED_TRACER=y -CONFIG_BLK_DEV_IO_TRACE=y -CONFIG_FTRACE_SYSCALLS=y -CONFIG_TRACER_SNAPSHOT=y -CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP=y -CONFIG_STACK_TRACER=y diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig index cc69b21585..ab7ebb0668 100644 --- a/arch/mips/configs/ci20_defconfig +++ b/arch/mips/configs/ci20_defconfig @@ -98,13 +98,7 @@ CONFIG_RC_DEVICES=y CONFIG_IR_GPIO_CIR=m CONFIG_IR_GPIO_TX=m CONFIG_MEDIA_SUPPORT=m -CONFIG_DRM=m -CONFIG_DRM_INGENIC=m -CONFIG_DRM_INGENIC_DW_HDMI=m -CONFIG_DRM_DISPLAY_CONNECTOR=m # CONFIG_VGA_CONSOLE is not set -CONFIG_FB=y -CONFIG_FRAMEBUFFER_CONSOLE=y # CONFIG_HID is not set CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/arch/mips/configs/decstation_64_defconfig b/arch/mips/configs/decstation_64_defconfig index e2ed105f8c..85f1955b4b 100644 --- a/arch/mips/configs/decstation_64_defconfig +++ b/arch/mips/configs/decstation_64_defconfig @@ -144,6 +144,7 @@ CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y +# CONFIG_MANDATORY_FILE_LOCKING is not set CONFIG_ISO9660_FS=y CONFIG_JOLIET=y CONFIG_PROC_KCORE=y diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig index 7e987d6f5e..30a6eafdb1 100644 --- a/arch/mips/configs/decstation_defconfig +++ b/arch/mips/configs/decstation_defconfig @@ -140,6 +140,7 @@ CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y +# CONFIG_MANDATORY_FILE_LOCKING is not set CONFIG_ISO9660_FS=y CONFIG_JOLIET=y CONFIG_PROC_KCORE=y diff --git a/arch/mips/configs/decstation_r4k_defconfig b/arch/mips/configs/decstation_r4k_defconfig index 6df5f6f2ac..e2b58dbf4a 100644 --- a/arch/mips/configs/decstation_r4k_defconfig +++ b/arch/mips/configs/decstation_r4k_defconfig @@ -140,6 +140,7 @@ CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y +# CONFIG_MANDATORY_FILE_LOCKING is not set CONFIG_ISO9660_FS=y CONFIG_JOLIET=y CONFIG_PROC_KCORE=y diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index 821630ac1b..638d7cf5ef 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig @@ -223,6 +223,7 @@ CONFIG_TMD_HERMES=m CONFIG_NORTEL_HERMES=m CONFIG_P54_COMMON=m CONFIG_P54_PCI=m +CONFIG_PRISM54=m CONFIG_LIBERTAS=m CONFIG_LIBERTAS_THINFIRM=m CONFIG_MWL8K=m diff --git a/arch/mips/configs/loongson3_defconfig b/arch/mips/configs/loongson3_defconfig index 25ecd15bc9..f02101ff04 100644 --- a/arch/mips/configs/loongson3_defconfig +++ b/arch/mips/configs/loongson3_defconfig @@ -282,7 +282,6 @@ CONFIG_DRM=y CONFIG_DRM_RADEON=m CONFIG_DRM_QXL=y CONFIG_DRM_VIRTIO_GPU=y -CONFIG_FB=y CONFIG_FB_RADEON=y CONFIG_LCD_CLASS_DEVICE=y CONFIG_LCD_PLATFORM=m diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig index 3321bb5769..9cb2cf2595 100644 --- a/arch/mips/configs/malta_defconfig +++ b/arch/mips/configs/malta_defconfig @@ -302,6 +302,7 @@ CONFIG_HOSTAP_FIRMWARE=y CONFIG_HOSTAP_FIRMWARE_NVRAM=y CONFIG_HOSTAP_PLX=m CONFIG_HOSTAP_PCI=m +CONFIG_PRISM54=m CONFIG_LIBERTAS=m CONFIG_INPUT_MOUSEDEV=y CONFIG_MOUSE_PS2_ELANTECH=y diff --git a/arch/mips/configs/malta_kvm_defconfig b/arch/mips/configs/malta_kvm_defconfig index 009b303722..5924e48fd3 100644 --- a/arch/mips/configs/malta_kvm_defconfig +++ b/arch/mips/configs/malta_kvm_defconfig @@ -310,6 +310,7 @@ CONFIG_HOSTAP_FIRMWARE=y CONFIG_HOSTAP_FIRMWARE_NVRAM=y CONFIG_HOSTAP_PLX=m CONFIG_HOSTAP_PCI=m +CONFIG_PRISM54=m CONFIG_LIBERTAS=m CONFIG_INPUT_MOUSEDEV=y CONFIG_SERIAL_8250=y diff --git a/arch/mips/configs/maltaup_xpa_defconfig b/arch/mips/configs/maltaup_xpa_defconfig index e214e13610..c0d3156ef6 100644 --- a/arch/mips/configs/maltaup_xpa_defconfig +++ b/arch/mips/configs/maltaup_xpa_defconfig @@ -309,6 +309,7 @@ CONFIG_HOSTAP_FIRMWARE=y CONFIG_HOSTAP_FIRMWARE_NVRAM=y CONFIG_HOSTAP_PLX=m CONFIG_HOSTAP_PCI=m +CONFIG_PRISM54=m CONFIG_LIBERTAS=m CONFIG_INPUT_MOUSEDEV=y CONFIG_MOUSE_PS2_ELANTECH=y diff --git a/arch/mips/configs/rbtx49xx_defconfig b/arch/mips/configs/rbtx49xx_defconfig index f8212a813b..69f2300107 100644 --- a/arch/mips/configs/rbtx49xx_defconfig +++ b/arch/mips/configs/rbtx49xx_defconfig @@ -10,6 +10,9 @@ CONFIG_EXPERT=y CONFIG_SLAB=y CONFIG_MACH_TX49XX=y CONFIG_TOSHIBA_RBTX4927=y +CONFIG_TOSHIBA_RBTX4938=y +CONFIG_TOSHIBA_RBTX4939=y +CONFIG_TOSHIBA_RBTX4938_MPLEX_KEEP=y # CONFIG_SECCOMP is not set CONFIG_PCI=y CONFIG_MODULES=y @@ -35,6 +38,7 @@ CONFIG_MTD_JEDECPROBE=y CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_COMPLEX_MAPPINGS=y CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_RBTX4939=y CONFIG_MTD_RAW_NAND=m CONFIG_MTD_NAND_TXX9NDFMC=m CONFIG_BLK_DEV_LOOP=y diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index a8a30bb1de..eaad0ed4b5 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c @@ -117,21 +117,21 @@ static void __init dec_be_init(void) { switch (mips_machtype) { case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */ - mips_set_be_handler(dec_kn01_be_handler); + board_be_handler = dec_kn01_be_handler; busirq_handler = dec_kn01_be_interrupt; busirq_flags |= IRQF_SHARED; dec_kn01_be_init(); break; case MACH_DS5000_1XX: /* DS5000/1xx 3min */ case MACH_DS5000_XX: /* DS5000/xx Maxine */ - mips_set_be_handler(dec_kn02xa_be_handler); + board_be_handler = dec_kn02xa_be_handler; busirq_handler = dec_kn02xa_be_interrupt; dec_kn02xa_be_init(); break; case MACH_DS5000_200: /* DS5000/200 3max */ case MACH_DS5000_2X0: /* DS5000/240 3max+ */ case MACH_DS5900: /* DS5900 bigmax */ - mips_set_be_handler(dec_ecc_be_handler); + board_be_handler = dec_ecc_be_handler; busirq_handler = dec_ecc_be_interrupt; dec_ecc_be_init(); break; diff --git a/arch/mips/generic/Platform b/arch/mips/generic/Platform index 0c03623f38..e1abc113b4 100644 --- a/arch/mips/generic/Platform +++ b/arch/mips/generic/Platform @@ -13,7 +13,8 @@ cflags-$(CONFIG_MACH_INGENIC_SOC) += -I$(srctree)/arch/mips/include/asm/mach-ing cflags-$(CONFIG_MIPS_GENERIC) += -I$(srctree)/arch/mips/include/asm/mach-generic load-$(CONFIG_MIPS_GENERIC) += 0xffffffff80100000 -all-$(CONFIG_MIPS_GENERIC) += vmlinux.gz.itb +zload-$(CONFIG_MIPS_GENERIC) += 0xffffffff81000000 +all-$(CONFIG_MIPS_GENERIC) := vmlinux.gz.itb its-y := vmlinux.its.S its-$(CONFIG_FIT_IMAGE_FDT_BOSTON) += board-boston.its.S diff --git a/arch/mips/generic/init.c b/arch/mips/generic/init.c index 1d712eac16..1842cddd83 100644 --- a/arch/mips/generic/init.c +++ b/arch/mips/generic/init.c @@ -110,15 +110,14 @@ void __init plat_mem_setup(void) void __init device_tree_init(void) { + int err; + unflatten_and_copy_device_tree(); mips_cpc_probe(); - if (!register_cps_smp_ops()) - return; - if (!register_vsmp_smp_ops()) - return; - - register_up_smp_ops(); + err = register_cps_smp_ops(); + if (err) + err = register_up_smp_ops(); } int __init apply_mips_fdt_fixups(void *fdt_out, size_t fdt_out_size, diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h index 336ac9b652..cc69f1deb1 100644 --- a/arch/mips/include/asm/asm.h +++ b/arch/mips/include/asm/asm.h @@ -19,7 +19,6 @@ #include #include -#include #ifndef __VDSO__ /* @@ -212,8 +211,6 @@ symbol = value #define LONG_SUB sub #define LONG_SUBU subu #define LONG_L lw -#define LONG_LL ll -#define LONG_SC sc #define LONG_S sw #define LONG_SP swp #define LONG_SLL sll @@ -222,8 +219,6 @@ symbol = value #define LONG_SRLV srlv #define LONG_SRA sra #define LONG_SRAV srav -#define LONG_INS ins -#define LONG_EXT ext #ifdef __ASSEMBLY__ #define LONG .word @@ -241,8 +236,6 @@ symbol = value #define LONG_SUB dsub #define LONG_SUBU dsubu #define LONG_L ld -#define LONG_LL lld -#define LONG_SC scd #define LONG_S sd #define LONG_SP sdp #define LONG_SLL dsll @@ -251,8 +244,6 @@ symbol = value #define LONG_SRLV dsrlv #define LONG_SRA dsra #define LONG_SRAV dsrav -#define LONG_INS dins -#define LONG_EXT dext #ifdef __ASSEMBLY__ #define LONG .dword @@ -329,19 +320,6 @@ symbol = value #define SSNOP sll zero, zero, 1 -/* - * Using a branch-likely instruction to check the result of an sc instruction - * works around a bug present in R10000 CPUs prior to revision 3.0 that could - * cause ll-sc sequences to execute non-atomically. - */ -#ifdef CONFIG_WAR_R10000_LLSC -# define SC_BEQZ beqzl -#elif MIPS_ISA_REV >= 6 -# define SC_BEQZ beqzc -#else -# define SC_BEQZ beqz -#endif - #ifdef CONFIG_SGI_IP28 /* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */ #include diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h index 712fb5a6a5..a0b9e7c1e4 100644 --- a/arch/mips/include/asm/atomic.h +++ b/arch/mips/include/asm/atomic.h @@ -16,12 +16,13 @@ #include #include -#include #include #include #include #include +#include #include +#include #define ATOMIC_OPS(pfx, type) \ static __always_inline type arch_##pfx##_read(const pfx##_t *v) \ @@ -73,7 +74,7 @@ static __inline__ void arch_##pfx##_##op(type i, pfx##_t * v) \ "1: " #ll " %0, %1 # " #pfx "_" #op " \n" \ " " #asm_op " %0, %2 \n" \ " " #sc " %0, %1 \n" \ - "\t" __stringify(SC_BEQZ) " %0, 1b \n" \ + "\t" __SC_BEQZ "%0, 1b \n" \ " .set pop \n" \ : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \ : "Ir" (i) : __LLSC_CLOBBER); \ @@ -103,7 +104,7 @@ arch_##pfx##_##op##_return_relaxed(type i, pfx##_t * v) \ "1: " #ll " %1, %2 # " #pfx "_" #op "_return\n" \ " " #asm_op " %0, %1, %3 \n" \ " " #sc " %0, %2 \n" \ - "\t" __stringify(SC_BEQZ) " %0, 1b \n" \ + "\t" __SC_BEQZ "%0, 1b \n" \ " " #asm_op " %0, %1, %3 \n" \ " .set pop \n" \ : "=&r" (result), "=&r" (temp), \ @@ -136,7 +137,7 @@ arch_##pfx##_fetch_##op##_relaxed(type i, pfx##_t * v) \ "1: " #ll " %1, %2 # " #pfx "_fetch_" #op "\n" \ " " #asm_op " %0, %1, %3 \n" \ " " #sc " %0, %2 \n" \ - "\t" __stringify(SC_BEQZ) " %0, 1b \n" \ + "\t" __SC_BEQZ "%0, 1b \n" \ " .set pop \n" \ " move %0, %1 \n" \ : "=&r" (result), "=&r" (temp), \ @@ -236,7 +237,7 @@ static __inline__ type arch_##pfx##_sub_if_positive(type i, pfx##_t * v) \ " .set push \n" \ " .set " MIPS_ISA_LEVEL " \n" \ " " #sc " %1, %2 \n" \ - " " __stringify(SC_BEQZ) " %1, 1b \n" \ + " " __SC_BEQZ "%1, 1b \n" \ "2: " __SYNC(full, loongson3_war) " \n" \ " .set pop \n" \ : "=&r" (result), "=&r" (temp), \ diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index b4bf754f7d..dc2a6234dd 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -16,12 +16,14 @@ #include #include #include -#include #include #include /* sigh ... */ #include #include +#include +#include #include +#include #define __bit_op(mem, insn, inputs...) do { \ unsigned long __temp; \ @@ -30,10 +32,10 @@ " .set push \n" \ " .set " MIPS_ISA_LEVEL " \n" \ " " __SYNC(full, loongson3_war) " \n" \ - "1: " __stringify(LONG_LL) " %0, %1 \n" \ + "1: " __LL "%0, %1 \n" \ " " insn " \n" \ - " " __stringify(LONG_SC) " %0, %1 \n" \ - " " __stringify(SC_BEQZ) " %0, 1b \n" \ + " " __SC "%0, %1 \n" \ + " " __SC_BEQZ "%0, 1b \n" \ " .set pop \n" \ : "=&r"(__temp), "+" GCC_OFF_SMALL_ASM()(mem) \ : inputs \ @@ -47,10 +49,10 @@ " .set push \n" \ " .set " MIPS_ISA_LEVEL " \n" \ " " __SYNC(full, loongson3_war) " \n" \ - "1: " __stringify(LONG_LL) " " ll_dst ", %2\n" \ + "1: " __LL ll_dst ", %2 \n" \ " " insn " \n" \ - " " __stringify(LONG_SC) " %1, %2 \n" \ - " " __stringify(SC_BEQZ) " %1, 1b \n" \ + " " __SC "%1, %2 \n" \ + " " __SC_BEQZ "%1, 1b \n" \ " .set pop \n" \ : "=&r"(__orig), "=&r"(__temp), \ "+" GCC_OFF_SMALL_ASM()(mem) \ @@ -96,7 +98,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) } if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit) && (bit >= 16)) { - __bit_op(*m, __stringify(LONG_INS) " %0, %3, %2, 1", "i"(bit), "r"(~0)); + __bit_op(*m, __INS "%0, %3, %2, 1", "i"(bit), "r"(~0)); return; } @@ -124,7 +126,7 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) } if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit)) { - __bit_op(*m, __stringify(LONG_INS) " %0, $0, %2, 1", "i"(bit)); + __bit_op(*m, __INS "%0, $0, %2, 1", "i"(bit)); return; } @@ -232,8 +234,8 @@ static inline int test_and_clear_bit(unsigned long nr, res = __mips_test_and_clear_bit(nr, addr); } else if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(nr)) { res = __test_bit_op(*m, "%1", - __stringify(LONG_EXT) " %0, %1, %3, 1;" - __stringify(LONG_INS) " %1, $0, %3, 1", + __EXT "%0, %1, %3, 1;" + __INS "%1, $0, %3, 1", "i"(bit)); } else { orig = __test_bit_op(*m, "%0", @@ -444,6 +446,7 @@ static inline int ffs(int word) } #include +#include #ifdef __KERNEL__ diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h index 7ec9493b28..66a8b293fd 100644 --- a/arch/mips/include/asm/cmpxchg.h +++ b/arch/mips/include/asm/cmpxchg.h @@ -10,9 +10,10 @@ #include #include -#include #include +#include #include +#include /* * These functions doesn't exist, so if they are called you'll either: @@ -47,7 +48,7 @@ extern unsigned long __xchg_called_with_bad_pointer(void) " move $1, %z3 \n" \ " .set " MIPS_ISA_ARCH_LEVEL " \n" \ " " st " $1, %1 \n" \ - "\t" __stringify(SC_BEQZ) " $1, 1b \n" \ + "\t" __SC_BEQZ "$1, 1b \n" \ " .set pop \n" \ : "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m) \ : GCC_OFF_SMALL_ASM() (*m), "Jr" (val) \ @@ -126,7 +127,7 @@ unsigned long __xchg(volatile void *ptr, unsigned long x, int size) " move $1, %z4 \n" \ " .set "MIPS_ISA_ARCH_LEVEL" \n" \ " " st " $1, %1 \n" \ - "\t" __stringify(SC_BEQZ) " $1, 1b \n" \ + "\t" __SC_BEQZ "$1, 1b \n" \ " .set pop \n" \ "2: " __SYNC(full, loongson3_war) " \n" \ : "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m) \ @@ -281,7 +282,7 @@ static inline unsigned long __cmpxchg64(volatile void *ptr, /* Attempt to store new at ptr */ " scd %L1, %2 \n" /* If we failed, loop! */ - "\t" __stringify(SC_BEQZ) " %L1, 1b \n" + "\t" __SC_BEQZ "%L1, 1b \n" "2: " __SYNC(full, loongson3_war) " \n" " .set pop \n" : "=&r"(ret), diff --git a/arch/mips/include/asm/cop2.h b/arch/mips/include/asm/cop2.h index 01b05be23a..6b7396a6a1 100644 --- a/arch/mips/include/asm/cop2.h +++ b/arch/mips/include/asm/cop2.h @@ -22,6 +22,17 @@ extern void octeon_cop2_restore(struct octeon_cop2_state *); #define cop2_present 1 #define cop2_lazy_restore 1 +#elif defined(CONFIG_CPU_XLP) + +extern void nlm_cop2_save(struct nlm_cop2_state *); +extern void nlm_cop2_restore(struct nlm_cop2_state *); + +#define cop2_save(r) nlm_cop2_save(&(r)->thread.cp2) +#define cop2_restore(r) nlm_cop2_restore(&(r)->thread.cp2) + +#define cop2_present 1 +#define cop2_lazy_restore 0 + #elif defined(CONFIG_CPU_LOONGSON64) #define cop2_present 1 diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h index 5efe8c8b85..2be5d7b5de 100644 --- a/arch/mips/include/asm/cpu-type.h +++ b/arch/mips/include/asm/cpu-type.h @@ -195,6 +195,14 @@ static inline int __pure __get_cpu_type(const int cpu_type) #ifdef CONFIG_SYS_HAS_CPU_BMIPS5000 case CPU_BMIPS5000: #endif + +#ifdef CONFIG_SYS_HAS_CPU_XLP + case CPU_XLP: +#endif + +#ifdef CONFIG_SYS_HAS_CPU_XLR + case CPU_XLR: +#endif break; default: unreachable(); diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 5c2f8d9cb7..d45a52f65b 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -328,7 +328,7 @@ enum cpu_type_enum { */ CPU_5KC, CPU_5KE, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2EF, CPU_LOONGSON64, CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, - CPU_CAVIUM_OCTEON2, CPU_CAVIUM_OCTEON3, CPU_I6500, + CPU_CAVIUM_OCTEON2, CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP, CPU_I6500, CPU_QEMU_GENERIC, diff --git a/arch/mips/include/asm/futex.h b/arch/mips/include/asm/futex.h index 8612a7e42d..d85248404c 100644 --- a/arch/mips/include/asm/futex.h +++ b/arch/mips/include/asm/futex.h @@ -19,11 +19,7 @@ #include #include -#define arch_futex_atomic_op_inuser arch_futex_atomic_op_inuser -#define futex_atomic_cmpxchg_inatomic futex_atomic_cmpxchg_inatomic -#include - -#define __futex_atomic_op(op, insn, ret, oldval, uaddr, oparg) \ +#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ { \ if (cpu_has_llsc && IS_ENABLED(CONFIG_WAR_R10000_LLSC)) { \ __asm__ __volatile__( \ @@ -84,10 +80,8 @@ : "0" (0), GCC_OFF_SMALL_ASM() (*uaddr), "Jr" (oparg), \ "i" (-EFAULT) \ : "memory"); \ - } else { \ - /* fallback for non-SMP */ \ - ret = futex_atomic_op_inuser_local(op, oparg, oval, uaddr); \ - } \ + } else \ + ret = -ENOSYS; \ } static inline int @@ -100,23 +94,23 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr) switch (op) { case FUTEX_OP_SET: - __futex_atomic_op(op, "move $1, %z5", ret, oldval, uaddr, oparg); + __futex_atomic_op("move $1, %z5", ret, oldval, uaddr, oparg); break; case FUTEX_OP_ADD: - __futex_atomic_op(op, "addu $1, %1, %z5", + __futex_atomic_op("addu $1, %1, %z5", ret, oldval, uaddr, oparg); break; case FUTEX_OP_OR: - __futex_atomic_op(op, "or $1, %1, %z5", + __futex_atomic_op("or $1, %1, %z5", ret, oldval, uaddr, oparg); break; case FUTEX_OP_ANDN: - __futex_atomic_op(op, "and $1, %1, %z5", + __futex_atomic_op("and $1, %1, %z5", ret, oldval, uaddr, ~oparg); break; case FUTEX_OP_XOR: - __futex_atomic_op(op, "xor $1, %1, %z5", + __futex_atomic_op("xor $1, %1, %z5", ret, oldval, uaddr, oparg); break; default: @@ -199,9 +193,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, : GCC_OFF_SMALL_ASM() (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT) : "memory"); - } else { - return futex_atomic_cmpxchg_inatomic_local(uval, uaddr, oldval, newval); - } + } else + return -ENOSYS; *uval = val; return ret; diff --git a/arch/mips/include/asm/ginvt.h b/arch/mips/include/asm/ginvt.h index 87b2974ffc..6eb7c2b94d 100644 --- a/arch/mips/include/asm/ginvt.h +++ b/arch/mips/include/asm/ginvt.h @@ -12,13 +12,11 @@ enum ginvt_type { #ifdef TOOLCHAIN_SUPPORTS_GINV # define _ASM_SET_GINV ".set ginv\n" -# define _ASM_UNSET_GINV #else -# define _ASM_SET_GINV \ - _ASM_MACRO_1R1I(ginvt, rs, type, \ - _ASM_INSN_IF_MIPS(0x7c0000bd | (__rs << 21) | (\\type << 8)) \ - _ASM_INSN32_IF_MM(0x0000717c | (__rs << 16) | (\\type << 9))) -# define _ASM_UNSET_GINV ".purgem ginvt\n" +_ASM_MACRO_1R1I(ginvt, rs, type, + _ASM_INSN_IF_MIPS(0x7c0000bd | (__rs << 21) | (\\type << 8)) + _ASM_INSN32_IF_MM(0x0000717c | (__rs << 16) | (\\type << 9))); +# define _ASM_SET_GINV #endif static __always_inline void ginvt(unsigned long addr, enum ginvt_type type) @@ -27,7 +25,6 @@ static __always_inline void ginvt(unsigned long addr, enum ginvt_type type) ".set push\n" _ASM_SET_GINV " ginvt %0, %1\n" - _ASM_UNSET_GINV ".set pop" : /* no outputs */ : "r"(addr), "i"(type) diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h index cb16be93b0..f855478d12 100644 --- a/arch/mips/include/asm/hazards.h +++ b/arch/mips/include/asm/hazards.h @@ -160,7 +160,7 @@ do { \ #elif defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \ defined(CONFIG_CPU_LOONGSON2EF) || defined(CONFIG_CPU_LOONGSON64) || \ - defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_R5500) + defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_XLR) /* * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. diff --git a/arch/mips/include/asm/kgdb.h b/arch/mips/include/asm/kgdb.h index b4e210d633..4f2302267d 100644 --- a/arch/mips/include/asm/kgdb.h +++ b/arch/mips/include/asm/kgdb.h @@ -18,7 +18,7 @@ #ifdef CONFIG_32BIT #define KGDB_GDB_REG_SIZE 32 #define GDB_SIZEOF_REG sizeof(u32) -#else /* CONFIG_32BIT */ +#else /* CONFIG_CPU_32BIT */ #define KGDB_GDB_REG_SIZE 64 #define GDB_SIZEOF_REG sizeof(u64) #endif diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h index 717716cc51..696f6b0093 100644 --- a/arch/mips/include/asm/kvm_host.h +++ b/arch/mips/include/asm/kvm_host.h @@ -20,7 +20,6 @@ #include #include -#include #include #include @@ -380,9 +379,9 @@ static inline void _kvm_atomic_set_c0_guest_reg(unsigned long *reg, __asm__ __volatile__( " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" - " "__stringify(LONG_LL) " %0, %1 \n" + " " __LL "%0, %1 \n" " or %0, %2 \n" - " "__stringify(LONG_SC) " %0, %1 \n" + " " __SC "%0, %1 \n" " .set pop \n" : "=&r" (temp), "+m" (*reg) : "r" (val)); @@ -397,9 +396,9 @@ static inline void _kvm_atomic_clear_c0_guest_reg(unsigned long *reg, __asm__ __volatile__( " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" - " "__stringify(LONG_LL) " %0, %1 \n" + " " __LL "%0, %1 \n" " and %0, %2 \n" - " "__stringify(LONG_SC) " %0, %1 \n" + " " __SC "%0, %1 \n" " .set pop \n" : "=&r" (temp), "+m" (*reg) : "r" (~val)); @@ -415,10 +414,10 @@ static inline void _kvm_atomic_change_c0_guest_reg(unsigned long *reg, __asm__ __volatile__( " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" - " "__stringify(LONG_LL) " %0, %1 \n" + " " __LL "%0, %1 \n" " and %0, %2 \n" " or %0, %3 \n" - " "__stringify(LONG_SC) " %0, %1 \n" + " " __SC "%0, %1 \n" " .set pop \n" : "=&r" (temp), "+m" (*reg) : "r" (~change), "r" (val & change)); @@ -898,6 +897,7 @@ static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {} static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} +static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB int kvm_arch_flush_remote_tlb(struct kvm *kvm); diff --git a/arch/mips/include/asm/local.h b/arch/mips/include/asm/local.h index 08366b1fd2..3fa6340903 100644 --- a/arch/mips/include/asm/local.h +++ b/arch/mips/include/asm/local.h @@ -8,6 +8,7 @@ #include #include #include +#include typedef struct { @@ -31,18 +32,34 @@ static __inline__ long local_add_return(long i, local_t * l) { unsigned long result; - if (kernel_uses_llsc) { + if (kernel_uses_llsc && IS_ENABLED(CONFIG_WAR_R10000_LLSC)) { + unsigned long temp; + + __asm__ __volatile__( + " .set push \n" + " .set arch=r4000 \n" + __SYNC(full, loongson3_war) " \n" + "1:" __LL "%1, %2 # local_add_return \n" + __stringify(LONG_ADDU) " %0, %1, %3 \n" + __SC "%0, %2 \n" + " beqzl %0, 1b \n" + " addu %0, %1, %3 \n" + " .set pop \n" + : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) + : "Ir" (i), "m" (l->a.counter) + : "memory"); + } else if (kernel_uses_llsc) { unsigned long temp; __asm__ __volatile__( " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" - __SYNC(full, loongson3_war) " \n" - "1:" __stringify(LONG_LL) " %1, %2 \n" - __stringify(LONG_ADDU) " %0, %1, %3 \n" - __stringify(LONG_SC) " %0, %2 \n" - __stringify(SC_BEQZ) " %0, 1b \n" + __SYNC(full, loongson3_war) " \n" + "1:" __LL "%1, %2 # local_add_return \n" __stringify(LONG_ADDU) " %0, %1, %3 \n" + __SC "%0, %2 \n" + " beqz %0, 1b \n" + " addu %0, %1, %3 \n" " .set pop \n" : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) : "Ir" (i), "m" (l->a.counter) @@ -64,19 +81,34 @@ static __inline__ long local_sub_return(long i, local_t * l) { unsigned long result; - if (kernel_uses_llsc) { + if (kernel_uses_llsc && IS_ENABLED(CONFIG_WAR_R10000_LLSC)) { + unsigned long temp; + + __asm__ __volatile__( + " .set push \n" + " .set arch=r4000 \n" + __SYNC(full, loongson3_war) " \n" + "1:" __LL "%1, %2 # local_sub_return \n" + __stringify(LONG_SUBU) " %0, %1, %3 \n" + __SC "%0, %2 \n" + " beqzl %0, 1b \n" + " subu %0, %1, %3 \n" + " .set pop \n" + : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) + : "Ir" (i), "m" (l->a.counter) + : "memory"); + } else if (kernel_uses_llsc) { unsigned long temp; __asm__ __volatile__( " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" - __SYNC(full, loongson3_war) " \n" - "1:" __stringify(LONG_LL) " %1, %2 \n" - __stringify(LONG_SUBU) " %0, %1, %3 \n" - __stringify(LONG_SUBU) " %0, %1, %3 \n" - __stringify(LONG_SC) " %0, %2 \n" - __stringify(SC_BEQZ) " %0, 1b \n" + __SYNC(full, loongson3_war) " \n" + "1:" __LL "%1, %2 # local_sub_return \n" __stringify(LONG_SUBU) " %0, %1, %3 \n" + __SC "%0, %2 \n" + " beqz %0, 1b \n" + " subu %0, %1, %3 \n" " .set pop \n" : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) : "Ir" (i), "m" (l->a.counter) diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h index 6583639fe7..f879be3e80 100644 --- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h +++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h @@ -72,7 +72,6 @@ enum bcm47xx_board { BCM47XX_BOARD_LINKSYS_WRT300NV11, BCM47XX_BOARD_LINKSYS_WRT310NV1, BCM47XX_BOARD_LINKSYS_WRT310NV2, - BCM47XX_BOARD_LINKSYS_WRT320N_V1, BCM47XX_BOARD_LINKSYS_WRT54G3GV2, BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101, BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467, @@ -100,12 +99,9 @@ enum bcm47xx_board { BCM47XX_BOARD_MOTOROLA_WR850GV2V3, BCM47XX_BOARD_NETGEAR_R6200_V1, - BCM47XX_BOARD_NETGEAR_R6300_V1, BCM47XX_BOARD_NETGEAR_WGR614V8, BCM47XX_BOARD_NETGEAR_WGR614V9, BCM47XX_BOARD_NETGEAR_WGR614_V10, - BCM47XX_BOARD_NETGEAR_WN2500RP_V1, - BCM47XX_BOARD_NETGEAR_WN2500RP_V2, BCM47XX_BOARD_NETGEAR_WNDR3300, BCM47XX_BOARD_NETGEAR_WNDR3400V1, BCM47XX_BOARD_NETGEAR_WNDR3400V2, diff --git a/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h b/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h index 3dee15c61c..8218a1356b 100644 --- a/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h +++ b/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h @@ -8,7 +8,7 @@ #define LTQ_DMA_H__ #define LTQ_DESC_SIZE 0x08 /* each descriptor is 64bit */ -#define LTQ_DESC_NUM 0xC0 /* 192 descriptors / channel */ +#define LTQ_DESC_NUM 0x40 /* 64 descriptors / channel */ #define LTQ_DMA_OWN BIT(31) /* owner bit */ #define LTQ_DMA_C BIT(30) /* complete bit */ @@ -45,6 +45,6 @@ extern void ltq_dma_close(struct ltq_dma_channel *ch); extern void ltq_dma_alloc_tx(struct ltq_dma_channel *ch); extern void ltq_dma_alloc_rx(struct ltq_dma_channel *ch); extern void ltq_dma_free(struct ltq_dma_channel *ch); -extern void ltq_dma_init_port(int p, int tx_burst, int rx_burst); +extern void ltq_dma_init_port(int p); #endif diff --git a/arch/mips/include/asm/mach-loongson64/loongson_regs.h b/arch/mips/include/asm/mach-loongson64/loongson_regs.h index b5be7511f6..1659935147 100644 --- a/arch/mips/include/asm/mach-loongson64/loongson_regs.h +++ b/arch/mips/include/asm/mach-loongson64/loongson_regs.h @@ -21,10 +21,8 @@ static inline u32 read_cpucfg(u32 reg) u32 __res; __asm__ __volatile__( - _ASM_SET_PARSE_R "parse_r __res,%0\n\t" "parse_r reg,%1\n\t" - _ASM_UNSET_PARSE_R ".insn \n\t" ".word (0xc8080118 | (reg << 21) | (__res << 11))\n\t" :"=r"(__res) @@ -145,10 +143,8 @@ static inline u32 csr_readl(u32 reg) /* RDCSR reg, val */ __asm__ __volatile__( - _ASM_SET_PARSE_R "parse_r __res,%0\n\t" "parse_r reg,%1\n\t" - _ASM_UNSET_PARSE_R ".insn \n\t" ".word (0xc8000118 | (reg << 21) | (__res << 11))\n\t" :"=r"(__res) @@ -164,10 +160,8 @@ static inline u64 csr_readq(u32 reg) /* DRDCSR reg, val */ __asm__ __volatile__( - _ASM_SET_PARSE_R "parse_r __res,%0\n\t" "parse_r reg,%1\n\t" - _ASM_UNSET_PARSE_R ".insn \n\t" ".word (0xc8020118 | (reg << 21) | (__res << 11))\n\t" :"=r"(__res) @@ -181,10 +175,8 @@ static inline void csr_writel(u32 val, u32 reg) { /* WRCSR reg, val */ __asm__ __volatile__( - _ASM_SET_PARSE_R "parse_r reg,%0\n\t" "parse_r val,%1\n\t" - _ASM_UNSET_PARSE_R ".insn \n\t" ".word (0xc8010118 | (reg << 21) | (val << 11))\n\t" : @@ -197,10 +189,8 @@ static inline void csr_writeq(u64 val, u32 reg) { /* DWRCSR reg, val */ __asm__ __volatile__( - _ASM_SET_PARSE_R "parse_r reg,%0\n\t" "parse_r val,%1\n\t" - _ASM_UNSET_PARSE_R ".insn \n\t" ".word (0xc8030118 | (reg << 21) | (val << 11))\n\t" : @@ -253,10 +243,8 @@ static inline u64 drdtime(void) u64 val = 0; __asm__ __volatile__( - _ASM_SET_PARSE_R "parse_r rID,%0\n\t" "parse_r val,%1\n\t" - _ASM_UNSET_PARSE_R ".insn \n\t" ".word (0xc8090118 | (rID << 21) | (val << 11))\n\t" :"=r"(rID),"=r"(val) diff --git a/arch/mips/include/asm/mach-ralink/spaces.h b/arch/mips/include/asm/mach-ralink/spaces.h index f7af11ea2d..87d085c9ad 100644 --- a/arch/mips/include/asm/mach-ralink/spaces.h +++ b/arch/mips/include/asm/mach-ralink/spaces.h @@ -2,11 +2,9 @@ #ifndef __ASM_MACH_RALINK_SPACES_H_ #define __ASM_MACH_RALINK_SPACES_H_ -#define PCI_IOBASE mips_io_port_base -#define PCI_IOSIZE SZ_64K +#define PCI_IOBASE _AC(0xa0000000, UL) +#define PCI_IOSIZE SZ_16M #define IO_SPACE_LIMIT (PCI_IOSIZE - 1) -#define pci_remap_iospace pci_remap_iospace - #include #endif diff --git a/arch/mips/include/asm/mach-tx49xx/mangle-port.h b/arch/mips/include/asm/mach-tx49xx/mangle-port.h index 50b1b8f1e1..98c7abf448 100644 --- a/arch/mips/include/asm/mach-tx49xx/mangle-port.h +++ b/arch/mips/include/asm/mach-tx49xx/mangle-port.h @@ -9,8 +9,16 @@ #define ioswabb(a, x) (x) #define __mem_ioswabb(a, x) (x) +#if defined(CONFIG_TOSHIBA_RBTX4939) && \ + IS_ENABLED(CONFIG_SMC91X) && \ + defined(__BIG_ENDIAN) +#define NEEDS_TXX9_IOSWABW +extern u16 (*ioswabw)(volatile u16 *a, u16 x); +extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x); +#else #define ioswabw(a, x) le16_to_cpu((__force __le16)(x)) #define __mem_ioswabw(a, x) (x) +#endif #define ioswabl(a, x) le32_to_cpu((__force __le32)(x)) #define __mem_ioswabl(a, x) (x) #define ioswabq(a, x) le64_to_cpu((__force __le64)(x)) diff --git a/arch/mips/include/asm/mips-cps.h b/arch/mips/include/asm/mips-cps.h index c077e8d100..fd43d87689 100644 --- a/arch/mips/include/asm/mips-cps.h +++ b/arch/mips/include/asm/mips-cps.h @@ -7,7 +7,6 @@ #ifndef __MIPS_ASM_MIPS_CPS_H__ #define __MIPS_ASM_MIPS_CPS_H__ -#include #include #include @@ -113,10 +112,14 @@ static inline void clear_##unit##_##name(uint##sz##_t val) \ */ static inline unsigned int mips_cps_numclusters(void) { + unsigned int num_clusters; + if (mips_cm_revision() < CM_REV_CM3_5) return 1; - return FIELD_GET(CM_GCR_CONFIG_NUM_CLUSTERS, read_gcr_config()); + num_clusters = read_gcr_config() & CM_GCR_CONFIG_NUM_CLUSTERS; + num_clusters >>= __ffs(CM_GCR_CONFIG_NUM_CLUSTERS); + return num_clusters; } /** @@ -166,8 +169,7 @@ static inline unsigned int mips_cps_numcores(unsigned int cluster) return 0; /* Add one before masking to handle 0xff indicating no cores */ - return FIELD_GET(CM_GCR_CONFIG_PCORES, - mips_cps_cluster_config(cluster) + 1); + return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES; } /** @@ -179,11 +181,14 @@ static inline unsigned int mips_cps_numcores(unsigned int cluster) */ static inline unsigned int mips_cps_numiocu(unsigned int cluster) { + unsigned int num_iocu; + if (!mips_cm_present()) return 0; - return FIELD_GET(CM_GCR_CONFIG_NUMIOCU, - mips_cps_cluster_config(cluster)); + num_iocu = mips_cps_cluster_config(cluster) & CM_GCR_CONFIG_NUMIOCU; + num_iocu >>= __ffs(CM_GCR_CONFIG_NUMIOCU); + return num_iocu; } /** @@ -225,7 +230,7 @@ static inline unsigned int mips_cps_numvps(unsigned int cluster, unsigned int co mips_cm_unlock_other(); - return FIELD_GET(CM_GCR_Cx_CONFIG_PVPE, cfg + 1); + return (cfg + 1) & CM_GCR_Cx_CONFIG_PVPE; } #endif /* __MIPS_ASM_MIPS_CPS_H__ */ diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 2616353b94..acdf8c6922 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -1297,22 +1297,22 @@ static inline int mm_insn_16bit(u16 insn) "\\var = " #n "\n\t" \ ".endif\n\t" -#define _ASM_SET_PARSE_R \ - ".macro parse_r var r\n\t" \ - "\\var = -1\n\t" \ - _IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) \ - _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) \ - _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) \ - _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) \ - _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) \ - _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) \ - _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) \ - _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31) \ - ".iflt \\var\n\t" \ - ".error \"Unable to parse register name \\r\"\n\t" \ - ".endif\n\t" \ - ".endm\n\t" -#define _ASM_UNSET_PARSE_R ".purgem parse_r\n\t" +__asm__(".macro parse_r var r\n\t" + "\\var = -1\n\t" + _IFC_REG(0) _IFC_REG(1) _IFC_REG(2) _IFC_REG(3) + _IFC_REG(4) _IFC_REG(5) _IFC_REG(6) _IFC_REG(7) + _IFC_REG(8) _IFC_REG(9) _IFC_REG(10) _IFC_REG(11) + _IFC_REG(12) _IFC_REG(13) _IFC_REG(14) _IFC_REG(15) + _IFC_REG(16) _IFC_REG(17) _IFC_REG(18) _IFC_REG(19) + _IFC_REG(20) _IFC_REG(21) _IFC_REG(22) _IFC_REG(23) + _IFC_REG(24) _IFC_REG(25) _IFC_REG(26) _IFC_REG(27) + _IFC_REG(28) _IFC_REG(29) _IFC_REG(30) _IFC_REG(31) + ".iflt \\var\n\t" + ".error \"Unable to parse register name \\r\"\n\t" + ".endif\n\t" + ".endm"); + +#undef _IFC_REG /* * C macros for generating assembler macros for common instruction formats. @@ -1322,45 +1322,43 @@ static inline int mm_insn_16bit(u16 insn) * the ENC encodings. */ +/* Instructions with no operands */ +#define _ASM_MACRO_0(OP, ENC) \ + __asm__(".macro " #OP "\n\t" \ + ENC \ + ".endm") + /* Instructions with 1 register operand & 1 immediate operand */ #define _ASM_MACRO_1R1I(OP, R1, I2, ENC) \ - ".macro " #OP " " #R1 ", " #I2 "\n\t" \ - _ASM_SET_PARSE_R \ + __asm__(".macro " #OP " " #R1 ", " #I2 "\n\t" \ "parse_r __" #R1 ", \\" #R1 "\n\t" \ ENC \ - _ASM_UNSET_PARSE_R \ - ".endm\n\t" + ".endm") /* Instructions with 2 register operands */ #define _ASM_MACRO_2R(OP, R1, R2, ENC) \ - ".macro " #OP " " #R1 ", " #R2 "\n\t" \ - _ASM_SET_PARSE_R \ + __asm__(".macro " #OP " " #R1 ", " #R2 "\n\t" \ "parse_r __" #R1 ", \\" #R1 "\n\t" \ "parse_r __" #R2 ", \\" #R2 "\n\t" \ ENC \ - _ASM_UNSET_PARSE_R \ - ".endm\n\t" + ".endm") /* Instructions with 3 register operands */ #define _ASM_MACRO_3R(OP, R1, R2, R3, ENC) \ - ".macro " #OP " " #R1 ", " #R2 ", " #R3 "\n\t" \ - _ASM_SET_PARSE_R \ + __asm__(".macro " #OP " " #R1 ", " #R2 ", " #R3 "\n\t" \ "parse_r __" #R1 ", \\" #R1 "\n\t" \ "parse_r __" #R2 ", \\" #R2 "\n\t" \ "parse_r __" #R3 ", \\" #R3 "\n\t" \ ENC \ - _ASM_UNSET_PARSE_R \ - ".endm\n\t" + ".endm") /* Instructions with 2 register operands and 1 optional select operand */ #define _ASM_MACRO_2R_1S(OP, R1, R2, SEL3, ENC) \ - ".macro " #OP " " #R1 ", " #R2 ", " #SEL3 " = 0\n\t" \ - _ASM_SET_PARSE_R \ + __asm__(".macro " #OP " " #R1 ", " #R2 ", " #SEL3 " = 0\n\t" \ "parse_r __" #R1 ", \\" #R1 "\n\t" \ "parse_r __" #R2 ", \\" #R2 "\n\t" \ ENC \ - _ASM_UNSET_PARSE_R \ - ".endm\n\t" + ".endm") /* * TLB Invalidate Flush @@ -1620,21 +1618,15 @@ do { \ } while (0) #ifndef TOOLCHAIN_SUPPORTS_XPA -#define _ASM_SET_MFHC0 \ - _ASM_MACRO_2R_1S(mfhc0, rt, rs, sel, \ - _ASM_INSN_IF_MIPS(0x40400000 | __rt << 16 | __rs << 11 | \\sel) \ - _ASM_INSN32_IF_MM(0x000000f4 | __rt << 21 | __rs << 16 | \\sel << 11)) -#define _ASM_UNSET_MFHC0 ".purgem mfhc0\n\t" -#define _ASM_SET_MTHC0 \ - _ASM_MACRO_2R_1S(mthc0, rt, rd, sel, \ - _ASM_INSN_IF_MIPS(0x40c00000 | __rt << 16 | __rd << 11 | \\sel) \ - _ASM_INSN32_IF_MM(0x000002f4 | __rt << 21 | __rd << 16 | \\sel << 11)) -#define _ASM_UNSET_MTHC0 ".purgem mthc0\n\t" +_ASM_MACRO_2R_1S(mfhc0, rt, rs, sel, + _ASM_INSN_IF_MIPS(0x40400000 | __rt << 16 | __rs << 11 | \\sel) + _ASM_INSN32_IF_MM(0x000000f4 | __rt << 21 | __rs << 16 | \\sel << 11)); +_ASM_MACRO_2R_1S(mthc0, rt, rd, sel, + _ASM_INSN_IF_MIPS(0x40c00000 | __rt << 16 | __rd << 11 | \\sel) + _ASM_INSN32_IF_MM(0x000002f4 | __rt << 21 | __rd << 16 | \\sel << 11)); +#define _ASM_SET_XPA "" #else /* !TOOLCHAIN_SUPPORTS_XPA */ -#define _ASM_SET_MFHC0 ".set\txpa\n\t" -#define _ASM_SET_MTHC0 ".set\txpa\n\t" -#define _ASM_UNSET_MFHC0 -#define _ASM_UNSET_MTHC0 +#define _ASM_SET_XPA ".set\txpa\n\t" #endif #define __readx_32bit_c0_register(source, sel) \ @@ -1644,9 +1636,8 @@ do { \ __asm__ __volatile__( \ " .set push \n" \ " .set mips32r2 \n" \ - _ASM_SET_MFHC0 \ + _ASM_SET_XPA \ " mfhc0 %0, " #source ", %1 \n" \ - _ASM_UNSET_MFHC0 \ " .set pop \n" \ : "=r" (__res) \ : "i" (sel)); \ @@ -1658,9 +1649,8 @@ do { \ __asm__ __volatile__( \ " .set push \n" \ " .set mips32r2 \n" \ - _ASM_SET_MTHC0 \ + _ASM_SET_XPA \ " mthc0 %z0, " #register ", %1 \n" \ - _ASM_UNSET_MTHC0 \ " .set pop \n" \ : \ : "Jr" (value), "i" (sel)); \ @@ -2056,58 +2046,31 @@ do { \ */ #ifndef TOOLCHAIN_SUPPORTS_VIRT -#define _ASM_SET_MFGC0 \ - _ASM_MACRO_2R_1S(mfgc0, rt, rs, sel, \ - _ASM_INSN_IF_MIPS(0x40600000 | __rt << 16 | __rs << 11 | \\sel) \ - _ASM_INSN32_IF_MM(0x000004fc | __rt << 21 | __rs << 16 | \\sel << 11)) -#define _ASM_UNSET_MFGC0 ".purgem mfgc0\n\t" -#define _ASM_SET_DMFGC0 \ - _ASM_MACRO_2R_1S(dmfgc0, rt, rs, sel, \ - _ASM_INSN_IF_MIPS(0x40600100 | __rt << 16 | __rs << 11 | \\sel) \ - _ASM_INSN32_IF_MM(0x580004fc | __rt << 21 | __rs << 16 | \\sel << 11)) -#define _ASM_UNSET_DMFGC0 ".purgem dmfgc0\n\t" -#define _ASM_SET_MTGC0 \ - _ASM_MACRO_2R_1S(mtgc0, rt, rd, sel, \ - _ASM_INSN_IF_MIPS(0x40600200 | __rt << 16 | __rd << 11 | \\sel) \ - _ASM_INSN32_IF_MM(0x000006fc | __rt << 21 | __rd << 16 | \\sel << 11)) -#define _ASM_UNSET_MTGC0 ".purgem mtgc0\n\t" -#define _ASM_SET_DMTGC0 \ - _ASM_MACRO_2R_1S(dmtgc0, rt, rd, sel, \ - _ASM_INSN_IF_MIPS(0x40600300 | __rt << 16 | __rd << 11 | \\sel) \ - _ASM_INSN32_IF_MM(0x580006fc | __rt << 21 | __rd << 16 | \\sel << 11)) -#define _ASM_UNSET_DMTGC0 ".purgem dmtgc0\n\t" - -#define __tlbgp() \ - _ASM_INSN_IF_MIPS(0x42000010) \ - _ASM_INSN32_IF_MM(0x0000017c) -#define __tlbgr() \ - _ASM_INSN_IF_MIPS(0x42000009) \ - _ASM_INSN32_IF_MM(0x0000117c) -#define __tlbgwi() \ - _ASM_INSN_IF_MIPS(0x4200000a) \ - _ASM_INSN32_IF_MM(0x0000217c) -#define __tlbgwr() \ - _ASM_INSN_IF_MIPS(0x4200000e) \ - _ASM_INSN32_IF_MM(0x0000317c) -#define __tlbginvf() \ - _ASM_INSN_IF_MIPS(0x4200000c) \ - _ASM_INSN32_IF_MM(0x0000517c) +_ASM_MACRO_2R_1S(mfgc0, rt, rs, sel, + _ASM_INSN_IF_MIPS(0x40600000 | __rt << 16 | __rs << 11 | \\sel) + _ASM_INSN32_IF_MM(0x000004fc | __rt << 21 | __rs << 16 | \\sel << 11)); +_ASM_MACRO_2R_1S(dmfgc0, rt, rs, sel, + _ASM_INSN_IF_MIPS(0x40600100 | __rt << 16 | __rs << 11 | \\sel) + _ASM_INSN32_IF_MM(0x580004fc | __rt << 21 | __rs << 16 | \\sel << 11)); +_ASM_MACRO_2R_1S(mtgc0, rt, rd, sel, + _ASM_INSN_IF_MIPS(0x40600200 | __rt << 16 | __rd << 11 | \\sel) + _ASM_INSN32_IF_MM(0x000006fc | __rt << 21 | __rd << 16 | \\sel << 11)); +_ASM_MACRO_2R_1S(dmtgc0, rt, rd, sel, + _ASM_INSN_IF_MIPS(0x40600300 | __rt << 16 | __rd << 11 | \\sel) + _ASM_INSN32_IF_MM(0x580006fc | __rt << 21 | __rd << 16 | \\sel << 11)); +_ASM_MACRO_0(tlbgp, _ASM_INSN_IF_MIPS(0x42000010) + _ASM_INSN32_IF_MM(0x0000017c)); +_ASM_MACRO_0(tlbgr, _ASM_INSN_IF_MIPS(0x42000009) + _ASM_INSN32_IF_MM(0x0000117c)); +_ASM_MACRO_0(tlbgwi, _ASM_INSN_IF_MIPS(0x4200000a) + _ASM_INSN32_IF_MM(0x0000217c)); +_ASM_MACRO_0(tlbgwr, _ASM_INSN_IF_MIPS(0x4200000e) + _ASM_INSN32_IF_MM(0x0000317c)); +_ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c) + _ASM_INSN32_IF_MM(0x0000517c)); +#define _ASM_SET_VIRT "" #else /* !TOOLCHAIN_SUPPORTS_VIRT */ #define _ASM_SET_VIRT ".set\tvirt\n\t" -#define _ASM_SET_MFGC0 _ASM_SET_VIRT -#define _ASM_SET_DMFGC0 _ASM_SET_VIRT -#define _ASM_SET_MTGC0 _ASM_SET_VIRT -#define _ASM_SET_DMTGC0 _ASM_SET_VIRT -#define _ASM_UNSET_MFGC0 -#define _ASM_UNSET_DMFGC0 -#define _ASM_UNSET_MTGC0 -#define _ASM_UNSET_DMTGC0 - -#define __tlbgp() _ASM_SET_VIRT "tlbgp\n\t" -#define __tlbgr() _ASM_SET_VIRT "tlbgr\n\t" -#define __tlbgwi() _ASM_SET_VIRT "tlbgwi\n\t" -#define __tlbgwr() _ASM_SET_VIRT "tlbgwr\n\t" -#define __tlbginvf() _ASM_SET_VIRT "tlbginvf\n\t" #endif #define __read_32bit_gc0_register(source, sel) \ @@ -2115,9 +2078,8 @@ do { \ __asm__ __volatile__( \ ".set\tpush\n\t" \ ".set\tmips32r5\n\t" \ - _ASM_SET_MFGC0 \ + _ASM_SET_VIRT \ "mfgc0\t%0, " #source ", %1\n\t" \ - _ASM_UNSET_MFGC0 \ ".set\tpop" \ : "=r" (__res) \ : "i" (sel)); \ @@ -2129,9 +2091,8 @@ do { \ __asm__ __volatile__( \ ".set\tpush\n\t" \ ".set\tmips64r5\n\t" \ - _ASM_SET_DMFGC0 \ + _ASM_SET_VIRT \ "dmfgc0\t%0, " #source ", %1\n\t" \ - _ASM_UNSET_DMFGC0 \ ".set\tpop" \ : "=r" (__res) \ : "i" (sel)); \ @@ -2143,9 +2104,8 @@ do { \ __asm__ __volatile__( \ ".set\tpush\n\t" \ ".set\tmips32r5\n\t" \ - _ASM_SET_MTGC0 \ + _ASM_SET_VIRT \ "mtgc0\t%z0, " #register ", %1\n\t" \ - _ASM_UNSET_MTGC0 \ ".set\tpop" \ : : "Jr" ((unsigned int)(value)), \ "i" (sel)); \ @@ -2156,9 +2116,8 @@ do { \ __asm__ __volatile__( \ ".set\tpush\n\t" \ ".set\tmips64r5\n\t" \ - _ASM_SET_DMTGC0 \ + _ASM_SET_VIRT \ "dmtgc0\t%z0, " #register ", %1\n\t" \ - _ASM_UNSET_DMTGC0 \ ".set\tpop" \ : : "Jr" (value), \ "i" (sel)); \ @@ -2829,7 +2788,8 @@ static inline void guest_tlb_probe(void) __asm__ __volatile__( ".set push\n\t" ".set noreorder\n\t" - __tlbgp() + _ASM_SET_VIRT + "tlbgp\n\t" ".set pop"); } @@ -2838,7 +2798,8 @@ static inline void guest_tlb_read(void) __asm__ __volatile__( ".set push\n\t" ".set noreorder\n\t" - __tlbgr() + _ASM_SET_VIRT + "tlbgr\n\t" ".set pop"); } @@ -2847,7 +2808,8 @@ static inline void guest_tlb_write_indexed(void) __asm__ __volatile__( ".set push\n\t" ".set noreorder\n\t" - __tlbgwi() + _ASM_SET_VIRT + "tlbgwi\n\t" ".set pop"); } @@ -2856,7 +2818,8 @@ static inline void guest_tlb_write_random(void) __asm__ __volatile__( ".set push\n\t" ".set noreorder\n\t" - __tlbgwr() + _ASM_SET_VIRT + "tlbgwr\n\t" ".set pop"); } @@ -2868,7 +2831,8 @@ static inline void guest_tlbinvf(void) __asm__ __volatile__( ".set push\n\t" ".set noreorder\n\t" - __tlbginvf() + _ASM_SET_VIRT + "tlbginvf\n\t" ".set pop"); } diff --git a/arch/mips/include/asm/msa.h b/arch/mips/include/asm/msa.h index 236a49ee2e..e0a3dd5233 100644 --- a/arch/mips/include/asm/msa.h +++ b/arch/mips/include/asm/msa.h @@ -162,26 +162,16 @@ static inline void init_msa_upper(void) * to allow compilation with toolchains that do not support MSA. Once all * toolchains in use support MSA these can be removed. */ - -#define _ASM_SET_CFCMSA \ - _ASM_MACRO_2R(cfcmsa, rd, cs, \ - _ASM_INSN_IF_MIPS(0x787e0019 | __cs << 11 | __rd << 6) \ - _ASM_INSN32_IF_MM(0x587e0016 | __cs << 11 | __rd << 6)) -#define _ASM_UNSET_CFCMSA ".purgem cfcmsa\n\t" -#define _ASM_SET_CTCMSA \ - _ASM_MACRO_2R(ctcmsa, cd, rs, \ - _ASM_INSN_IF_MIPS(0x783e0019 | __rs << 11 | __cd << 6) \ - _ASM_INSN32_IF_MM(0x583e0016 | __rs << 11 | __cd << 6)) -#define _ASM_UNSET_CTCMSA ".purgem ctcmsa\n\t" +_ASM_MACRO_2R(cfcmsa, rd, cs, + _ASM_INSN_IF_MIPS(0x787e0019 | __cs << 11 | __rd << 6) + _ASM_INSN32_IF_MM(0x587e0016 | __cs << 11 | __rd << 6)); +_ASM_MACRO_2R(ctcmsa, cd, rs, + _ASM_INSN_IF_MIPS(0x783e0019 | __rs << 11 | __cd << 6) + _ASM_INSN32_IF_MM(0x583e0016 | __rs << 11 | __cd << 6)); +#define _ASM_SET_MSA "" #else /* TOOLCHAIN_SUPPORTS_MSA */ -#define _ASM_SET_CFCMSA \ - ".set\tfp=64\n\t" \ - ".set\tmsa\n\t" -#define _ASM_UNSET_CFCMSA -#define _ASM_SET_CTCMSA \ - ".set\tfp=64\n\t" \ - ".set\tmsa\n\t" -#define _ASM_UNSET_CTCMSA +#define _ASM_SET_MSA ".set\tfp=64\n\t" \ + ".set\tmsa\n\t" #endif #define __BUILD_MSA_CTL_REG(name, cs) \ @@ -190,9 +180,8 @@ static inline unsigned int read_msa_##name(void) \ unsigned int reg; \ __asm__ __volatile__( \ " .set push\n" \ - _ASM_SET_CFCMSA \ + _ASM_SET_MSA \ " cfcmsa %0, $" #cs "\n" \ - _ASM_UNSET_CFCMSA \ " .set pop\n" \ : "=r"(reg)); \ return reg; \ @@ -202,9 +191,8 @@ static inline void write_msa_##name(unsigned int val) \ { \ __asm__ __volatile__( \ " .set push\n" \ - _ASM_SET_CTCMSA \ + _ASM_SET_MSA \ " ctcmsa $" #cs ", %0\n" \ - _ASM_UNSET_CTCMSA \ " .set pop\n" \ : : "r"(val)); \ } diff --git a/arch/mips/include/asm/octeon/cvmx-helper.h b/arch/mips/include/asm/octeon/cvmx-helper.h index 0cddce3529..c6c99e28ee 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper.h +++ b/arch/mips/include/asm/octeon/cvmx-helper.h @@ -93,6 +93,13 @@ extern int cvmx_helper_ipd_and_packet_input_enable(void); */ extern int cvmx_helper_initialize_packet_io_global(void); +/** + * Does core local initialization for packet io + * + * Returns Zero on success, non-zero on failure + */ +extern int cvmx_helper_initialize_packet_io_local(void); + /** * Returns the number of ports on the given interface. * The interface must be initialized before the port count diff --git a/arch/mips/include/asm/octeon/cvmx-pko.h b/arch/mips/include/asm/octeon/cvmx-pko.h index 5fec8476e4..03fb64b13f 100644 --- a/arch/mips/include/asm/octeon/cvmx-pko.h +++ b/arch/mips/include/asm/octeon/cvmx-pko.h @@ -277,6 +277,7 @@ typedef struct { * output system. */ extern void cvmx_pko_initialize_global(void); +extern int cvmx_pko_initialize_local(void); /** * Enables the packet output hardware. It must already be diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h index 7b8037f25d..804889b709 100644 --- a/arch/mips/include/asm/pgtable.h +++ b/arch/mips/include/asm/pgtable.h @@ -86,9 +86,10 @@ extern void paging_init(void); */ #define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd)) -#ifndef CONFIG_MIPS_HUGE_TLB_SUPPORT -#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) -#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */ +#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) +#ifndef CONFIG_TRANSPARENT_HUGEPAGE +#define pmd_page(pmd) __pmd_page(pmd) +#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #define pmd_page_vaddr(pmd) pmd_val(pmd) @@ -415,25 +416,6 @@ static inline pte_t pte_mkhuge(pte_t pte) pte_val(pte) |= _PAGE_HUGE; return pte; } - -#define pmd_write pmd_write -static inline int pmd_write(pmd_t pmd) -{ - return !!(pmd_val(pmd) & _PAGE_WRITE); -} - -static inline unsigned long pmd_pfn(pmd_t pmd) -{ - return pmd_val(pmd) >> _PFN_SHIFT; -} - -static inline struct page *pmd_page(pmd_t pmd) -{ - if (pmd_val(pmd) & _PAGE_HUGE) - return pfn_to_page(pmd_pfn(pmd)); - - return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT); -} #endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */ #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY @@ -609,6 +591,12 @@ static inline pmd_t pmd_mkhuge(pmd_t pmd) extern void set_pmd_at(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp, pmd_t pmd); +#define pmd_write pmd_write +static inline int pmd_write(pmd_t pmd) +{ + return !!(pmd_val(pmd) & _PAGE_WRITE); +} + static inline pmd_t pmd_wrprotect(pmd_t pmd) { pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); @@ -689,6 +677,19 @@ static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) /* Extern to avoid header file madness */ extern pmd_t mk_pmd(struct page *page, pgprot_t prot); +static inline unsigned long pmd_pfn(pmd_t pmd) +{ + return pmd_val(pmd) >> _PFN_SHIFT; +} + +static inline struct page *pmd_page(pmd_t pmd) +{ + if (pmd_trans_huge(pmd)) + return pfn_to_page(pmd_pfn(pmd)); + + return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT); +} + static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) { pmd_val(pmd) = (pmd_val(pmd) & (_PAGE_CHG_MASK | _PAGE_HUGE)) | diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index 4bb24579d1..0c3550c82b 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h @@ -207,6 +207,16 @@ struct octeon_cvmseg_state { [cpu_dcache_line_size() / sizeof(unsigned long)]; }; +#elif defined(CONFIG_CPU_XLP) +struct nlm_cop2_state { + u64 rx[4]; + u64 tx[4]; + u32 tx_msg_status; + u32 rx_msg_status; +}; + +#define COP2_INIT \ + .cp2 = {{0}, {0}, 0, 0}, #else #define COP2_INIT #endif @@ -264,6 +274,9 @@ struct thread_struct { #ifdef CONFIG_CPU_CAVIUM_OCTEON struct octeon_cop2_state cp2 __attribute__ ((__aligned__(128))); struct octeon_cvmseg_state cvmseg __attribute__ ((__aligned__(128))); +#endif +#ifdef CONFIG_CPU_XLP + struct nlm_cop2_state cp2; #endif struct mips_abi *abi; }; @@ -356,7 +369,7 @@ static inline void flush_thread(void) { } -unsigned long __get_wchan(struct task_struct *p); +unsigned long get_wchan(struct task_struct *p); #define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + \ THREAD_SIZE - 32 - sizeof(struct pt_regs)) diff --git a/arch/mips/include/asm/sibyte/sb1250_mc.h b/arch/mips/include/asm/sibyte/sb1250_mc.h index 61411619df..c02fe823ef 100644 --- a/arch/mips/include/asm/sibyte/sb1250_mc.h +++ b/arch/mips/include/asm/sibyte/sb1250_mc.h @@ -484,7 +484,7 @@ /* - * Bank Address Bits Register (Table 6-22) + * Bank Address Address Bits Register (Table 6-22) */ #define S_MC_BA_RESERVED 0 diff --git a/arch/mips/include/asm/smp-ops.h b/arch/mips/include/asm/smp-ops.h index 864aea8039..65618ff128 100644 --- a/arch/mips/include/asm/smp-ops.h +++ b/arch/mips/include/asm/smp-ops.h @@ -101,9 +101,6 @@ static inline int register_vsmp_smp_ops(void) #ifdef CONFIG_MIPS_MT_SMP extern const struct plat_smp_ops vsmp_smp_ops; - if (!cpu_has_mipsmt) - return -ENODEV; - register_smp_ops(&vsmp_smp_ops); return 0; diff --git a/arch/mips/include/asm/traps.h b/arch/mips/include/asm/traps.h index 15cde638b4..b710e76c9c 100644 --- a/arch/mips/include/asm/traps.h +++ b/arch/mips/include/asm/traps.h @@ -15,7 +15,7 @@ #define MIPS_BE_FATAL 2 /* treat as an unrecoverable error */ extern void (*board_be_init)(void); -void mips_set_be_handler(int (*handler)(struct pt_regs *reg, int is_fixup)); +extern int (*board_be_handler)(struct pt_regs *regs, int is_fixup); extern void (*board_nmi_handler_setup)(void); extern void (*board_ejtag_handler_setup)(void); diff --git a/arch/mips/include/asm/txx9/boards.h b/arch/mips/include/asm/txx9/boards.h index 70284e90dc..d45237befd 100644 --- a/arch/mips/include/asm/txx9/boards.h +++ b/arch/mips/include/asm/txx9/boards.h @@ -6,3 +6,9 @@ BOARD_VEC(jmr3927_vec) BOARD_VEC(rbtx4927_vec) BOARD_VEC(rbtx4937_vec) #endif +#ifdef CONFIG_TOSHIBA_RBTX4938 +BOARD_VEC(rbtx4938_vec) +#endif +#ifdef CONFIG_TOSHIBA_RBTX4939 +BOARD_VEC(rbtx4939_vec) +#endif diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h index 296bcf31ab..f7effca791 100644 --- a/arch/mips/include/asm/uasm.h +++ b/arch/mips/include/asm/uasm.h @@ -145,7 +145,6 @@ Ip_u1(_mtlo); Ip_u3u1u2(_mul); Ip_u1u2(_multu); Ip_u3u1u2(_mulu); -Ip_u3u1u2(_muhu); Ip_u3u1u2(_nor); Ip_u3u1u2(_or); Ip_u2u1u3(_ori); @@ -249,11 +248,7 @@ static inline void uasm_l##lb(struct uasm_label **lab, u32 *addr) \ #define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off) #define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3) #define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b) -#ifdef CONFIG_CPU_NOP_WORKAROUNDS -#define uasm_i_nop(buf) uasm_i_or(buf, 1, 1, 0) -#else #define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0) -#endif #define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1) static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1, diff --git a/arch/mips/include/asm/vermagic.h b/arch/mips/include/asm/vermagic.h index 0904de0b5e..371c1873df 100644 --- a/arch/mips/include/asm/vermagic.h +++ b/arch/mips/include/asm/vermagic.h @@ -54,6 +54,10 @@ #define MODULE_PROC_FAMILY "OCTEON " #elif defined CONFIG_CPU_P5600 #define MODULE_PROC_FAMILY "P5600 " +#elif defined CONFIG_CPU_XLR +#define MODULE_PROC_FAMILY "XLR " +#elif defined CONFIG_CPU_XLP +#define MODULE_PROC_FAMILY "XLP " #else #error MODULE_PROC_FAMILY undefined for your processor configuration #endif diff --git a/arch/mips/include/uapi/asm/socket.h b/arch/mips/include/uapi/asm/socket.h index 24e0efb360..1eaf6a1ca5 100644 --- a/arch/mips/include/uapi/asm/socket.h +++ b/arch/mips/include/uapi/asm/socket.h @@ -142,8 +142,6 @@ #define SO_BUF_LOCK 72 -#define SO_RESERVE_MEM 73 - #if !defined(__KERNEL__) #if __BITS_PER_LONG == 64 diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 24a529c6c4..7c861e6a89 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1886,6 +1886,87 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) } } +static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu) +{ + decode_configs(c); + + if ((c->processor_id & PRID_IMP_MASK) == PRID_IMP_NETLOGIC_AU13XX) { + c->cputype = CPU_ALCHEMY; + __cpu_name[cpu] = "Au1300"; + /* following stuff is not for Alchemy */ + return; + } + + c->options = (MIPS_CPU_TLB | + MIPS_CPU_4KEX | + MIPS_CPU_COUNTER | + MIPS_CPU_DIVEC | + MIPS_CPU_WATCH | + MIPS_CPU_EJTAG | + MIPS_CPU_LLSC); + + switch (c->processor_id & PRID_IMP_MASK) { + case PRID_IMP_NETLOGIC_XLP2XX: + case PRID_IMP_NETLOGIC_XLP9XX: + case PRID_IMP_NETLOGIC_XLP5XX: + c->cputype = CPU_XLP; + __cpu_name[cpu] = "Broadcom XLPII"; + break; + + case PRID_IMP_NETLOGIC_XLP8XX: + case PRID_IMP_NETLOGIC_XLP3XX: + c->cputype = CPU_XLP; + __cpu_name[cpu] = "Netlogic XLP"; + break; + + case PRID_IMP_NETLOGIC_XLR732: + case PRID_IMP_NETLOGIC_XLR716: + case PRID_IMP_NETLOGIC_XLR532: + case PRID_IMP_NETLOGIC_XLR308: + case PRID_IMP_NETLOGIC_XLR532C: + case PRID_IMP_NETLOGIC_XLR516C: + case PRID_IMP_NETLOGIC_XLR508C: + case PRID_IMP_NETLOGIC_XLR308C: + c->cputype = CPU_XLR; + __cpu_name[cpu] = "Netlogic XLR"; + break; + + case PRID_IMP_NETLOGIC_XLS608: + case PRID_IMP_NETLOGIC_XLS408: + case PRID_IMP_NETLOGIC_XLS404: + case PRID_IMP_NETLOGIC_XLS208: + case PRID_IMP_NETLOGIC_XLS204: + case PRID_IMP_NETLOGIC_XLS108: + case PRID_IMP_NETLOGIC_XLS104: + case PRID_IMP_NETLOGIC_XLS616B: + case PRID_IMP_NETLOGIC_XLS608B: + case PRID_IMP_NETLOGIC_XLS416B: + case PRID_IMP_NETLOGIC_XLS412B: + case PRID_IMP_NETLOGIC_XLS408B: + case PRID_IMP_NETLOGIC_XLS404B: + c->cputype = CPU_XLR; + __cpu_name[cpu] = "Netlogic XLS"; + break; + + default: + pr_info("Unknown Netlogic chip id [%02x]!\n", + c->processor_id); + c->cputype = CPU_XLR; + break; + } + + if (c->cputype == CPU_XLP) { + set_isa(c, MIPS_CPU_ISA_M64R2); + c->options |= (MIPS_CPU_FPU | MIPS_CPU_ULRI | MIPS_CPU_MCHECK); + /* This will be updated again after all threads are woken up */ + c->tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1; + } else { + set_isa(c, MIPS_CPU_ISA_M64R1); + c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1; + } + c->kscratch_mask = 0xf; +} + #ifdef CONFIG_64BIT /* For use by uaccess.h */ u64 __ua_limit; @@ -1950,6 +2031,9 @@ void cpu_probe(void) case PRID_COMP_INGENIC_E1: cpu_probe_ingenic(c, cpu); break; + case PRID_COMP_NETLOGIC: + cpu_probe_netlogic(c, cpu); + break; } BUG_ON(!__cpu_name[cpu]); diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c index c81b3a0394..1aca3b4db9 100644 --- a/arch/mips/kernel/idle.c +++ b/arch/mips/kernel/idle.c @@ -175,6 +175,8 @@ void __init check_wait(void) case CPU_CAVIUM_OCTEON3: case CPU_XBURST: case CPU_LOONGSON32: + case CPU_XLR: + case CPU_XLP: cpu_wait = r4k_wait; break; case CPU_LOONGSON64: diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 5e11582fe3..d20e002b32 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -111,9 +111,15 @@ void __irq_entry do_IRQ(unsigned int irq) #ifdef CONFIG_IRQ_DOMAIN void __irq_entry do_domain_IRQ(struct irq_domain *domain, unsigned int hwirq) { + struct irq_desc *desc; + irq_enter(); check_stack_overflow(); - generic_handle_domain_irq(domain, hwirq); + + desc = irq_resolve_mapping(domain, hwirq); + if (likely(desc)) + handle_irq_desc(desc); + irq_exit(); } #endif diff --git a/arch/mips/kernel/kprobes.c b/arch/mips/kernel/kprobes.c index 6c7f3b143f..75bff0f773 100644 --- a/arch/mips/kernel/kprobes.c +++ b/arch/mips/kernel/kprobes.c @@ -11,8 +11,6 @@ * Copyright (C) IBM Corporation, 2002, 2004 */ -#define pr_fmt(fmt) "kprobes: " fmt - #include #include #include @@ -82,7 +80,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) insn = p->addr[0]; if (insn_has_ll_or_sc(insn)) { - pr_notice("Kprobes for ll and sc instructions are not supported\n"); + pr_notice("Kprobes for ll and sc instructions are not" + "supported\n"); ret = -EINVAL; goto out; } @@ -220,7 +219,7 @@ static int evaluate_branch_instruction(struct kprobe *p, struct pt_regs *regs, return 0; unaligned: - pr_notice("Failed to emulate branch instruction because of unaligned epc - sending SIGBUS to %s.\n", current->comm); + pr_notice("%s: unaligned epc - sending SIGBUS.\n", current->comm); force_sig(SIGBUS); return -EFAULT; @@ -239,8 +238,10 @@ static void prepare_singlestep(struct kprobe *p, struct pt_regs *regs, regs->cp0_epc = (unsigned long)p->addr; else if (insn_has_delayslot(p->opcode)) { ret = evaluate_branch_instruction(p, regs, kcb); - if (ret < 0) + if (ret < 0) { + pr_notice("Kprobes: Error in evaluating branch\n"); return; + } } regs->cp0_epc = (unsigned long)&p->ainsn.insn[0]; } @@ -460,14 +461,14 @@ static void __used kretprobe_trampoline_holder(void) /* Keep the assembler from reordering and placing JR here. */ ".set noreorder\n\t" "nop\n\t" - ".global __kretprobe_trampoline\n" - "__kretprobe_trampoline:\n\t" + ".global kretprobe_trampoline\n" + "kretprobe_trampoline:\n\t" "nop\n\t" ".set pop" : : : "memory"); } -void __kretprobe_trampoline(void); +void kretprobe_trampoline(void); void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, struct pt_regs *regs) @@ -476,7 +477,7 @@ void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, ri->fp = NULL; /* Replace the return addr with trampoline addr */ - regs->regs[31] = (unsigned long)__kretprobe_trampoline; + regs->regs[31] = (unsigned long)kretprobe_trampoline; } /* @@ -485,7 +486,8 @@ void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, static int __kprobes trampoline_probe_handler(struct kprobe *p, struct pt_regs *regs) { - instruction_pointer(regs) = __kretprobe_trampoline_handler(regs, NULL); + instruction_pointer(regs) = __kretprobe_trampoline_handler(regs, + kretprobe_trampoline, NULL); /* * By returning a non-zero value, we are telling * kprobe_handler() that we don't want the post_handler @@ -496,14 +498,14 @@ static int __kprobes trampoline_probe_handler(struct kprobe *p, int __kprobes arch_trampoline_kprobe(struct kprobe *p) { - if (p->addr == (kprobe_opcode_t *)__kretprobe_trampoline) + if (p->addr == (kprobe_opcode_t *)kretprobe_trampoline) return 1; return 0; } static struct kprobe trampoline_p = { - .addr = (kprobe_opcode_t *)__kretprobe_trampoline, + .addr = (kprobe_opcode_t *)kretprobe_trampoline, .pre_handler = trampoline_probe_handler }; diff --git a/arch/mips/kernel/mips-cpc.c b/arch/mips/kernel/mips-cpc.c index 17aff13cd7..8d2535123f 100644 --- a/arch/mips/kernel/mips-cpc.c +++ b/arch/mips/kernel/mips-cpc.c @@ -4,7 +4,6 @@ * Author: Paul Burton */ -#include #include #include #include @@ -98,7 +97,7 @@ void mips_cpc_lock_other(unsigned int core) curr_core = cpu_core(¤t_cpu_data); spin_lock_irqsave(&per_cpu(cpc_core_lock, curr_core), per_cpu(cpc_core_lock_flags, curr_core)); - write_cpc_cl_other(FIELD_PREP(CPC_Cx_OTHER_CORENUM, core)); + write_cpc_cl_other(core << __ffs(CPC_Cx_OTHER_CORENUM)); /* * Ensure the core-other region reflects the appropriate core & diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index 1641d274fe..22e22c2de1 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c @@ -1002,6 +1002,15 @@ static const struct mips_perf_event bmips5000_event_map [PERF_COUNT_HW_BRANCH_MISSES] = { 0x02, CNTR_ODD, T }, }; +static const struct mips_perf_event xlp_event_map[PERF_COUNT_HW_MAX] = { + [PERF_COUNT_HW_CPU_CYCLES] = { 0x01, CNTR_ALL }, + [PERF_COUNT_HW_INSTRUCTIONS] = { 0x18, CNTR_ALL }, /* PAPI_TOT_INS */ + [PERF_COUNT_HW_CACHE_REFERENCES] = { 0x04, CNTR_ALL }, /* PAPI_L1_ICA */ + [PERF_COUNT_HW_CACHE_MISSES] = { 0x07, CNTR_ALL }, /* PAPI_L1_ICM */ + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x1b, CNTR_ALL }, /* PAPI_BR_CN */ + [PERF_COUNT_HW_BRANCH_MISSES] = { 0x1c, CNTR_ALL }, /* PAPI_BR_MSP */ +}; + /* 24K/34K/1004K/interAptiv/loongson1 cores share the same cache event map. */ static const struct mips_perf_event mipsxxcore_cache_map [PERF_COUNT_HW_CACHE_MAX] @@ -1468,6 +1477,63 @@ static const struct mips_perf_event octeon_cache_map }, }; +static const struct mips_perf_event xlp_cache_map + [PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] + [PERF_COUNT_HW_CACHE_RESULT_MAX] = { +[C(L1D)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x31, CNTR_ALL }, /* PAPI_L1_DCR */ + [C(RESULT_MISS)] = { 0x30, CNTR_ALL }, /* PAPI_L1_LDM */ + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x2f, CNTR_ALL }, /* PAPI_L1_DCW */ + [C(RESULT_MISS)] = { 0x2e, CNTR_ALL }, /* PAPI_L1_STM */ + }, +}, +[C(L1I)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x04, CNTR_ALL }, /* PAPI_L1_ICA */ + [C(RESULT_MISS)] = { 0x07, CNTR_ALL }, /* PAPI_L1_ICM */ + }, +}, +[C(LL)] = { + [C(OP_READ)] = { + [C(RESULT_ACCESS)] = { 0x35, CNTR_ALL }, /* PAPI_L2_DCR */ + [C(RESULT_MISS)] = { 0x37, CNTR_ALL }, /* PAPI_L2_LDM */ + }, + [C(OP_WRITE)] = { + [C(RESULT_ACCESS)] = { 0x34, CNTR_ALL }, /* PAPI_L2_DCA */ + [C(RESULT_MISS)] = { 0x36, CNTR_ALL }, /* PAPI_L2_DCM */ + }, +}, +[C(DTLB)] = { + /* + * Only general DTLB misses are counted use the same event for + * read and write. + */ + [C(OP_READ)] = { + [C(RESULT_MISS)] = { 0x2d, CNTR_ALL }, /* PAPI_TLB_DM */ + }, + [C(OP_WRITE)] = { + [C(RESULT_MISS)] = { 0x2d, CNTR_ALL }, /* PAPI_TLB_DM */ + }, +}, +[C(ITLB)] = { + [C(OP_READ)] = { + [C(RESULT_MISS)] = { 0x08, CNTR_ALL }, /* PAPI_TLB_IM */ + }, + [C(OP_WRITE)] = { + [C(RESULT_MISS)] = { 0x08, CNTR_ALL }, /* PAPI_TLB_IM */ + }, +}, +[C(BPU)] = { + [C(OP_READ)] = { + [C(RESULT_MISS)] = { 0x25, CNTR_ALL }, + }, +}, +}; + static int __hw_perf_event_init(struct perf_event *event) { struct perf_event_attr *attr = &event->attr; @@ -1887,6 +1953,20 @@ static const struct mips_perf_event *octeon_pmu_map_raw_event(u64 config) return &raw_event; } +static const struct mips_perf_event *xlp_pmu_map_raw_event(u64 config) +{ + unsigned int raw_id = config & 0xff; + + /* Only 1-63 are defined */ + if ((raw_id < 0x01) || (raw_id > 0x3f)) + return ERR_PTR(-EOPNOTSUPP); + + raw_event.cntr_mask = CNTR_ALL; + raw_event.event_id = raw_id; + + return &raw_event; +} + static int __init init_hw_perf_events(void) { @@ -2011,6 +2091,12 @@ init_hw_perf_events(void) mipspmu.general_event_map = &bmips5000_event_map; mipspmu.cache_event_map = &bmips5000_cache_map; break; + case CPU_XLP: + mipspmu.name = "xlp"; + mipspmu.general_event_map = &xlp_event_map; + mipspmu.cache_event_map = &xlp_cache_map; + mipspmu.map_raw_event = xlp_pmu_map_raw_event; + break; default: pr_cont("Either hardware does not support performance " "counters, or not yet implemented.\n"); diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 9f47a889b0..4184d641f0 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -19,8 +19,8 @@ unsigned int vced_count, vcei_count; /* - * No lock; only written during early bootup by CPU 0. - */ + * * No lock; only written during early bootup by CPU 0. + * */ static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain); int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb) @@ -39,7 +39,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) unsigned long n = (unsigned long) v - 1; unsigned int version = cpu_data[n].processor_id; unsigned int fp_vers = cpu_data[n].fpu_id; - char fmt[64]; + char fmt [64]; int i; #ifdef CONFIG_SMP @@ -78,207 +78,66 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "count: %d, address/irw mask: [", cpu_data[n].watch_reg_count); for (i = 0; i < cpu_data[n].watch_reg_count; i++) - seq_printf(m, "%s0x%04x", i ? ", " : "", + seq_printf(m, "%s0x%04x", i ? ", " : "" , cpu_data[n].watch_reg_masks[i]); - seq_puts(m, "]\n"); + seq_printf(m, "]\n"); } - seq_puts(m, "isa\t\t\t:"); + seq_printf(m, "isa\t\t\t:"); if (cpu_has_mips_1) - seq_puts(m, " mips1"); + seq_printf(m, " mips1"); if (cpu_has_mips_2) - seq_puts(m, " mips2"); + seq_printf(m, "%s", " mips2"); if (cpu_has_mips_3) - seq_puts(m, " mips3"); + seq_printf(m, "%s", " mips3"); if (cpu_has_mips_4) - seq_puts(m, " mips4"); + seq_printf(m, "%s", " mips4"); if (cpu_has_mips_5) - seq_puts(m, " mips5"); + seq_printf(m, "%s", " mips5"); if (cpu_has_mips32r1) - seq_puts(m, " mips32r1"); + seq_printf(m, "%s", " mips32r1"); if (cpu_has_mips32r2) - seq_puts(m, " mips32r2"); + seq_printf(m, "%s", " mips32r2"); if (cpu_has_mips32r5) - seq_puts(m, " mips32r5"); + seq_printf(m, "%s", " mips32r5"); if (cpu_has_mips32r6) - seq_puts(m, " mips32r6"); + seq_printf(m, "%s", " mips32r6"); if (cpu_has_mips64r1) - seq_puts(m, " mips64r1"); + seq_printf(m, "%s", " mips64r1"); if (cpu_has_mips64r2) - seq_puts(m, " mips64r2"); + seq_printf(m, "%s", " mips64r2"); if (cpu_has_mips64r5) - seq_puts(m, " mips64r5"); + seq_printf(m, "%s", " mips64r5"); if (cpu_has_mips64r6) - seq_puts(m, " mips64r6"); - seq_puts(m, "\n"); + seq_printf(m, "%s", " mips64r6"); + seq_printf(m, "\n"); - seq_puts(m, "ASEs implemented\t:"); - if (cpu_has_mips16) - seq_puts(m, " mips16"); - if (cpu_has_mips16e2) - seq_puts(m, " mips16e2"); - if (cpu_has_mdmx) - seq_puts(m, " mdmx"); - if (cpu_has_mips3d) - seq_puts(m, " mips3d"); - if (cpu_has_smartmips) - seq_puts(m, " smartmips"); - if (cpu_has_dsp) - seq_puts(m, " dsp"); - if (cpu_has_dsp2) - seq_puts(m, " dsp2"); - if (cpu_has_dsp3) - seq_puts(m, " dsp3"); - if (cpu_has_mipsmt) - seq_puts(m, " mt"); - if (cpu_has_mmips) - seq_puts(m, " micromips"); - if (cpu_has_vz) - seq_puts(m, " vz"); - if (cpu_has_msa) - seq_puts(m, " msa"); - if (cpu_has_eva) - seq_puts(m, " eva"); - if (cpu_has_htw) - seq_puts(m, " htw"); - if (cpu_has_xpa) - seq_puts(m, " xpa"); - if (cpu_has_loongson_mmi) - seq_puts(m, " loongson-mmi"); - if (cpu_has_loongson_cam) - seq_puts(m, " loongson-cam"); - if (cpu_has_loongson_ext) - seq_puts(m, " loongson-ext"); - if (cpu_has_loongson_ext2) - seq_puts(m, " loongson-ext2"); - seq_puts(m, "\n"); + seq_printf(m, "ASEs implemented\t:"); + if (cpu_has_mips16) seq_printf(m, "%s", " mips16"); + if (cpu_has_mips16e2) seq_printf(m, "%s", " mips16e2"); + if (cpu_has_mdmx) seq_printf(m, "%s", " mdmx"); + if (cpu_has_mips3d) seq_printf(m, "%s", " mips3d"); + if (cpu_has_smartmips) seq_printf(m, "%s", " smartmips"); + if (cpu_has_dsp) seq_printf(m, "%s", " dsp"); + if (cpu_has_dsp2) seq_printf(m, "%s", " dsp2"); + if (cpu_has_dsp3) seq_printf(m, "%s", " dsp3"); + if (cpu_has_mipsmt) seq_printf(m, "%s", " mt"); + if (cpu_has_mmips) seq_printf(m, "%s", " micromips"); + if (cpu_has_vz) seq_printf(m, "%s", " vz"); + if (cpu_has_msa) seq_printf(m, "%s", " msa"); + if (cpu_has_eva) seq_printf(m, "%s", " eva"); + if (cpu_has_htw) seq_printf(m, "%s", " htw"); + if (cpu_has_xpa) seq_printf(m, "%s", " xpa"); + if (cpu_has_loongson_mmi) seq_printf(m, "%s", " loongson-mmi"); + if (cpu_has_loongson_cam) seq_printf(m, "%s", " loongson-cam"); + if (cpu_has_loongson_ext) seq_printf(m, "%s", " loongson-ext"); + if (cpu_has_loongson_ext2) seq_printf(m, "%s", " loongson-ext2"); + seq_printf(m, "\n"); if (cpu_has_mmips) { seq_printf(m, "micromips kernel\t: %s\n", (read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no"); } - - seq_puts(m, "Options implemented\t:"); - if (cpu_has_tlb) - seq_puts(m, " tlb"); - if (cpu_has_ftlb) - seq_puts(m, " ftlb"); - if (cpu_has_tlbinv) - seq_puts(m, " tlbinv"); - if (cpu_has_segments) - seq_puts(m, " segments"); - if (cpu_has_rixiex) - seq_puts(m, " rixiex"); - if (cpu_has_ldpte) - seq_puts(m, " ldpte"); - if (cpu_has_maar) - seq_puts(m, " maar"); - if (cpu_has_rw_llb) - seq_puts(m, " rw_llb"); - if (cpu_has_4kex) - seq_puts(m, " 4kex"); - if (cpu_has_3k_cache) - seq_puts(m, " 3k_cache"); - if (cpu_has_4k_cache) - seq_puts(m, " 4k_cache"); - if (cpu_has_tx39_cache) - seq_puts(m, " tx39_cache"); - if (cpu_has_octeon_cache) - seq_puts(m, " octeon_cache"); - if (raw_cpu_has_fpu) - seq_puts(m, " fpu"); - if (cpu_has_32fpr) - seq_puts(m, " 32fpr"); - if (cpu_has_cache_cdex_p) - seq_puts(m, " cache_cdex_p"); - if (cpu_has_cache_cdex_s) - seq_puts(m, " cache_cdex_s"); - if (cpu_has_prefetch) - seq_puts(m, " prefetch"); - if (cpu_has_mcheck) - seq_puts(m, " mcheck"); - if (cpu_has_ejtag) - seq_puts(m, " ejtag"); - if (cpu_has_llsc) - seq_puts(m, " llsc"); - if (cpu_has_guestctl0ext) - seq_puts(m, " guestctl0ext"); - if (cpu_has_guestctl1) - seq_puts(m, " guestctl1"); - if (cpu_has_guestctl2) - seq_puts(m, " guestctl2"); - if (cpu_has_guestid) - seq_puts(m, " guestid"); - if (cpu_has_drg) - seq_puts(m, " drg"); - if (cpu_has_rixi) - seq_puts(m, " rixi"); - if (cpu_has_lpa) - seq_puts(m, " lpa"); - if (cpu_has_mvh) - seq_puts(m, " mvh"); - if (cpu_has_vtag_icache) - seq_puts(m, " vtag_icache"); - if (cpu_has_dc_aliases) - seq_puts(m, " dc_aliases"); - if (cpu_has_ic_fills_f_dc) - seq_puts(m, " ic_fills_f_dc"); - if (cpu_has_pindexed_dcache) - seq_puts(m, " pindexed_dcache"); - if (cpu_has_userlocal) - seq_puts(m, " userlocal"); - if (cpu_has_nofpuex) - seq_puts(m, " nofpuex"); - if (cpu_has_vint) - seq_puts(m, " vint"); - if (cpu_has_veic) - seq_puts(m, " veic"); - if (cpu_has_inclusive_pcaches) - seq_puts(m, " inclusive_pcaches"); - if (cpu_has_perf_cntr_intr_bit) - seq_puts(m, " perf_cntr_intr_bit"); - if (cpu_has_ufr) - seq_puts(m, " ufr"); - if (cpu_has_fre) - seq_puts(m, " fre"); - if (cpu_has_cdmm) - seq_puts(m, " cdmm"); - if (cpu_has_small_pages) - seq_puts(m, " small_pages"); - if (cpu_has_nan_legacy) - seq_puts(m, " nan_legacy"); - if (cpu_has_nan_2008) - seq_puts(m, " nan_2008"); - if (cpu_has_ebase_wg) - seq_puts(m, " ebase_wg"); - if (cpu_has_badinstr) - seq_puts(m, " badinstr"); - if (cpu_has_badinstrp) - seq_puts(m, " badinstrp"); - if (cpu_has_contextconfig) - seq_puts(m, " contextconfig"); - if (cpu_has_perf) - seq_puts(m, " perf"); - if (cpu_has_mac2008_only) - seq_puts(m, " mac2008_only"); - if (cpu_has_ftlbparex) - seq_puts(m, " ftlbparex"); - if (cpu_has_gsexcex) - seq_puts(m, " gsexcex"); - if (cpu_has_shared_ftlb_ram) - seq_puts(m, " shared_ftlb_ram"); - if (cpu_has_shared_ftlb_entries) - seq_puts(m, " shared_ftlb_entries"); - if (cpu_has_mipsmt_pertccounters) - seq_puts(m, " mipsmt_pertccounters"); - if (cpu_has_mmid) - seq_puts(m, " mmid"); - if (cpu_has_mm_sysad) - seq_puts(m, " mm_sysad"); - if (cpu_has_mm_full) - seq_puts(m, " mm_full"); - seq_puts(m, "\n"); - seq_printf(m, "shadow register sets\t: %d\n", cpu_data[n].srsets); seq_printf(m, "kscratch registers\t: %d\n", @@ -304,7 +163,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) raw_notifier_call_chain(&proc_cpuinfo_chain, 0, &proc_cpuinfo_notifier_args); - seq_puts(m, "\n"); + seq_printf(m, "\n"); return 0; } diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index cbff1b974f..95aa86fa60 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -511,7 +511,7 @@ static int __init frame_info_init(void) /* * Without schedule() frame info, result given by - * thread_saved_pc() and __get_wchan() are not reliable. + * thread_saved_pc() and get_wchan() are not reliable. */ if (schedule_mfi.pc_offset < 0) printk("Can't analyze schedule() prologue at %p\n", schedule); @@ -652,9 +652,9 @@ unsigned long unwind_stack(struct task_struct *task, unsigned long *sp, #endif /* - * __get_wchan - a maintenance nightmare^W^Wpain in the ass ... + * get_wchan - a maintenance nightmare^W^Wpain in the ass ... */ -unsigned long __get_wchan(struct task_struct *task) +unsigned long get_wchan(struct task_struct *task) { unsigned long pc = 0; #ifdef CONFIG_KALLSYMS @@ -662,6 +662,8 @@ unsigned long __get_wchan(struct task_struct *task) unsigned long ra = 0; #endif + if (!task || task == current || task_is_running(task)) + goto out; if (!task_stack_page(task)) goto out; diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index f979adfd4f..ef73ba1e0e 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -803,7 +803,7 @@ early_param("coherentio", setcoherentio); static int __init setnocoherentio(char *str) { - dma_default_coherent = true; + dma_default_coherent = false; pr_info("Software DMA cache coherency (command line)\n"); return 0; } diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index 5bce782e69..c9b2a75563 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c @@ -562,13 +562,6 @@ void __user *get_sigframe(struct ksignal *ksig, struct pt_regs *regs, /* Default to using normal stack */ sp = regs->regs[29]; - /* - * If we are on the alternate signal stack and would overflow it, don't. - * Return an always-bogus address instead so we will die with SIGSEGV. - */ - if (on_sig_stack(sp) && !likely(on_sig_stack(sp - frame_size))) - return (void __user __force *)(-1UL); - /* * FPU emulator may have it's own trampoline active just * above the user stack, 16-bytes before the next lowest @@ -754,25 +747,23 @@ static int setup_rt_frame(void *sig_return, struct ksignal *ksig, struct pt_regs *regs, sigset_t *set) { struct rt_sigframe __user *frame; + int err = 0; frame = get_sigframe(ksig, regs, sizeof(*frame)); if (!access_ok(frame, sizeof (*frame))) return -EFAULT; /* Create siginfo. */ - if (copy_siginfo_to_user(&frame->rs_info, &ksig->info)) - return -EFAULT; + err |= copy_siginfo_to_user(&frame->rs_info, &ksig->info); /* Create the ucontext. */ - if (__put_user(0, &frame->rs_uc.uc_flags)) - return -EFAULT; - if (__put_user(NULL, &frame->rs_uc.uc_link)) - return -EFAULT; - if (__save_altstack(&frame->rs_uc.uc_stack, regs->regs[29])) - return -EFAULT; - if (setup_sigcontext(regs, &frame->rs_uc.uc_mcontext)) - return -EFAULT; - if (__copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set))) + err |= __put_user(0, &frame->rs_uc.uc_flags); + err |= __put_user(NULL, &frame->rs_uc.uc_link); + err |= __save_altstack(&frame->rs_uc.uc_stack, regs->regs[29]); + err |= setup_sigcontext(regs, &frame->rs_uc.uc_mcontext); + err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set)); + + if (err) return -EFAULT; /* diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c index f5d7bfa347..b6ef5f7312 100644 --- a/arch/mips/kernel/smp-bmips.c +++ b/arch/mips/kernel/smp-bmips.c @@ -26,7 +26,6 @@ #include #include #include -#include #include #include @@ -374,7 +373,7 @@ static int bmips_cpu_disable(void) set_cpu_online(cpu, false); calculate_cpu_foreign_map(); - irq_migrate_all_off_this_cpu(); + irq_cpu_offline(); clear_c0_status(IE_IRQ5); local_flush_tlb_all(); diff --git a/arch/mips/kernel/syscalls/syscall_n32.tbl b/arch/mips/kernel/syscalls/syscall_n32.tbl index 253ff994ed..70e32de2bc 100644 --- a/arch/mips/kernel/syscalls/syscall_n32.tbl +++ b/arch/mips/kernel/syscalls/syscall_n32.tbl @@ -387,5 +387,3 @@ 446 n32 landlock_restrict_self sys_landlock_restrict_self # 447 reserved for memfd_secret 448 n32 process_mrelease sys_process_mrelease -449 n32 futex_waitv sys_futex_waitv -450 n32 set_mempolicy_home_node sys_set_mempolicy_home_node diff --git a/arch/mips/kernel/syscalls/syscall_n64.tbl b/arch/mips/kernel/syscalls/syscall_n64.tbl index 3f1886ad9d..1ca7bc3379 100644 --- a/arch/mips/kernel/syscalls/syscall_n64.tbl +++ b/arch/mips/kernel/syscalls/syscall_n64.tbl @@ -363,5 +363,3 @@ 446 n64 landlock_restrict_self sys_landlock_restrict_self # 447 reserved for memfd_secret 448 n64 process_mrelease sys_process_mrelease -449 n64 futex_waitv sys_futex_waitv -450 common set_mempolicy_home_node sys_set_mempolicy_home_node diff --git a/arch/mips/kernel/syscalls/syscall_o32.tbl b/arch/mips/kernel/syscalls/syscall_o32.tbl index 8f243e35a7..a61c35edaa 100644 --- a/arch/mips/kernel/syscalls/syscall_o32.tbl +++ b/arch/mips/kernel/syscalls/syscall_o32.tbl @@ -436,5 +436,3 @@ 446 o32 landlock_restrict_self sys_landlock_restrict_self # 447 reserved for memfd_secret 448 o32 process_mrelease sys_process_mrelease -449 o32 futex_waitv sys_futex_waitv -450 o32 set_mempolicy_home_node sys_set_mempolicy_home_node diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index a486486b23..6f07362de5 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -103,19 +103,13 @@ extern asmlinkage void handle_reserved(void); extern void tlb_do_page_fault_0(void); void (*board_be_init)(void); -static int (*board_be_handler)(struct pt_regs *regs, int is_fixup); +int (*board_be_handler)(struct pt_regs *regs, int is_fixup); void (*board_nmi_handler_setup)(void); void (*board_ejtag_handler_setup)(void); void (*board_bind_eic_interrupt)(int irq, int regset); void (*board_ebase_setup)(void); void(*board_cache_error_setup)(void); -void mips_set_be_handler(int (*handler)(struct pt_regs *regs, int is_fixup)) -{ - board_be_handler = handler; -} -EXPORT_SYMBOL_GPL(mips_set_be_handler); - static void show_raw_backtrace(unsigned long reg29, const char *loglvl, bool user) { @@ -422,7 +416,7 @@ void __noreturn die(const char *str, struct pt_regs *regs) if (regs && kexec_should_crash(current)) crash_kexec(regs); - make_task_dead(sig); + do_exit(sig); } extern struct exception_table_entry __start___dbe_table[]; diff --git a/arch/mips/kernel/uprobes.c b/arch/mips/kernel/uprobes.c index 6c063aa188..9db2a6db5f 100644 --- a/arch/mips/kernel/uprobes.c +++ b/arch/mips/kernel/uprobes.c @@ -173,7 +173,6 @@ int arch_uprobe_exception_notify(struct notifier_block *self, case DIE_UPROBE_XOL: if (uprobe_post_sstep_notifier(regs)) return NOTIFY_STOP; - break; default: break; } diff --git a/arch/mips/kvm/Kconfig b/arch/mips/kvm/Kconfig index 91d197bee9..a77297480f 100644 --- a/arch/mips/kvm/Kconfig +++ b/arch/mips/kvm/Kconfig @@ -27,7 +27,6 @@ config KVM select KVM_MMIO select MMU_NOTIFIER select SRCU - select INTERVAL_TREE help Support for hosting Guest kernels. diff --git a/arch/mips/kvm/Makefile b/arch/mips/kvm/Makefile index 21ff75bcdb..d3710959da 100644 --- a/arch/mips/kvm/Makefile +++ b/arch/mips/kvm/Makefile @@ -2,10 +2,9 @@ # Makefile for KVM support for MIPS # -include $(srctree)/virt/kvm/Makefile.kvm - ccflags-y += -Ivirt/kvm -Iarch/mips/kvm +kvm-y := $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o eventfd.o binary_stats.o) kvm-$(CONFIG_CPU_HAS_MSA) += msa.o kvm-y += mips.o emulate.o entry.o \ diff --git a/arch/mips/kvm/emulate.c b/arch/mips/kvm/emulate.c index b494d8d392..22e745e49b 100644 --- a/arch/mips/kvm/emulate.c +++ b/arch/mips/kvm/emulate.c @@ -952,7 +952,7 @@ enum emulation_result kvm_mips_emul_wait(struct kvm_vcpu *vcpu) if (!vcpu->arch.pending_exceptions) { kvm_vz_lose_htimer(vcpu); vcpu->arch.wait = 1; - kvm_vcpu_halt(vcpu); + kvm_vcpu_block(vcpu); /* * We we are runnable, then definitely go off to user space to diff --git a/arch/mips/kvm/entry.c b/arch/mips/kvm/entry.c index aceed14aa1..8131fb2bdf 100644 --- a/arch/mips/kvm/entry.c +++ b/arch/mips/kvm/entry.c @@ -104,7 +104,13 @@ static void *kvm_mips_build_ret_to_host(void *addr); */ static int c0_kscratch(void) { - return 31; + switch (boot_cpu_type()) { + case CPU_XLP: + case CPU_XLR: + return 22; + default: + return 31; + } } /** diff --git a/arch/mips/kvm/loongson_ipi.c b/arch/mips/kvm/loongson_ipi.c index 5d53f32d83..3681fc8fba 100644 --- a/arch/mips/kvm/loongson_ipi.c +++ b/arch/mips/kvm/loongson_ipi.c @@ -120,7 +120,7 @@ static int loongson_vipi_write(struct loongson_kvm_ipi *ipi, s->status |= data; irq.cpu = id; irq.irq = 6; - kvm_vcpu_ioctl_interrupt(kvm_get_vcpu(kvm, id), &irq); + kvm_vcpu_ioctl_interrupt(kvm->vcpus[id], &irq); break; case CORE0_CLEAR_OFF: @@ -128,7 +128,7 @@ static int loongson_vipi_write(struct loongson_kvm_ipi *ipi, if (!s->status) { irq.cpu = id; irq.irq = -6; - kvm_vcpu_ioctl_interrupt(kvm_get_vcpu(kvm, id), &irq); + kvm_vcpu_ioctl_interrupt(kvm->vcpus[id], &irq); } break; diff --git a/arch/mips/kvm/mips.c b/arch/mips/kvm/mips.c index a25e0b73ee..75c6f264c6 100644 --- a/arch/mips/kvm/mips.c +++ b/arch/mips/kvm/mips.c @@ -171,6 +171,25 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) return 0; } +void kvm_mips_free_vcpus(struct kvm *kvm) +{ + unsigned int i; + struct kvm_vcpu *vcpu; + + kvm_for_each_vcpu(i, vcpu, kvm) { + kvm_vcpu_destroy(vcpu); + } + + mutex_lock(&kvm->lock); + + for (i = 0; i < atomic_read(&kvm->online_vcpus); i++) + kvm->vcpus[i] = NULL; + + atomic_set(&kvm->online_vcpus, 0); + + mutex_unlock(&kvm->lock); +} + static void kvm_mips_free_gpa_pt(struct kvm *kvm) { /* It should always be safe to remove after flushing the whole range */ @@ -180,7 +199,7 @@ static void kvm_mips_free_gpa_pt(struct kvm *kvm) void kvm_arch_destroy_vm(struct kvm *kvm) { - kvm_destroy_vcpus(kvm); + kvm_mips_free_vcpus(kvm); kvm_mips_free_gpa_pt(kvm); } @@ -214,20 +233,25 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm, } int kvm_arch_prepare_memory_region(struct kvm *kvm, - const struct kvm_memory_slot *old, - struct kvm_memory_slot *new, + struct kvm_memory_slot *memslot, + const struct kvm_userspace_memory_region *mem, enum kvm_mr_change change) { return 0; } void kvm_arch_commit_memory_region(struct kvm *kvm, + const struct kvm_userspace_memory_region *mem, struct kvm_memory_slot *old, const struct kvm_memory_slot *new, enum kvm_mr_change change) { int needs_flush; + kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n", + __func__, kvm, mem->slot, mem->guest_phys_addr, + mem->memory_size, mem->userspace_addr); + /* * If dirty page logging is enabled, write protect all pages in the slot * ready for dirty logging. @@ -414,24 +438,6 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, return -ENOIOCTLCMD; } -/* - * Actually run the vCPU, entering an RCU extended quiescent state (EQS) while - * the vCPU is running. - * - * This must be noinstr as instrumentation may make use of RCU, and this is not - * safe during the EQS. - */ -static int noinstr kvm_mips_vcpu_enter_exit(struct kvm_vcpu *vcpu) -{ - int ret; - - guest_state_enter_irqoff(); - ret = kvm_mips_callbacks->vcpu_run(vcpu); - guest_state_exit_irqoff(); - - return ret; -} - int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) { int r = -EINTR; @@ -452,7 +458,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) lose_fpu(1); local_irq_disable(); - guest_timing_enter_irqoff(); + guest_enter_irqoff(); trace_kvm_enter(vcpu); /* @@ -463,23 +469,10 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) */ smp_store_mb(vcpu->mode, IN_GUEST_MODE); - r = kvm_mips_vcpu_enter_exit(vcpu); - - /* - * We must ensure that any pending interrupts are taken before - * we exit guest timing so that timer ticks are accounted as - * guest time. Transiently unmask interrupts so that any - * pending interrupts are taken. - * - * TODO: is there a barrier which ensures that pending interrupts are - * recognised? Currently this just hopes that the CPU takes any pending - * interrupts between the enable and disable. - */ - local_irq_enable(); - local_irq_disable(); + r = kvm_mips_callbacks->vcpu_run(vcpu); trace_kvm_out(vcpu); - guest_timing_exit_irqoff(); + guest_exit_irqoff(); local_irq_enable(); out: @@ -505,7 +498,7 @@ int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, if (irq->cpu == -1) dvcpu = vcpu; else - dvcpu = kvm_get_vcpu(vcpu->kvm, irq->cpu); + dvcpu = vcpu->kvm->vcpus[irq->cpu]; if (intr == 2 || intr == 3 || intr == 4 || intr == 6) { kvm_mips_callbacks->queue_io_int(dvcpu, irq); @@ -1074,13 +1067,13 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) r = 1; break; case KVM_CAP_NR_VCPUS: - r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS); + r = num_online_cpus(); break; case KVM_CAP_MAX_VCPUS: r = KVM_MAX_VCPUS; break; case KVM_CAP_MAX_VCPU_ID: - r = KVM_MAX_VCPU_IDS; + r = KVM_MAX_VCPU_ID; break; case KVM_CAP_MIPS_FPU: /* We don't handle systems with inconsistent cpu_has_fpu */ @@ -1199,7 +1192,7 @@ static void kvm_mips_set_c0_status(void) /* * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) */ -static int __kvm_mips_handle_exit(struct kvm_vcpu *vcpu) +int kvm_mips_handle_exit(struct kvm_vcpu *vcpu) { struct kvm_run *run = vcpu->run; u32 cause = vcpu->arch.host_cp0_cause; @@ -1388,17 +1381,6 @@ static int __kvm_mips_handle_exit(struct kvm_vcpu *vcpu) return ret; } -int noinstr kvm_mips_handle_exit(struct kvm_vcpu *vcpu) -{ - int ret; - - guest_state_exit_irqoff(); - ret = __kvm_mips_handle_exit(vcpu); - guest_state_enter_irqoff(); - - return ret; -} - /* Enable FPU for guest and restore context */ void kvm_own_fpu(struct kvm_vcpu *vcpu) { diff --git a/arch/mips/kvm/vz.c b/arch/mips/kvm/vz.c index c706f5890a..4adca5abbc 100644 --- a/arch/mips/kvm/vz.c +++ b/arch/mips/kvm/vz.c @@ -458,8 +458,8 @@ void kvm_vz_acquire_htimer(struct kvm_vcpu *vcpu) /** * _kvm_vz_save_htimer() - Switch to software emulation of guest timer. * @vcpu: Virtual CPU. - * @out_compare: Pointer to write compare value to. - * @out_cause: Pointer to write cause value to. + * @compare: Pointer to write compare value to. + * @cause: Pointer to write cause value to. * * Save VZ guest timer state and switch to software emulation of guest CP0 * timer. The hard timer must already be in use, so preemption should be @@ -1541,14 +1541,11 @@ static int kvm_trap_vz_handle_guest_exit(struct kvm_vcpu *vcpu) } /** - * kvm_trap_vz_handle_cop_unusable() - Guest used unusable coprocessor. + * kvm_trap_vz_handle_cop_unusuable() - Guest used unusable coprocessor. * @vcpu: Virtual CPU context. * * Handle when the guest attempts to use a coprocessor which hasn't been allowed * by the root context. - * - * Return: value indicating whether to resume the host or the guest - * (RESUME_HOST or RESUME_GUEST) */ static int kvm_trap_vz_handle_cop_unusable(struct kvm_vcpu *vcpu) { @@ -1595,9 +1592,6 @@ static int kvm_trap_vz_handle_cop_unusable(struct kvm_vcpu *vcpu) * * Handle when the guest attempts to use MSA when it is disabled in the root * context. - * - * Return: value indicating whether to resume the host or the guest - * (RESUME_HOST or RESUME_GUEST) */ static int kvm_trap_vz_handle_msa_disabled(struct kvm_vcpu *vcpu) { diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c index 64726c670c..42222f849b 100644 --- a/arch/mips/lantiq/falcon/sysctrl.c +++ b/arch/mips/lantiq/falcon/sysctrl.c @@ -141,7 +141,7 @@ static void falcon_gpe_enable(void) unsigned int freq; unsigned int status; - /* if the clock is already enabled */ + /* if if the clock is already enabled */ status = sysctl_r32(SYSCTL_SYS1, SYS1_INFRAC); if (status & (1 << (GPPC_OFFSET + 1))) return; diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c index f8eedeb15f..53fcc672a2 100644 --- a/arch/mips/lantiq/xway/dma.c +++ b/arch/mips/lantiq/xway/dma.c @@ -182,7 +182,7 @@ ltq_dma_free(struct ltq_dma_channel *ch) EXPORT_SYMBOL_GPL(ltq_dma_free); void -ltq_dma_init_port(int p, int tx_burst, int rx_burst) +ltq_dma_init_port(int p) { ltq_dma_w32(p, LTQ_DMA_PS); switch (p) { @@ -191,44 +191,16 @@ ltq_dma_init_port(int p, int tx_burst, int rx_burst) * Tell the DMA engine to swap the endianness of data frames and * drop packets if the channel arbitration fails. */ - ltq_dma_w32_mask(0, (DMA_ETOP_ENDIANNESS | DMA_PDEN), + ltq_dma_w32_mask(0, DMA_ETOP_ENDIANNESS | DMA_PDEN, LTQ_DMA_PCTRL); break; - default: + case DMA_PORT_DEU: + ltq_dma_w32((DMA_PCTRL_2W_BURST << DMA_TX_BURST_SHIFT) | + (DMA_PCTRL_2W_BURST << DMA_RX_BURST_SHIFT), + LTQ_DMA_PCTRL); break; - } - switch (rx_burst) { - case 8: - ltq_dma_w32_mask(0x0c, (DMA_PCTRL_8W_BURST << DMA_RX_BURST_SHIFT), - LTQ_DMA_PCTRL); - break; - case 4: - ltq_dma_w32_mask(0x0c, (DMA_PCTRL_4W_BURST << DMA_RX_BURST_SHIFT), - LTQ_DMA_PCTRL); - break; - case 2: - ltq_dma_w32_mask(0x0c, (DMA_PCTRL_2W_BURST << DMA_RX_BURST_SHIFT), - LTQ_DMA_PCTRL); - break; - default: - break; - } - - switch (tx_burst) { - case 8: - ltq_dma_w32_mask(0x30, (DMA_PCTRL_8W_BURST << DMA_TX_BURST_SHIFT), - LTQ_DMA_PCTRL); - break; - case 4: - ltq_dma_w32_mask(0x30, (DMA_PCTRL_4W_BURST << DMA_TX_BURST_SHIFT), - LTQ_DMA_PCTRL); - break; - case 2: - ltq_dma_w32_mask(0x30, (DMA_PCTRL_2W_BURST << DMA_TX_BURST_SHIFT), - LTQ_DMA_PCTRL); - break; default: break; } diff --git a/arch/mips/loongson2ef/Platform b/arch/mips/loongson2ef/Platform index 50e659aca5..ae023b9a1c 100644 --- a/arch/mips/loongson2ef/Platform +++ b/arch/mips/loongson2ef/Platform @@ -2,9 +2,12 @@ # Loongson Processors' Support # +# Only gcc >= 4.4 have Loongson specific support cflags-$(CONFIG_CPU_LOONGSON2EF) += -Wa,--trap -cflags-$(CONFIG_CPU_LOONGSON2E) += -march=loongson2e -cflags-$(CONFIG_CPU_LOONGSON2F) += -march=loongson2f +cflags-$(CONFIG_CPU_LOONGSON2E) += \ + $(call cc-option,-march=loongson2e,-march=r4600) +cflags-$(CONFIG_CPU_LOONGSON2F) += \ + $(call cc-option,-march=loongson2f,-march=r4600) # # Some versions of binutils, not currently mainline as of 2019/02/04, support # an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction @@ -29,8 +32,16 @@ cflags-$(CONFIG_CPU_LOONGSON2EF) += $(call as-option,-Wa$(comma)-mno-fix-loongso # Enable the workarounds for Loongson2f ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS -cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa,-mfix-loongson2f-nop -cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa,-mfix-loongson2f-jump + ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-nop,),) + $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-nop) + else + cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-nop + endif + ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-jump,),) + $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-jump) + else + cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-jump + endif endif # Some -march= flags enable MMI instructions, and GCC complains about that diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c index ee8de1735b..76e0a9636a 100644 --- a/arch/mips/loongson64/init.c +++ b/arch/mips/loongson64/init.c @@ -77,9 +77,7 @@ void __init szmem(unsigned int node) (u32)node_id, mem_type, mem_start, mem_size); pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n", start_pfn, end_pfn, num_physpages); - memblock_add_node(PFN_PHYS(start_pfn), - PFN_PHYS(node_psize), node, - MEMBLOCK_NONE); + memblock_add_node(PFN_PHYS(start_pfn), PFN_PHYS(node_psize), node); break; case SYSTEM_RAM_RESERVED: pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n", @@ -179,7 +177,6 @@ static __init void reserve_pio_range(void) if (of_range_parser_init(&parser, np)) { pr_info("Failed to parse resources.\n"); - of_node_put(np); break; } diff --git a/arch/mips/loongson64/smp.c b/arch/mips/loongson64/smp.c index 660e1de441..09ebe84a17 100644 --- a/arch/mips/loongson64/smp.c +++ b/arch/mips/loongson64/smp.c @@ -550,6 +550,7 @@ static int loongson3_cpu_disable(void) set_cpu_online(cpu, false); calculate_cpu_foreign_map(); local_irq_save(flags); + irq_cpu_offline(); clear_c0_status(ST0_IM); local_irq_restore(flags); local_flush_tlb_all(); diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c index 737870d8fd..ec2ae50153 100644 --- a/arch/mips/mm/c-octeon.c +++ b/arch/mips/mm/c-octeon.c @@ -332,7 +332,7 @@ static void co_cache_error_call_notifiers(unsigned long val) } /* - * Called when the exception is recoverable + * Called when the the exception is recoverable */ asmlinkage void cache_parity_error_octeon_recoverable(void) @@ -341,7 +341,7 @@ asmlinkage void cache_parity_error_octeon_recoverable(void) } /* - * Called when the exception is not recoverable + * Called when the the exception is not recoverable */ asmlinkage void cache_parity_error_octeon_non_recoverable(void) diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 50261fd8eb..74b09e801c 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1410,6 +1410,7 @@ static void probe_pcache(void) case CPU_I6500: case CPU_SB1: case CPU_SB1A: + case CPU_XLR: c->dcache.flags |= MIPS_CACHE_PINDEX; break; @@ -1698,6 +1699,7 @@ static void setup_scache(void) return; case CPU_CAVIUM_OCTEON3: + case CPU_XLP: /* don't need to worry about L2, fully coherent */ return; diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c index 44f98100e8..e7abda9c01 100644 --- a/arch/mips/mm/fault.c +++ b/arch/mips/mm/fault.c @@ -171,17 +171,18 @@ static void __kprobes __do_page_fault(struct pt_regs *regs, unsigned long write, goto do_sigbus; BUG(); } + if (flags & FAULT_FLAG_ALLOW_RETRY) { + if (fault & VM_FAULT_RETRY) { + flags |= FAULT_FLAG_TRIED; - if (fault & VM_FAULT_RETRY) { - flags |= FAULT_FLAG_TRIED; + /* + * No need to mmap_read_unlock(mm) as we would + * have already released it in __lock_page_or_retry + * in mm/filemap.c. + */ - /* - * No need to mmap_read_unlock(mm) as we would - * have already released it in __lock_page_or_retry - * in mm/filemap.c. - */ - - goto retry; + goto retry; + } } mmap_read_unlock(mm); diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 5a80028395..19347dc6bb 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -519,9 +519,17 @@ static int __init pcpu_cpu_distance(unsigned int from, unsigned int to) return node_distance(cpu_to_node(from), cpu_to_node(to)); } -static int __init pcpu_cpu_to_node(int cpu) +static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, + size_t align) { - return cpu_to_node(cpu); + return memblock_alloc_try_nid(size, align, __pa(MAX_DMA_ADDRESS), + MEMBLOCK_ALLOC_ACCESSIBLE, + cpu_to_node(cpu)); +} + +static void __init pcpu_fc_free(void *ptr, size_t size) +{ + memblock_free_early(__pa(ptr), size); } void __init setup_per_cpu_areas(void) @@ -537,7 +545,7 @@ void __init setup_per_cpu_areas(void) rc = pcpu_embed_first_chunk(PERCPU_MODULE_RESERVE, PERCPU_DYNAMIC_RESERVE, PAGE_SIZE, pcpu_cpu_distance, - pcpu_cpu_to_node); + pcpu_fc_alloc, pcpu_fc_free); if (rc < 0) panic("Failed to initialize percpu areas."); diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index b131e6a773..9adad24c2e 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -325,7 +325,13 @@ static unsigned int kscratch_used_mask; static inline int __maybe_unused c0_kscratch(void) { - return 31; + switch (current_cpu_type()) { + case CPU_XLP: + case CPU_XLR: + return 22; + default: + return 31; + } } static int allocate_kscratch(void) @@ -547,6 +553,7 @@ void build_tlb_write_entry(u32 **p, struct uasm_label **l, case CPU_5KC: case CPU_TX49XX: case CPU_PR4450: + case CPU_XLR: uasm_i_nop(p); tlbw(p); break; diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c index e15c6700cd..7154a1d99a 100644 --- a/arch/mips/mm/uasm-mips.c +++ b/arch/mips/mm/uasm-mips.c @@ -90,7 +90,7 @@ static const struct insn insn_table[insn_invalid] = { RS | RT | RD}, [insn_dmtc0] = {M(cop0_op, dmtc_op, 0, 0, 0, 0), RT | RD | SET}, [insn_dmultu] = {M(spec_op, 0, 0, 0, 0, dmultu_op), RS | RT}, - [insn_dmulu] = {M(spec_op, 0, 0, 0, dmultu_dmulu_op, dmultu_op), + [insn_dmulu] = {M(spec_op, 0, 0, 0, dmult_dmul_op, dmultu_op), RS | RT | RD}, [insn_drotr] = {M(spec_op, 1, 0, 0, 0, dsrl_op), RT | RD | RE}, [insn_drotr32] = {M(spec_op, 1, 0, 0, 0, dsrl32_op), RT | RD | RE}, @@ -150,8 +150,6 @@ static const struct insn insn_table[insn_invalid] = { [insn_mtlo] = {M(spec_op, 0, 0, 0, 0, mtlo_op), RS}, [insn_mulu] = {M(spec_op, 0, 0, 0, multu_mulu_op, multu_op), RS | RT | RD}, - [insn_muhu] = {M(spec_op, 0, 0, 0, multu_muhu_op, multu_op), - RS | RT | RD}, #ifndef CONFIG_CPU_MIPSR6 [insn_mul] = {M(spec2_op, 0, 0, 0, 0, mul_op), RS | RT | RD}, #else diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c index 125140979d..81dd226d6b 100644 --- a/arch/mips/mm/uasm.c +++ b/arch/mips/mm/uasm.c @@ -59,7 +59,7 @@ enum opcode { insn_lddir, insn_ldpte, insn_ldx, insn_lh, insn_lhu, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwu, insn_lwx, insn_mfc0, insn_mfhc0, insn_mfhi, insn_mflo, insn_modu, insn_movn, insn_movz, insn_mtc0, insn_mthc0, - insn_mthi, insn_mtlo, insn_mul, insn_multu, insn_mulu, insn_muhu, insn_nor, + insn_mthi, insn_mtlo, insn_mul, insn_multu, insn_mulu, insn_nor, insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sb, insn_sc, insn_scd, insn_seleqz, insn_selnez, insn_sd, insn_sh, insn_sll, insn_sllv, insn_slt, insn_slti, insn_sltiu, insn_sltu, insn_sra, @@ -344,7 +344,6 @@ I_u1(_mtlo) I_u3u1u2(_mul) I_u1u2(_multu) I_u3u1u2(_mulu) -I_u3u1u2(_muhu) I_u3u1u2(_nor) I_u3u1u2(_or) I_u2u1u3(_ori) diff --git a/arch/mips/net/Makefile b/arch/mips/net/Makefile index e3e6ae6514..d559123490 100644 --- a/arch/mips/net/Makefile +++ b/arch/mips/net/Makefile @@ -1,10 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only # MIPS networking code -obj-$(CONFIG_BPF_JIT) += bpf_jit_comp.o - -ifeq ($(CONFIG_32BIT),y) - obj-$(CONFIG_BPF_JIT) += bpf_jit_comp32.o -else - obj-$(CONFIG_BPF_JIT) += bpf_jit_comp64.o -endif +obj-$(CONFIG_MIPS_CBPF_JIT) += bpf_jit.o bpf_jit_asm.o +obj-$(CONFIG_MIPS_EBPF_JIT) += ebpf_jit.o diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index 9a6bc70260..f3eecc065e 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -49,12 +49,17 @@ obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o obj-$(CONFIG_SOC_TX4927) += pci-tx4927.o obj-$(CONFIG_SOC_TX4938) += pci-tx4938.o +obj-$(CONFIG_SOC_TX4939) += pci-tx4939.o obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o +obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-rbtx4938.o obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o obj-$(CONFIG_CAVIUM_OCTEON_SOC) += pci-octeon.o pcie-octeon.o +obj-$(CONFIG_CPU_XLR) += pci-xlr.o +obj-$(CONFIG_CPU_XLP) += pci-xlp.o ifdef CONFIG_PCI_MSI obj-$(CONFIG_CAVIUM_OCTEON_SOC) += msi-octeon.o +obj-$(CONFIG_CPU_XLP) += msi-xlp.o endif diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c index 00206ff529..44be65c3e6 100644 --- a/arch/mips/pci/fixup-cobalt.c +++ b/arch/mips/pci/fixup-cobalt.c @@ -36,21 +36,6 @@ #define VIA_COBALT_BRD_ID_REG 0x94 #define VIA_COBALT_BRD_REG_to_ID(reg) ((unsigned char)(reg) >> 4) -/* - * Default value of PCI Class Code on GT64111 is PCI_CLASS_MEMORY_OTHER (0x0580) - * instead of PCI_CLASS_BRIDGE_HOST (0x0600). Galileo explained this choice in - * document "GT-64111 System Controller for RC4640, RM523X and VR4300 CPUs", - * section "6.5.3 PCI Autoconfiguration at RESET": - * - * Some PCs refuse to configure host bridges if they are found plugged into - * a PCI slot (ask the BIOS vendors why...). The "Memory Controller" Class - * Code does not cause a problem for these non-compliant BIOSes, so we used - * this as the default in the GT-64111. - * - * So fix the incorrect default value of PCI Class Code. More details are on: - * https://lore.kernel.org/r/20211102154831.xtrlgrmrizl5eidl@pali/ - * https://lore.kernel.org/r/20211102150201.GA11675@alpha.franken.de/ - */ static void qube_raq_galileo_early_fixup(struct pci_dev *dev) { if (dev->devfn == PCI_DEVFN(0, 0) && diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c index c2860ebbd8..288b58b00d 100644 --- a/arch/mips/pci/msi-octeon.c +++ b/arch/mips/pci/msi-octeon.c @@ -68,9 +68,6 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) u64 search_mask; int index; - if (desc->pci.msi_attrib.is_msix) - return -EINVAL; - /* * Read the MSI config to figure out how many IRQs this device * wants. Most devices only want 1, which will give @@ -185,6 +182,35 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) return 0; } +int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) +{ + struct msi_desc *entry; + int ret; + + /* + * MSI-X is not supported. + */ + if (type == PCI_CAP_ID_MSIX) + return -EINVAL; + + /* + * If an architecture wants to support multiple MSI, it needs to + * override arch_setup_msi_irqs() + */ + if (type == PCI_CAP_ID_MSI && nvec > 1) + return 1; + + for_each_pci_msi_entry(entry, dev) { + ret = arch_setup_msi_irq(dev, entry); + if (ret < 0) + return ret; + if (ret > 0) + return -ENOSPC; + } + + return 0; +} + /** * Called when a device no longer needs its MSI interrupts. All * MSI interrupts for the device are freed. diff --git a/arch/mips/pci/pci-bcm47xx.c b/arch/mips/pci/pci-bcm47xx.c index ffac06a5ca..230d7dd273 100644 --- a/arch/mips/pci/pci-bcm47xx.c +++ b/arch/mips/pci/pci-bcm47xx.c @@ -41,7 +41,8 @@ static int bcm47xx_pcibios_plat_dev_init_ssb(struct pci_dev *dev) res = ssb_pcibios_plat_dev_init(dev); if (res < 0) { - pci_alert(dev, "PCI: Failed to init device\n"); + printk(KERN_ALERT "PCI: Failed to init device %s\n", + pci_name(dev)); return res; } @@ -51,7 +52,8 @@ static int bcm47xx_pcibios_plat_dev_init_ssb(struct pci_dev *dev) /* IRQ-0 and IRQ-1 are software interrupts. */ if (res < 2) { - pci_alert(dev, "PCI: Failed to map IRQ of device\n"); + printk(KERN_ALERT "PCI: Failed to map IRQ of device %s\n", + pci_name(dev)); return res; } @@ -67,7 +69,8 @@ static int bcm47xx_pcibios_plat_dev_init_bcma(struct pci_dev *dev) res = bcma_core_pci_plat_dev_init(dev); if (res < 0) { - pci_alert(dev, "PCI: Failed to init device\n"); + printk(KERN_ALERT "PCI: Failed to init device %s\n", + pci_name(dev)); return res; } @@ -75,7 +78,8 @@ static int bcm47xx_pcibios_plat_dev_init_bcma(struct pci_dev *dev) /* IRQ-0 and IRQ-1 are software interrupts. */ if (res < 2) { - pci_alert(dev, "PCI: Failed to map IRQ of device\n"); + printk(KERN_ALERT "PCI: Failed to map IRQ of device %s\n", + pci_name(dev)); return res; } @@ -89,10 +93,12 @@ int pcibios_plat_dev_init(struct pci_dev *dev) #ifdef CONFIG_BCM47XX_SSB if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_SSB) return bcm47xx_pcibios_plat_dev_init_ssb(dev); + else #endif #ifdef CONFIG_BCM47XX_BCMA if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) return bcm47xx_pcibios_plat_dev_init_bcma(dev); + else #endif - return 0; + return 0; } diff --git a/arch/mips/pci/pci-generic.c b/arch/mips/pci/pci-generic.c index d2d68bac3d..95b0001788 100644 --- a/arch/mips/pci/pci-generic.c +++ b/arch/mips/pci/pci-generic.c @@ -46,19 +46,3 @@ void pcibios_fixup_bus(struct pci_bus *bus) { pci_read_bridge_bases(bus); } - -#ifdef pci_remap_iospace -int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr) -{ - unsigned long vaddr; - - if (res->start != 0) { - WARN_ONCE(1, "resource start address is not zero\n"); - return -ENODEV; - } - - vaddr = (unsigned long)ioremap(phys_addr, resource_size(res)); - set_io_port_base(vaddr); - return 0; -} -#endif diff --git a/arch/mips/pci/pci-rt3883.c b/arch/mips/pci/pci-rt3883.c index e07ae098bd..d3c947fa29 100644 --- a/arch/mips/pci/pci-rt3883.c +++ b/arch/mips/pci/pci-rt3883.c @@ -102,12 +102,14 @@ static u32 rt3883_pci_read_cfg32(struct rt3883_pci_controller *rpc, unsigned func, unsigned reg) { u32 address; + u32 ret; address = rt3883_pci_get_cfgaddr(bus, slot, func, reg); rt3883_pci_w32(rpc, address, RT3883_PCI_REG_CFGADDR); + ret = rt3883_pci_r32(rpc, RT3883_PCI_REG_CFGDATA); - return rt3883_pci_r32(rpc, RT3883_PCI_REG_CFGDATA); + return ret; } static void rt3883_pci_write_cfg32(struct rt3883_pci_controller *rpc, diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig index 120adad51d..c800bf5559 100644 --- a/arch/mips/ralink/Kconfig +++ b/arch/mips/ralink/Kconfig @@ -51,8 +51,7 @@ choice select SYS_SUPPORTS_HIGHMEM select MIPS_GIC select CLKSRC_MIPS_GIC - select HAVE_PCI - select PCI_DRIVERS_GENERIC + select HAVE_PCI if PCI_MT7621 select SOC_BUS endchoice diff --git a/arch/mips/ralink/ill_acc.c b/arch/mips/ralink/ill_acc.c index 115a69fc20..bdf53807d7 100644 --- a/arch/mips/ralink/ill_acc.c +++ b/arch/mips/ralink/ill_acc.c @@ -65,7 +65,6 @@ static int __init ill_acc_of_setup(void) } irq = irq_of_parse_and_map(np, 0); - of_node_put(np); if (!irq) { dev_err(&pdev->dev, "failed to get irq\n"); put_device(&pdev->dev); diff --git a/arch/mips/ralink/mt7621.c b/arch/mips/ralink/mt7621.c index d6efffd4dd..4c83786612 100644 --- a/arch/mips/ralink/mt7621.c +++ b/arch/mips/ralink/mt7621.c @@ -10,8 +10,6 @@ #include #include #include -#include -#include #include #include @@ -22,60 +20,41 @@ #include "common.h" -static void *detect_magic __initdata = detect_memory_region; +#define MT7621_MEM_TEST_PATTERN 0xaa5555aa -int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) -{ - struct resource_entry *entry; - resource_size_t mask; - - entry = resource_list_first_type(&bridge->windows, IORESOURCE_MEM); - if (!entry) { - pr_err("Cannot get memory resource\n"); - return -EINVAL; - } - - if (mips_cps_numiocu(0)) { - /* - * Hardware doesn't accept mask values with 1s after - * 0s (e.g. 0xffef), so warn if that's happen - */ - mask = ~(entry->res->end - entry->res->start) & CM_GCR_REGn_MASK_ADDRMASK; - WARN_ON(mask && BIT(ffz(~mask)) - 1 != ~mask); - - write_gcr_reg1_base(entry->res->start); - write_gcr_reg1_mask(mask | CM_GCR_REGn_MASK_CMTGT_IOCU0); - pr_info("PCI coherence region base: 0x%08llx, mask/settings: 0x%08llx\n", - (unsigned long long)read_gcr_reg1_base(), - (unsigned long long)read_gcr_reg1_mask()); - } - - return 0; -} +static u32 detect_magic __initdata; phys_addr_t mips_cpc_default_phys_base(void) { panic("Cannot detect cpc address"); } +static bool __init mt7621_addr_wraparound_test(phys_addr_t size) +{ + void *dm = (void *)KSEG1ADDR(&detect_magic); + + if (CPHYSADDR(dm + size) >= MT7621_LOWMEM_MAX_SIZE) + return true; + __raw_writel(MT7621_MEM_TEST_PATTERN, dm); + if (__raw_readl(dm) != __raw_readl(dm + size)) + return false; + __raw_writel(~MT7621_MEM_TEST_PATTERN, dm); + return __raw_readl(dm) == __raw_readl(dm + size); +} + static void __init mt7621_memory_detect(void) { - void *dm = &detect_magic; phys_addr_t size; - for (size = 32 * SZ_1M; size < 256 * SZ_1M; size <<= 1) { - if (!__builtin_memcmp(dm, dm + size, sizeof(detect_magic))) - break; + for (size = 32 * SZ_1M; size <= 256 * SZ_1M; size <<= 1) { + if (mt7621_addr_wraparound_test(size)) { + memblock_add(MT7621_LOWMEM_BASE, size); + return; + } } - if ((size == 256 * SZ_1M) && - (CPHYSADDR(dm + size) < MT7621_LOWMEM_MAX_SIZE) && - __builtin_memcmp(dm, dm + size, sizeof(detect_magic))) { - memblock_add(MT7621_LOWMEM_BASE, MT7621_LOWMEM_MAX_SIZE); - memblock_add(MT7621_HIGHMEM_BASE, MT7621_HIGHMEM_SIZE); - } else { - memblock_add(MT7621_LOWMEM_BASE, size); - } + memblock_add(MT7621_LOWMEM_BASE, MT7621_LOWMEM_MAX_SIZE); + memblock_add(MT7621_HIGHMEM_BASE, MT7621_HIGHMEM_SIZE); } void __init ralink_of_remap(void) diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c index 35a87a2da1..0135376c5d 100644 --- a/arch/mips/ralink/of.c +++ b/arch/mips/ralink/of.c @@ -53,6 +53,17 @@ void __init device_tree_init(void) unflatten_and_copy_device_tree(); } +static int memory_dtb; + +static int __init early_init_dt_find_memory(unsigned long node, + const char *uname, int depth, void *data) +{ + if (depth == 1 && !strcmp(uname, "memory@0")) + memory_dtb = 1; + + return 0; +} + void __init plat_mem_setup(void) { void *dtb; @@ -66,10 +77,10 @@ void __init plat_mem_setup(void) dtb = get_fdt(); __dt_setup_arch(dtb); - if (!early_init_dt_scan_memory()) - return; - - if (soc_info.mem_detect) + of_scan_flat_dt(early_init_dt_find_memory, NULL); + if (memory_dtb) + of_scan_flat_dt(early_init_dt_scan_memory, NULL); + else if (soc_info.mem_detect) soc_info.mem_detect(); else if (soc_info.mem_size) memblock_add(soc_info.mem_base, soc_info.mem_size * SZ_1M); diff --git a/arch/mips/rb532/prom.c b/arch/mips/rb532/prom.c index b116937155..23ad8dd9aa 100644 --- a/arch/mips/rb532/prom.c +++ b/arch/mips/rb532/prom.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include diff --git a/arch/mips/sgi-ip22/Platform b/arch/mips/sgi-ip22/Platform index a4c46e3356..62fa30bb95 100644 --- a/arch/mips/sgi-ip22/Platform +++ b/arch/mips/sgi-ip22/Platform @@ -23,5 +23,10 @@ endif # be 16kb aligned or the handling of the current variable will break. # Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys # +ifdef CONFIG_SGI_IP28 + ifeq ($(call cc-option-yn,-march=r10000 -mr10k-cache-barrier=store), n) + $(error gcc doesn't support needed option -mr10k-cache-barrier=store) + endif +endif cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=store -I$(srctree)/arch/mips/include/asm/mach-ip28 load-$(CONFIG_SGI_IP28) += 0xa800000020004000 diff --git a/arch/mips/sgi-ip22/ip22-berr.c b/arch/mips/sgi-ip22/ip22-berr.c index afe8a61078..dc0110a607 100644 --- a/arch/mips/sgi-ip22/ip22-berr.c +++ b/arch/mips/sgi-ip22/ip22-berr.c @@ -112,5 +112,5 @@ static int ip22_be_handler(struct pt_regs *regs, int is_fixup) void __init ip22_be_init(void) { - mips_set_be_handler(ip22_be_handler); + board_be_handler = ip22_be_handler; } diff --git a/arch/mips/sgi-ip22/ip28-berr.c b/arch/mips/sgi-ip22/ip28-berr.c index 16ca470deb..c61362d9ea 100644 --- a/arch/mips/sgi-ip22/ip28-berr.c +++ b/arch/mips/sgi-ip22/ip28-berr.c @@ -468,7 +468,7 @@ static int ip28_be_handler(struct pt_regs *regs, int is_fixup) void __init ip22_be_init(void) { - mips_set_be_handler(ip28_be_handler); + board_be_handler = ip28_be_handler; } int ip28_show_be_info(struct seq_file *m) diff --git a/arch/mips/sgi-ip27/ip27-berr.c b/arch/mips/sgi-ip27/ip27-berr.c index 923a63a51c..5a38ae6bdf 100644 --- a/arch/mips/sgi-ip27/ip27-berr.c +++ b/arch/mips/sgi-ip27/ip27-berr.c @@ -85,7 +85,7 @@ void __init ip27_be_init(void) int cpu = LOCAL_HUB_L(PI_CPU_NUM); int cpuoff = cpu << 8; - mips_set_be_handler(ip27_be_handler); + board_be_handler = ip27_be_handler; LOCAL_HUB_S(PI_ERR_INT_PEND, cpu ? PI_ERR_CLEAR_ALL_B : PI_ERR_CLEAR_ALL_A); diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c index adc2faeecf..6173684b5a 100644 --- a/arch/mips/sgi-ip27/ip27-memory.c +++ b/arch/mips/sgi-ip27/ip27-memory.c @@ -341,8 +341,7 @@ static void __init szmem(void) continue; } memblock_add_node(PFN_PHYS(slot_getbasepfn(node, slot)), - PFN_PHYS(slot_psize), node, - MEMBLOCK_NONE); + PFN_PHYS(slot_psize), node); } } } diff --git a/arch/mips/sgi-ip30/ip30-setup.c b/arch/mips/sgi-ip30/ip30-setup.c index 75a34684e7..44b1607e96 100644 --- a/arch/mips/sgi-ip30/ip30-setup.c +++ b/arch/mips/sgi-ip30/ip30-setup.c @@ -69,10 +69,10 @@ static void __init ip30_mem_init(void) total_mem += size; if (addr >= IP30_REAL_MEMORY_START) - memblock_phys_free(addr, size); + memblock_free(addr, size); else if ((addr + size) > IP30_REAL_MEMORY_START) - memblock_phys_free(IP30_REAL_MEMORY_START, - size - IP30_MAX_PROM_MEMORY); + memblock_free(IP30_REAL_MEMORY_START, + size - IP30_MAX_PROM_MEMORY); } pr_info("Detected %luMB of physical memory.\n", MEM_SHIFT(total_mem)); } diff --git a/arch/mips/sgi-ip32/ip32-berr.c b/arch/mips/sgi-ip32/ip32-berr.c index 478b63b4c8..c860f95ab7 100644 --- a/arch/mips/sgi-ip32/ip32-berr.c +++ b/arch/mips/sgi-ip32/ip32-berr.c @@ -34,5 +34,5 @@ static int ip32_be_handler(struct pt_regs *regs, int is_fixup) void __init ip32_be_init(void) { - mips_set_be_handler(ip32_be_handler); + board_be_handler = ip32_be_handler; } diff --git a/arch/mips/sibyte/common/cfe.c b/arch/mips/sibyte/common/cfe.c index 1a504294d8..a3323f8dcc 100644 --- a/arch/mips/sibyte/common/cfe.c +++ b/arch/mips/sibyte/common/cfe.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c index 72a31eeeeb..538a2791b4 100644 --- a/arch/mips/sibyte/swarm/setup.c +++ b/arch/mips/sibyte/swarm/setup.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -122,7 +123,7 @@ void __init plat_mem_setup(void) #error invalid SiByte board configuration #endif - mips_set_be_handler(swarm_be_handler); + board_be_handler = swarm_be_handler; if (xicor_probe()) swarm_rtc_type = RTC_XICOR; diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig index 6c61feee6d..85c4c121c7 100644 --- a/arch/mips/txx9/Kconfig +++ b/arch/mips/txx9/Kconfig @@ -6,7 +6,6 @@ config MACH_TX39XX config MACH_TX49XX bool - select BOOT_ELF32 select MACH_TXX9 select CEVT_R4K select CSRC_R4K @@ -39,6 +38,23 @@ config TOSHIBA_RBTX4927 This Toshiba board is based on the TX4927 processor. Say Y here to support this machine type +config TOSHIBA_RBTX4938 + bool "Toshiba RBTX4938 board" + depends on MACH_TX49XX + select SOC_TX4938 + help + This Toshiba board is based on the TX4938 processor. Say Y here to + support this machine type + +config TOSHIBA_RBTX4939 + bool "Toshiba RBTX4939 board" + depends on MACH_TX49XX + select SOC_TX4939 + select TXX9_7SEGLED + help + This Toshiba board is based on the TX4939 processor. Say Y here to + support this machine type + config SOC_TX3927 bool select CEVT_TXX9 @@ -55,6 +71,7 @@ config SOC_TX4927 select IRQ_TXX9 select PCI_TX4927 select GPIO_TXX9 + imply HAS_TXX9_ACLC config SOC_TX4938 bool @@ -64,6 +81,18 @@ config SOC_TX4938 select IRQ_TXX9 select PCI_TX4927 select GPIO_TXX9 + imply HAS_TXX9_ACLC + +config SOC_TX4939 + bool + select CEVT_TXX9 + imply HAS_TXX9_SERIAL + select HAVE_PCI + select PCI_TX4927 + imply HAS_TXX9_ACLC + +config TXX9_7SEGLED + bool config TOSHIBA_FPCIB0 bool "FPCIB0 Backplane Support" @@ -75,5 +104,25 @@ config PICMG_PCI_BACKPLANE_DEFAULT depends on PCI && MACH_TXX9 default y if !TOSHIBA_FPCIB0 +if TOSHIBA_RBTX4938 + +comment "Multiplex Pin Select" +choice + prompt "PIO[58:61]" + default TOSHIBA_RBTX4938_MPLEX_PIO58_61 + +config TOSHIBA_RBTX4938_MPLEX_PIO58_61 + bool "PIO" +config TOSHIBA_RBTX4938_MPLEX_NAND + bool "NAND" +config TOSHIBA_RBTX4938_MPLEX_ATA + bool "ATA" +config TOSHIBA_RBTX4938_MPLEX_KEEP + bool "Keep firmware settings" + +endchoice + +endif + config PCI_TX4927 bool diff --git a/arch/mips/txx9/Makefile b/arch/mips/txx9/Makefile index 53269910a4..1952959372 100644 --- a/arch/mips/txx9/Makefile +++ b/arch/mips/txx9/Makefile @@ -14,3 +14,5 @@ obj-$(CONFIG_TOSHIBA_JMR3927) += jmr3927/ # Toshiba RBTX49XX boards # obj-$(CONFIG_TOSHIBA_RBTX4927) += rbtx4927/ +obj-$(CONFIG_TOSHIBA_RBTX4938) += rbtx4938/ +obj-$(CONFIG_TOSHIBA_RBTX4939) += rbtx4939/ diff --git a/arch/mips/txx9/generic/Makefile b/arch/mips/txx9/generic/Makefile index be5af9fe7c..6d00580fc8 100644 --- a/arch/mips/txx9/generic/Makefile +++ b/arch/mips/txx9/generic/Makefile @@ -8,4 +8,7 @@ obj-$(CONFIG_PCI) += pci.o obj-$(CONFIG_SOC_TX3927) += setup_tx3927.o irq_tx3927.o obj-$(CONFIG_SOC_TX4927) += mem_tx4927.o setup_tx4927.o irq_tx4927.o obj-$(CONFIG_SOC_TX4938) += mem_tx4927.o setup_tx4938.o irq_tx4938.o +obj-$(CONFIG_SOC_TX4939) += setup_tx4939.o irq_tx4939.o obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o +obj-$(CONFIG_SPI) += spi_eeprom.o +obj-$(CONFIG_TXX9_7SEGLED) += 7segled.o diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 39cd1edf9d..42ba1e97df 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -314,6 +314,16 @@ static void __init select_board(void) case 0x4937: txx9_board_vec = &rbtx4937_vec; break; +#endif +#ifdef CONFIG_TOSHIBA_RBTX4938 + case 0x4938: + txx9_board_vec = &rbtx4938_vec; + break; +#endif +#ifdef CONFIG_TOSHIBA_RBTX4939 + case 0x4939: + txx9_board_vec = &rbtx4939_vec; + break; #endif } #endif @@ -580,6 +590,21 @@ unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none; EXPORT_SYMBOL(__swizzle_addr_b); #endif +#ifdef NEEDS_TXX9_IOSWABW +static u16 ioswabw_default(volatile u16 *a, u16 x) +{ + return le16_to_cpu(x); +} +static u16 __mem_ioswabw_default(volatile u16 *a, u16 x) +{ + return x; +} +u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default; +EXPORT_SYMBOL(ioswabw); +u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default; +EXPORT_SYMBOL(__mem_ioswabw); +#endif + void __init txx9_physmap_flash_init(int no, unsigned long addr, unsigned long size, const struct physmap_flash_data *pdata) @@ -815,6 +840,34 @@ void __init txx9_aclc_init(unsigned long baseaddr, int irq, unsigned int dma_chan_out, unsigned int dma_chan_in) { +#if IS_ENABLED(CONFIG_SND_SOC_TXX9ACLC) + unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS; + struct resource res[] = { + { + .start = baseaddr, + .end = baseaddr + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = irq, + .flags = IORESOURCE_IRQ, + }, { + .name = "txx9dmac-chan", + .start = dma_base + dma_chan_out, + .flags = IORESOURCE_DMA, + }, { + .name = "txx9dmac-chan", + .start = dma_base + dma_chan_in, + .flags = IORESOURCE_DMA, + } + }; + struct platform_device *pdev = + platform_device_alloc("txx9aclc-ac97", -1); + + if (!pdev || + platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) || + platform_device_add(pdev)) + platform_device_put(pdev); +#endif } static struct bus_type txx9_sramc_subsys = { diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c index 63f9725b2e..46e9c41013 100644 --- a/arch/mips/txx9/generic/setup_tx4927.c +++ b/arch/mips/txx9/generic/setup_tx4927.c @@ -80,7 +80,7 @@ static int tx4927_be_handler(struct pt_regs *regs, int is_fixup) } static void __init tx4927_be_init(void) { - mips_set_be_handler(tx4927_be_handler); + board_be_handler = tx4927_be_handler; } static struct resource tx4927_sdram_resource[4]; diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c index ba646548c5..17395d5d15 100644 --- a/arch/mips/txx9/generic/setup_tx4938.c +++ b/arch/mips/txx9/generic/setup_tx4938.c @@ -82,7 +82,7 @@ static int tx4938_be_handler(struct pt_regs *regs, int is_fixup) } static void __init tx4938_be_init(void) { - mips_set_be_handler(tx4938_be_handler); + board_be_handler = tx4938_be_handler; } static struct resource tx4938_sdram_resource[4]; diff --git a/arch/mips/vdso/Makefile b/arch/mips/vdso/Makefile index d65f55f67e..1b2ea34c3d 100644 --- a/arch/mips/vdso/Makefile +++ b/arch/mips/vdso/Makefile @@ -57,7 +57,7 @@ endif # VDSO linker flags. ldflags-y := -Bsymbolic --no-undefined -soname=linux-vdso.so.1 \ - $(filter -E%,$(KBUILD_CFLAGS)) -shared \ + $(filter -E%,$(KBUILD_CFLAGS)) -nostdlib -shared \ -G 0 --eh-frame-hdr --hash-style=sysv --build-id=sha1 -T CFLAGS_REMOVE_vdso.o = $(CC_FLAGS_FTRACE) diff --git a/arch/nios2/Kbuild b/arch/nios2/Kbuild index 4e39f7abde..a4e40e534e 100644 --- a/arch/nios2/Kbuild +++ b/arch/nios2/Kbuild @@ -1,4 +1 @@ # SPDX-License-Identifier: GPL-2.0-only - -# for cleaning -subdir- += boot diff --git a/arch/nios2/Makefile b/arch/nios2/Makefile index 02d6785590..52c03e60b1 100644 --- a/arch/nios2/Makefile +++ b/arch/nios2/Makefile @@ -8,7 +8,8 @@ # Written by Fredrik Markstrom # # This file is included by the global makefile so that you can add your own -# architecture-specific flags and dependencies. +# architecture-specific flags and dependencies. Remember to do have actions +# for "archclean" cleaning up for this architecture. # # Nios2 port by Wind River Systems Inc trough: # fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com @@ -52,12 +53,14 @@ core-y += $(nios2-boot)/dts/ all: vmImage +archclean: + $(Q)$(MAKE) $(clean)=$(nios2-boot) + $(BOOT_TARGETS): vmlinux $(Q)$(MAKE) $(build)=$(nios2-boot) $(nios2-boot)/$@ install: - sh $(srctree)/$(nios2-boot)/install.sh $(KERNELRELEASE) \ - $(KBUILD_IMAGE) System.map "$(INSTALL_PATH)" + $(Q)$(MAKE) $(build)=$(nios2-boot) BOOTIMAGE=$(KBUILD_IMAGE) install define archhelp echo '* vmImage - Kernel-only image for U-Boot ($(KBUILD_IMAGE))' diff --git a/arch/nios2/boot/Makefile b/arch/nios2/boot/Makefile index 8c3ad76602..37dfc7e584 100644 --- a/arch/nios2/boot/Makefile +++ b/arch/nios2/boot/Makefile @@ -30,3 +30,6 @@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE $(obj)/compressed/vmlinux: $(obj)/vmlinux.gz FORCE $(Q)$(MAKE) $(build)=$(obj)/compressed $@ + +install: + sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)" diff --git a/arch/nios2/boot/dts/Makefile b/arch/nios2/boot/dts/Makefile index e9e31bb40d..a91a0b09be 100644 --- a/arch/nios2/boot/dts/Makefile +++ b/arch/nios2/boot/dts/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -obj-y := $(patsubst %.dts,%.dtb.o,$(CONFIG_NIOS2_DTB_SOURCE)) +obj-y := $(patsubst "%.dts",%.dtb.o,$(CONFIG_NIOS2_DTB_SOURCE)) dtstree := $(srctree)/$(src) dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts)) diff --git a/arch/nios2/include/asm/cacheflush.h b/arch/nios2/include/asm/cacheflush.h index d0b71dd712..18eb9f69f8 100644 --- a/arch/nios2/include/asm/cacheflush.h +++ b/arch/nios2/include/asm/cacheflush.h @@ -28,7 +28,7 @@ extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, extern void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn); #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 -void flush_dcache_page(struct page *page); +extern void flush_dcache_page(struct page *page); extern void flush_icache_range(unsigned long start, unsigned long end); extern void flush_icache_page(struct vm_area_struct *vma, struct page *page); diff --git a/arch/nios2/include/asm/processor.h b/arch/nios2/include/asm/processor.h index b8125dfbca..94bcb86f67 100644 --- a/arch/nios2/include/asm/processor.h +++ b/arch/nios2/include/asm/processor.h @@ -69,7 +69,7 @@ static inline void release_thread(struct task_struct *dead_task) { } -extern unsigned long __get_wchan(struct task_struct *p); +extern unsigned long get_wchan(struct task_struct *p); #define task_pt_regs(p) \ ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1) diff --git a/arch/nios2/include/asm/syscall.h b/arch/nios2/include/asm/syscall.h index fff52205fb..526449edd7 100644 --- a/arch/nios2/include/asm/syscall.h +++ b/arch/nios2/include/asm/syscall.h @@ -58,6 +58,17 @@ static inline void syscall_get_arguments(struct task_struct *task, *args = regs->r9; } +static inline void syscall_set_arguments(struct task_struct *task, + struct pt_regs *regs, const unsigned long *args) +{ + regs->r4 = *args++; + regs->r5 = *args++; + regs->r6 = *args++; + regs->r7 = *args++; + regs->r8 = *args++; + regs->r9 = *args; +} + static inline int syscall_get_arch(struct task_struct *task) { return AUDIT_ARCH_NIOS2; diff --git a/arch/nios2/kernel/process.c b/arch/nios2/kernel/process.c index f8ea522a15..9ff37ba2bb 100644 --- a/arch/nios2/kernel/process.c +++ b/arch/nios2/kernel/process.c @@ -217,12 +217,15 @@ void dump(struct pt_regs *fp) pr_emerg("\n\n"); } -unsigned long __get_wchan(struct task_struct *p) +unsigned long get_wchan(struct task_struct *p) { unsigned long fp, pc; unsigned long stack_page; int count = 0; + if (!p || p == current || task_is_running(p)) + return 0; + stack_page = (unsigned long)p; fp = ((struct switch_stack *)p->thread.ksp)->fp; /* ;dgt2 */ do { diff --git a/arch/nios2/kernel/traps.c b/arch/nios2/kernel/traps.c index 85ac49d64c..596986a74a 100644 --- a/arch/nios2/kernel/traps.c +++ b/arch/nios2/kernel/traps.c @@ -37,10 +37,10 @@ void die(const char *str, struct pt_regs *regs, long err) show_regs(regs); spin_unlock_irq(&die_lock); /* - * make_task_dead() should take care of panic'ing from an interrupt + * do_exit() should take care of panic'ing from an interrupt * context so we don't handle it here */ - make_task_dead(err); + do_exit(err); } void _exception(int signo, struct pt_regs *regs, int code, unsigned long addr) diff --git a/arch/nios2/mm/fault.c b/arch/nios2/mm/fault.c index a32f14cd72..9476feecf5 100644 --- a/arch/nios2/mm/fault.c +++ b/arch/nios2/mm/fault.c @@ -149,16 +149,18 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long cause, BUG(); } - if (fault & VM_FAULT_RETRY) { - flags |= FAULT_FLAG_TRIED; + if (flags & FAULT_FLAG_ALLOW_RETRY) { + if (fault & VM_FAULT_RETRY) { + flags |= FAULT_FLAG_TRIED; - /* - * No need to mmap_read_unlock(mm) as we would - * have already released it in __lock_page_or_retry - * in mm/filemap.c. - */ + /* + * No need to mmap_read_unlock(mm) as we would + * have already released it in __lock_page_or_retry + * in mm/filemap.c. + */ - goto retry; + goto retry; + } } mmap_read_unlock(mm); diff --git a/arch/openrisc/Kbuild b/arch/openrisc/Kbuild index b0b0f2b03f..4234b4c03e 100644 --- a/arch/openrisc/Kbuild +++ b/arch/openrisc/Kbuild @@ -1,6 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 obj-y += lib/ kernel/ mm/ obj-y += boot/dts/ - -# for cleaning -subdir- += boot diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig index f724b3f1ae..e804026b47 100644 --- a/arch/openrisc/Kconfig +++ b/arch/openrisc/Kconfig @@ -10,10 +10,10 @@ config OPENRISC select ARCH_HAS_DMA_SET_UNCACHED select ARCH_HAS_DMA_CLEAR_UNCACHED select ARCH_HAS_SYNC_DMA_FOR_DEVICE - select COMMON_CLK select OF select OF_EARLY_FLATTREE select IRQ_DOMAIN + select HANDLE_DOMAIN_IRQ select GPIOLIB select HAVE_ARCH_TRACEHOOK select SPARSE_IRQ diff --git a/arch/openrisc/Makefile b/arch/openrisc/Makefile index 760b734fb8..c52de526e5 100644 --- a/arch/openrisc/Makefile +++ b/arch/openrisc/Makefile @@ -1,7 +1,9 @@ # BK Id: %F% %I% %G% %U% %#% # # This file is included by the global makefile so that you can add your own -# architecture-specific flags and dependencies. +# architecture-specific flags and dependencies. Remember to do have actions +# for "archclean" and "archdep" for cleaning up and making dependencies for +# this architecture # # This file is subject to the terms and conditions of the GNU General Public # License. See the file "COPYING" in the main directory of this archive @@ -46,3 +48,6 @@ PHONY += vmlinux.bin vmlinux.bin: vmlinux $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ + +archclean: + $(Q)$(MAKE) $(clean)=$(boot) diff --git a/arch/openrisc/boot/dts/Makefile b/arch/openrisc/boot/dts/Makefile index 13db5a2aab..17dd791a83 100644 --- a/arch/openrisc/boot/dts/Makefile +++ b/arch/openrisc/boot/dts/Makefile @@ -1,4 +1,9 @@ # SPDX-License-Identifier: GPL-2.0 -obj-y += $(addsuffix .dtb.o, $(CONFIG_OPENRISC_BUILTIN_DTB)) +ifneq '$(CONFIG_OPENRISC_BUILTIN_DTB)' '""' +BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_OPENRISC_BUILTIN_DTB)).dtb.o +else +BUILTIN_DTB := +endif +obj-y += $(BUILTIN_DTB) #DTC_FLAGS ?= -p 1024 diff --git a/arch/openrisc/include/asm/bitops.h b/arch/openrisc/include/asm/bitops.h index d773ed938a..7f1ca35213 100644 --- a/arch/openrisc/include/asm/bitops.h +++ b/arch/openrisc/include/asm/bitops.h @@ -30,6 +30,7 @@ #include #include #include +#include #ifndef _LINUX_BITOPS_H #error only can be included directly diff --git a/arch/openrisc/include/asm/processor.h b/arch/openrisc/include/asm/processor.h index aa1699c18a..ad53b31848 100644 --- a/arch/openrisc/include/asm/processor.h +++ b/arch/openrisc/include/asm/processor.h @@ -73,7 +73,7 @@ struct thread_struct { void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp); void release_thread(struct task_struct *); -unsigned long __get_wchan(struct task_struct *p); +unsigned long get_wchan(struct task_struct *p); #define cpu_relax() barrier() diff --git a/arch/openrisc/include/asm/spinlock.h b/arch/openrisc/include/asm/spinlock.h index 264944a715..a8940bdfcb 100644 --- a/arch/openrisc/include/asm/spinlock.h +++ b/arch/openrisc/include/asm/spinlock.h @@ -19,6 +19,9 @@ #include +#define arch_read_lock_flags(lock, flags) arch_read_lock(lock) +#define arch_write_lock_flags(lock, flags) arch_write_lock(lock) + #define arch_spin_relax(lock) cpu_relax() #define arch_read_relax(lock) cpu_relax() #define arch_write_relax(lock) cpu_relax() diff --git a/arch/openrisc/include/asm/syscall.h b/arch/openrisc/include/asm/syscall.h index 903ed882bd..e6383be2a1 100644 --- a/arch/openrisc/include/asm/syscall.h +++ b/arch/openrisc/include/asm/syscall.h @@ -57,6 +57,13 @@ syscall_get_arguments(struct task_struct *task, struct pt_regs *regs, memcpy(args, ®s->gpr[3], 6 * sizeof(args[0])); } +static inline void +syscall_set_arguments(struct task_struct *task, struct pt_regs *regs, + const unsigned long *args) +{ + memcpy(®s->gpr[3], args, 6 * sizeof(args[0])); +} + static inline int syscall_get_arch(struct task_struct *task) { return AUDIT_ARCH_OPENRISC; diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S index 3ca1b1f490..c68f3349c1 100644 --- a/arch/openrisc/kernel/entry.S +++ b/arch/openrisc/kernel/entry.S @@ -569,8 +569,8 @@ EXCEPTION_ENTRY(_external_irq_handler) #endif CLEAR_LWA_FLAG(r3) l.addi r3,r1,0 - l.movhi r8,hi(generic_handle_arch_irq) - l.ori r8,r8,lo(generic_handle_arch_irq) + l.movhi r8,hi(do_IRQ) + l.ori r8,r8,lo(do_IRQ) l.jalr r8 l.nop l.j _ret_from_intr @@ -1001,10 +1001,11 @@ ENTRY(ret_from_fork) l.lwz r11,PT_GPR11(r1) /* The syscall fast path return expects call-saved registers - * r14-r28 to be untouched, so we restore them here as they + * r12-r28 to be untouched, so we restore them here as they * will have been effectively clobbered when arriving here * via the call to switch() */ + l.lwz r12,PT_GPR12(r1) l.lwz r14,PT_GPR14(r1) l.lwz r16,PT_GPR16(r1) l.lwz r18,PT_GPR18(r1) @@ -1036,10 +1037,10 @@ ENTRY(ret_from_fork) /* _switch MUST never lay on page boundry, cause it runs from * effective addresses and beeing interrupted by iTLB miss would kill it. - * dTLB miss seems to never accour in the bad place since data accesses + * dTLB miss seams to never accour in the bad place since data accesses * are from task structures which are always page aligned. * - * The problem happens in RESTORE_ALL where we first set the EPCR + * The problem happens in RESTORE_ALL_NO_R11 where we first set the EPCR * register, then load the previous register values and only at the end call * the l.rfe instruction. If get TLB miss in beetwen the EPCR register gets * garbled and we end up calling l.rfe with the wrong EPCR. (same probably @@ -1067,8 +1068,9 @@ ENTRY(_switch) /* No need to store r1/PT_SP as it goes into KSP below */ l.sw PT_GPR2(r1),r2 l.sw PT_GPR9(r1),r9 - - /* Save callee-saved registers to the new pt_regs */ + /* This is wrong, r12 shouldn't be here... but GCC is broken for the time being + * and expects r12 to be callee-saved... */ + l.sw PT_GPR12(r1),r12 l.sw PT_GPR14(r1),r14 l.sw PT_GPR16(r1),r16 l.sw PT_GPR18(r1),r18 @@ -1109,7 +1111,9 @@ ENTRY(_switch) /* No need to restore r10 */ /* ...and do not restore r11 */ - /* Restore callee-saved registers */ + /* This is wrong, r12 shouldn't be here... but GCC is broken for the time being + * and expects r12 to be callee-saved... */ + l.lwz r12,PT_GPR12(r1) l.lwz r14,PT_GPR14(r1) l.lwz r16,PT_GPR16(r1) l.lwz r18,PT_GPR18(r1) @@ -1162,8 +1166,9 @@ _fork_save_extra_regs_and_call: ENTRY(__sys_clone) l.movhi r29,hi(sys_clone) + l.ori r29,r29,lo(sys_clone) l.j _fork_save_extra_regs_and_call - l.ori r29,r29,lo(sys_clone) + l.nop ENTRY(__sys_clone3) l.movhi r29,hi(sys_clone3) @@ -1172,8 +1177,9 @@ ENTRY(__sys_clone3) ENTRY(__sys_fork) l.movhi r29,hi(sys_fork) + l.ori r29,r29,lo(sys_fork) l.j _fork_save_extra_regs_and_call - l.ori r29,r29,lo(sys_fork) + l.nop ENTRY(sys_rt_sigreturn) l.jal _sys_rt_sigreturn diff --git a/arch/openrisc/kernel/irq.c b/arch/openrisc/kernel/irq.c index f38e10962a..c38fa863af 100644 --- a/arch/openrisc/kernel/irq.c +++ b/arch/openrisc/kernel/irq.c @@ -36,3 +36,8 @@ void __init init_IRQ(void) { irqchip_init(); } + +void __irq_entry do_IRQ(struct pt_regs *regs) +{ + handle_arch_irq(regs); +} diff --git a/arch/openrisc/kernel/process.c b/arch/openrisc/kernel/process.c index 3c0c91bcdc..b0698d9ce1 100644 --- a/arch/openrisc/kernel/process.c +++ b/arch/openrisc/kernel/process.c @@ -263,7 +263,7 @@ void dump_elf_thread(elf_greg_t *dest, struct pt_regs* regs) dest[35] = 0; } -unsigned long __get_wchan(struct task_struct *p) +unsigned long get_wchan(struct task_struct *p) { /* TODO */ diff --git a/arch/openrisc/kernel/signal.c b/arch/openrisc/kernel/signal.c index 92c5b70740..1ebcff2710 100644 --- a/arch/openrisc/kernel/signal.c +++ b/arch/openrisc/kernel/signal.c @@ -28,6 +28,8 @@ #include #include +#define DEBUG_SIG 0 + struct rt_sigframe { struct siginfo info; struct ucontext uc; @@ -313,7 +315,7 @@ do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall) } } local_irq_disable(); - thread_flags = read_thread_flags(); + thread_flags = current_thread_info()->flags; } while (thread_flags & _TIF_WORK_MASK); return 0; } diff --git a/arch/openrisc/kernel/smp.c b/arch/openrisc/kernel/smp.c index 27041db2c8..ba78766cf0 100644 --- a/arch/openrisc/kernel/smp.c +++ b/arch/openrisc/kernel/smp.c @@ -65,7 +65,11 @@ void __init smp_init_cpus(void) u32 cpu_id; for_each_of_cpu_node(cpu) { - cpu_id = of_get_cpu_hwid(cpu, 0); + if (of_property_read_u32(cpu, "reg", &cpu_id)) { + pr_warn("%s missing reg property", cpu->full_name); + continue; + } + if (cpu_id < NR_CPUS) set_cpu_possible(cpu_id, true); } diff --git a/arch/openrisc/kernel/time.c b/arch/openrisc/kernel/time.c index 6d18989d63..b828660619 100644 --- a/arch/openrisc/kernel/time.c +++ b/arch/openrisc/kernel/time.c @@ -20,7 +20,6 @@ #include #include #include -#include #include @@ -128,7 +127,7 @@ irqreturn_t __irq_entry timer_interrupt(struct pt_regs *regs) return IRQ_HANDLED; } -/* +/** * Clocksource: Based on OpenRISC timer/counter * * This sets up the OpenRISC Tick Timer as a clock source. The tick timer @@ -170,7 +169,4 @@ void __init time_init(void) openrisc_timer_init(); openrisc_clockevent_init(); - - of_clk_init(NULL); - timer_probe(); } diff --git a/arch/openrisc/kernel/traps.c b/arch/openrisc/kernel/traps.c index 0446a3c343..aa1e709405 100644 --- a/arch/openrisc/kernel/traps.c +++ b/arch/openrisc/kernel/traps.c @@ -197,7 +197,7 @@ void nommu_dump_state(struct pt_regs *regs, } /* This is normally the 'Oops' routine */ -void __noreturn die(const char *str, struct pt_regs *regs, long err) +void die(const char *str, struct pt_regs *regs, long err) { console_verbose(); @@ -212,7 +212,7 @@ void __noreturn die(const char *str, struct pt_regs *regs, long err) __asm__ __volatile__("l.nop 1"); do {} while (1); #endif - make_task_dead(SIGSEGV); + do_exit(SIGSEGV); } /* This is normally the 'Oops' routine */ diff --git a/arch/openrisc/mm/fault.c b/arch/openrisc/mm/fault.c index 80bb66ad42..c730d1a516 100644 --- a/arch/openrisc/mm/fault.c +++ b/arch/openrisc/mm/fault.c @@ -32,7 +32,7 @@ unsigned long pte_errors; /* updated by do_page_fault() */ */ volatile pgd_t *current_pgd[NR_CPUS]; -extern void __noreturn die(char *, struct pt_regs *, long); +extern void die(char *, struct pt_regs *, long); /* * This routine handles page faults. It determines the address, @@ -177,16 +177,18 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long address, BUG(); } - /*RGD modeled on Cris */ - if (fault & VM_FAULT_RETRY) { - flags |= FAULT_FLAG_TRIED; + if (flags & FAULT_FLAG_ALLOW_RETRY) { + /*RGD modeled on Cris */ + if (fault & VM_FAULT_RETRY) { + flags |= FAULT_FLAG_TRIED; - /* No need to mmap_read_unlock(mm) as we would - * have already released it in __lock_page_or_retry - * in mm/filemap.c. - */ + /* No need to mmap_read_unlock(mm) as we would + * have already released it in __lock_page_or_retry + * in mm/filemap.c. + */ - goto retry; + goto retry; + } } mmap_read_unlock(mm); @@ -246,6 +248,8 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long address, die("Oops", regs, write_acc); + do_exit(SIGKILL); + /* * We ran out of memory, or some other thing happened to us that made * us unable to handle the page fault gracefully. diff --git a/arch/openrisc/mm/init.c b/arch/openrisc/mm/init.c index 97305bde1b..cfef61a7b6 100644 --- a/arch/openrisc/mm/init.c +++ b/arch/openrisc/mm/init.c @@ -25,6 +25,7 @@ #include #include #include +#include /* for initrd_* */ #include #include diff --git a/arch/sh/Kbuild b/arch/sh/Kbuild index be17188097..48c2a091a0 100644 --- a/arch/sh/Kbuild +++ b/arch/sh/Kbuild @@ -2,6 +2,3 @@ obj-y += kernel/ mm/ boards/ obj-$(CONFIG_SH_FPU_EMU) += math-emu/ obj-$(CONFIG_USE_BUILTIN_DTB) += boot/dts/ - -# for cleaning -subdir- += boot diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 2474a04cea..6904f4bdbf 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -34,6 +34,7 @@ config SUPERH select HAVE_FAST_GUP if MMU select HAVE_FUNCTION_GRAPH_TRACER select HAVE_FUNCTION_TRACER + select HAVE_FUTEX_CMPXCHG if FUTEX select HAVE_FTRACE_MCOUNT_RECORD select HAVE_HW_BREAKPOINT select HAVE_IOREMAP_PROT if MMU && !X2TLB @@ -55,6 +56,7 @@ config SUPERH select HAVE_STACKPROTECTOR select HAVE_SYSCALL_TRACEPOINTS select IRQ_FORCED_THREADING + select MAY_HAVE_SPARSE_IRQ select MODULES_USE_ELF_RELA select NEED_SG_DMA_LENGTH select NO_DMA if !MMU && !DMA_COHERENT diff --git a/arch/sh/Makefile b/arch/sh/Makefile index b39412bf91..88ddb6f1c7 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -198,6 +198,10 @@ compressed: zImage archprepare: $(Q)$(MAKE) $(build)=arch/sh/tools include/generated/machtypes.h +archclean: + $(Q)$(MAKE) $(clean)=$(boot) + $(Q)$(MAKE) $(clean)=arch/sh/kernel/vsyscall + archheaders: $(Q)$(MAKE) $(build)=arch/sh/kernel/syscalls all diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile index 1f5d2df3c7..c081e7e2d6 100644 --- a/arch/sh/boot/Makefile +++ b/arch/sh/boot/Makefile @@ -19,16 +19,16 @@ CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000 CONFIG_ENTRY_OFFSET ?= 0x00001000 CONFIG_PHYSICAL_START ?= $(CONFIG_MEMORY_START) -suffix_y := bin -suffix_$(CONFIG_KERNEL_GZIP) := gz -suffix_$(CONFIG_KERNEL_BZIP2) := bz2 -suffix_$(CONFIG_KERNEL_LZMA) := lzma -suffix_$(CONFIG_KERNEL_XZ) := xz -suffix_$(CONFIG_KERNEL_LZO) := lzo +suffix-y := bin +suffix-$(CONFIG_KERNEL_GZIP) := gz +suffix-$(CONFIG_KERNEL_BZIP2) := bz2 +suffix-$(CONFIG_KERNEL_LZMA) := lzma +suffix-$(CONFIG_KERNEL_XZ) := xz +suffix-$(CONFIG_KERNEL_LZO) := lzo targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz \ - uImage.bz2 uImage.lzma uImage.xz uImage.lzo uImage.bin \ - vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \ + uImage.bz2 uImage.lzma uImage.xz uImage.lzo uImage.bin +extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \ vmlinux.bin.xz vmlinux.bin.lzo subdir- := compressed romimage @@ -106,10 +106,10 @@ OBJCOPYFLAGS_uImage.srec := -I binary -O srec $(obj)/uImage.srec: $(obj)/uImage FORCE $(call if_changed,objcopy) -$(obj)/uImage: $(obj)/uImage.$(suffix_y) +$(obj)/uImage: $(obj)/uImage.$(suffix-y) @ln -sf $(notdir $<) $@ @echo ' Image $@ is ready' export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \ CONFIG_PHYSICAL_START CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET \ - KERNEL_MEMORY suffix_y + KERNEL_MEMORY suffix-y diff --git a/arch/sh/boot/compressed/.gitignore b/arch/sh/boot/compressed/.gitignore index cd16663bc7..37aa530573 100644 --- a/arch/sh/boot/compressed/.gitignore +++ b/arch/sh/boot/compressed/.gitignore @@ -1,2 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only +ashiftrt.S +ashldi3.c +ashlsi3.S +ashrsi3.S +lshrsi3.S vmlinux.bin.* diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile index 591125c42d..589d2d8a57 100644 --- a/arch/sh/boot/compressed/Makefile +++ b/arch/sh/boot/compressed/Makefile @@ -5,18 +5,12 @@ # create a compressed vmlinux image from the original vmlinux # -OBJECTS := head_32.o misc.o cache.o piggy.o \ - ashiftrt.o ashldi3.o ashrsi3.o ashlsi3.o lshrsi3.o +targets := vmlinux vmlinux.bin vmlinux.bin.gz \ + vmlinux.bin.bz2 vmlinux.bin.lzma \ + vmlinux.bin.xz vmlinux.bin.lzo \ + head_32.o misc.o piggy.o -# These were previously generated files. When you are building the kernel -# with O=, make sure to remove the stale files in the output tree. Otherwise, -# the build system wrongly compiles the stale ones. -ifdef building_out_of_srctree -$(shell rm -f $(addprefix $(obj)/, ashiftrt.S ashldi3.c ashrsi3.S ashlsi3.S lshrsi3.S)) -endif - -targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \ - vmlinux.bin.lzma vmlinux.bin.xz vmlinux.bin.lzo $(OBJECTS) +OBJECTS = $(obj)/head_32.o $(obj)/misc.o $(obj)/cache.o GCOV_PROFILE := n @@ -39,28 +33,42 @@ ccflags-remove-$(CONFIG_MCOUNT) += -pg LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext $(IMAGE_OFFSET) -e startup \ -T $(obj)/../../kernel/vmlinux.lds -KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING +# +# Pull in the necessary libgcc bits from the in-kernel implementation. +# +lib1funcs-y := ashiftrt.S ashldi3.c ashrsi3.S ashlsi3.S lshrsi3.S +lib1funcs-obj := \ + $(addsuffix .o, $(basename $(addprefix $(obj)/, $(lib1funcs-y)))) -$(obj)/vmlinux: $(addprefix $(obj)/, $(OBJECTS)) FORCE +lib1funcs-dir := $(srctree)/arch/$(SRCARCH)/lib + +KBUILD_CFLAGS += -I$(lib1funcs-dir) -DDISABLE_BRANCH_PROFILING + +$(addprefix $(obj)/,$(lib1funcs-y)): $(obj)/%: $(lib1funcs-dir)/% FORCE + $(call cmd,shipped) + +$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(lib1funcs-obj) FORCE $(call if_changed,ld) $(obj)/vmlinux.bin: vmlinux FORCE $(call if_changed,objcopy) -$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE +vmlinux.bin.all-y := $(obj)/vmlinux.bin + +$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE $(call if_changed,gzip) -$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE - $(call if_changed,bzip2_with_size) -$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE - $(call if_changed,lzma_with_size) -$(obj)/vmlinux.bin.xz: $(obj)/vmlinux.bin FORCE - $(call if_changed,xzkern_with_size) -$(obj)/vmlinux.bin.lzo: $(obj)/vmlinux.bin FORCE - $(call if_changed,lzo_with_size) +$(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE + $(call if_changed,bzip2) +$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE + $(call if_changed,lzma) +$(obj)/vmlinux.bin.xz: $(vmlinux.bin.all-y) FORCE + $(call if_changed,xzkern) +$(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) FORCE + $(call if_changed,lzo) OBJCOPYFLAGS += -R .empty_zero_page LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T -$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix_y) FORCE +$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) FORCE $(call if_changed,ld) diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c index ca05c99a3d..a03b6680a9 100644 --- a/arch/sh/boot/compressed/misc.c +++ b/arch/sh/boot/compressed/misc.c @@ -115,9 +115,6 @@ void __stack_chk_fail(void) void ftrace_stub(void) { } -void arch_ftrace_ops_list_func(void) -{ -} #define stackalign 4 diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile index 4a6dec9714..c17d65b82a 100644 --- a/arch/sh/boot/dts/Makefile +++ b/arch/sh/boot/dts/Makefile @@ -1,2 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-$(CONFIG_USE_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_SOURCE)) +ifneq ($(CONFIG_BUILTIN_DTB_SOURCE),"") +obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o +endif diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts index fa9562f78d..9f4742fab3 100644 --- a/arch/sh/boot/dts/j2_mimas_v2.dts +++ b/arch/sh/boot/dts/j2_mimas_v2.dts @@ -88,8 +88,6 @@ uart0: serial@100 { clock-frequency = <125000000>; compatible = "xlnx,xps-uartlite-1.00.a"; current-speed = <19200>; - xlnx,use-parity = <0>; - xlnx,data-bits = <8>; device_type = "serial"; interrupts = <0x12>; port-number = <0>; diff --git a/arch/sh/configs/sdk7786_defconfig b/arch/sh/configs/sdk7786_defconfig index a8662b6927..f776a1d0d2 100644 --- a/arch/sh/configs/sdk7786_defconfig +++ b/arch/sh/configs/sdk7786_defconfig @@ -5,6 +5,7 @@ CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_AUDIT=y CONFIG_AUDITSYSCALL=y +CONFIG_TREE_PREEMPT_RCU=y CONFIG_RCU_TRACE=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y diff --git a/arch/sh/kernel/crash_dump.c b/arch/sh/kernel/crash_dump.c index 5b41b59698..a9086127b1 100644 --- a/arch/sh/kernel/crash_dump.c +++ b/arch/sh/kernel/crash_dump.c @@ -26,7 +26,7 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf, size_t csize, unsigned long offset, int userbuf) { - void __iomem *vaddr; + void *vaddr; if (!csize) return 0; @@ -34,7 +34,7 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf, vaddr = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE); if (userbuf) { - if (copy_to_user((void __user *)buf, (vaddr + offset), csize)) { + if (copy_to_user(buf, (vaddr + offset), csize)) { iounmap(vaddr); return -EFAULT; } diff --git a/arch/sh/math-emu/math.c b/arch/sh/math-emu/math.c index cdaef6501d..615ba932c3 100644 --- a/arch/sh/math-emu/math.c +++ b/arch/sh/math-emu/math.c @@ -51,8 +51,8 @@ #define Rn (regs->regs[n]) #define Rm (regs->regs[m]) -#define MWRITE(d,a) ({if(put_user(d, (typeof (d) __user *)a)) return -EFAULT;}) -#define MREAD(d,a) ({if(get_user(d, (typeof (d) __user *)a)) return -EFAULT;}) +#define WRITE(d,a) ({if(put_user(d, (typeof (d)*)a)) return -EFAULT;}) +#define READ(d,a) ({if(get_user(d, (typeof (d)*)a)) return -EFAULT;}) #define PACK_S(r,f) FP_PACK_SP(&r,f) #define UNPACK_S(f,r) FP_UNPACK_SP(f,&r) @@ -157,11 +157,11 @@ fmov_idx_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, { if (FPSCR_SZ) { FMOV_EXT(n); - MREAD(FRn, Rm + R0 + 4); + READ(FRn, Rm + R0 + 4); n++; - MREAD(FRn, Rm + R0); + READ(FRn, Rm + R0); } else { - MREAD(FRn, Rm + R0); + READ(FRn, Rm + R0); } return 0; @@ -173,11 +173,11 @@ fmov_mem_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, { if (FPSCR_SZ) { FMOV_EXT(n); - MREAD(FRn, Rm + 4); + READ(FRn, Rm + 4); n++; - MREAD(FRn, Rm); + READ(FRn, Rm); } else { - MREAD(FRn, Rm); + READ(FRn, Rm); } return 0; @@ -189,12 +189,12 @@ fmov_inc_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, { if (FPSCR_SZ) { FMOV_EXT(n); - MREAD(FRn, Rm + 4); + READ(FRn, Rm + 4); n++; - MREAD(FRn, Rm); + READ(FRn, Rm); Rm += 8; } else { - MREAD(FRn, Rm); + READ(FRn, Rm); Rm += 4; } @@ -207,11 +207,11 @@ fmov_reg_idx(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, { if (FPSCR_SZ) { FMOV_EXT(m); - MWRITE(FRm, Rn + R0 + 4); + WRITE(FRm, Rn + R0 + 4); m++; - MWRITE(FRm, Rn + R0); + WRITE(FRm, Rn + R0); } else { - MWRITE(FRm, Rn + R0); + WRITE(FRm, Rn + R0); } return 0; @@ -223,11 +223,11 @@ fmov_reg_mem(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, { if (FPSCR_SZ) { FMOV_EXT(m); - MWRITE(FRm, Rn + 4); + WRITE(FRm, Rn + 4); m++; - MWRITE(FRm, Rn); + WRITE(FRm, Rn); } else { - MWRITE(FRm, Rn); + WRITE(FRm, Rn); } return 0; @@ -240,12 +240,12 @@ fmov_reg_dec(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, if (FPSCR_SZ) { FMOV_EXT(m); Rn -= 8; - MWRITE(FRm, Rn + 4); + WRITE(FRm, Rn + 4); m++; - MWRITE(FRm, Rn); + WRITE(FRm, Rn); } else { Rn -= 4; - MWRITE(FRm, Rn); + WRITE(FRm, Rn); } return 0; @@ -445,11 +445,11 @@ id_sys(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, u16 code) case 0x4052: case 0x4062: Rn -= 4; - MWRITE(*reg, Rn); + WRITE(*reg, Rn); break; case 0x4056: case 0x4066: - MREAD(*reg, Rn); + READ(*reg, Rn); Rn += 4; break; default: diff --git a/arch/sh/mm/alignment.c b/arch/sh/mm/alignment.c index 3a76a766f4..fb517b82a8 100644 --- a/arch/sh/mm/alignment.c +++ b/arch/sh/mm/alignment.c @@ -140,7 +140,7 @@ static int alignment_proc_open(struct inode *inode, struct file *file) static ssize_t alignment_proc_write(struct file *file, const char __user *buffer, size_t count, loff_t *pos) { - int *data = pde_data(file_inode(file)); + int *data = PDE_DATA(file_inode(file)); char mode; if (count > 0) { @@ -161,7 +161,7 @@ static const struct proc_ops alignment_proc_ops = { }; /* - * This needs to be done after sysctl_init_bases(), otherwise sys/ will be + * This needs to be done after sysctl_init, otherwise sys/ will be * overwritten. Actually, this shouldn't be in sys/ at all since * it isn't a sysctl, and it doesn't contain sysctl information. * We now locate it in /proc/cpu/alignment instead. diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault.c index e175667b13..88a1f453d7 100644 --- a/arch/sh/mm/fault.c +++ b/arch/sh/mm/fault.c @@ -238,6 +238,8 @@ no_context(struct pt_regs *regs, unsigned long error_code, show_fault_oops(regs, address); die("Oops", regs, error_code); + bust_spinlocks(0); + do_exit(SIGKILL); } static void @@ -485,15 +487,17 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, if (mm_fault_error(regs, error_code, address, fault)) return; - if (fault & VM_FAULT_RETRY) { - flags |= FAULT_FLAG_TRIED; + if (flags & FAULT_FLAG_ALLOW_RETRY) { + if (fault & VM_FAULT_RETRY) { + flags |= FAULT_FLAG_TRIED; - /* - * No need to mmap_read_unlock(mm) as we would - * have already released it in __lock_page_or_retry - * in mm/filemap.c. - */ - goto retry; + /* + * No need to mmap_read_unlock(mm) as we would + * have already released it in __lock_page_or_retry + * in mm/filemap.c. + */ + goto retry; + } } mmap_read_unlock(mm); diff --git a/arch/sh/mm/nommu.c b/arch/sh/mm/nommu.c index 78c4b6e6d3..8b4504413c 100644 --- a/arch/sh/mm/nommu.c +++ b/arch/sh/mm/nommu.c @@ -28,9 +28,9 @@ __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n) return 0; } -__kernel_size_t __clear_user(void __user *to, __kernel_size_t n) +__kernel_size_t __clear_user(void *to, __kernel_size_t n) { - memset((__force void *)to, 0, n); + memset(to, 0, n); return 0; }