// redo: ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi0-1,interrupt=16 // Device tree overlay for https://www.waveshare.com/2-ch-can-fd-hat.htm // in "Mode B" (requried hardware modification) configuration // for details see https://www.waveshare.com/wiki/2-CH_CAN_FD_HAT /dts-v1/; /plugin/; #include #include #include / { compatible = "brcm,bcm2835"; fragment@0 { target = <&spidev0>; __overlay__ { status = "disabled"; }; }; fragment@1 { target = <&gpio>; __overlay__ { mcp251xfd_pins: mcp251xfd_spi0_0_pins { brcm,pins = <25>; brcm,function = ; }; }; }; fragment@2 { target-path = "/clocks"; __overlay__ { clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <40000000>; }; }; }; fragment@3 { target = <&spi0>; __overlay__ { status = "okay"; #address-cells = <1>; #size-cells = <0>; mcp251xfd@0 { compatible = "microchip,mcp251xfd"; reg = <0>; pinctrl-names = "default"; pinctrl-0 = <&mcp251xfd_pins>; spi-max-frequency = <20000000>; interrupt-parent = <&gpio>; interrupts = <25 IRQ_TYPE_LEVEL_LOW>; clocks = <&clk_mcp251xfd_osc>; }; }; }; fragment@4 { target = <&spidev1>; __overlay__ { status = "disabled"; }; }; fragment@5 { target = <&gpio>; __overlay__ { mcp251xfd_pins_1: mcp251xfd_spi0_1_pins { brcm,pins = <16>; brcm,function = ; }; }; }; fragment@6 { target-path = "/clocks"; __overlay__ { clk_mcp251xfd_osc_1: mcp251xfd-spi0-1-osc { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <40000000>; }; }; }; fragment@7 { target = <&spi0>; __overlay__ { status = "okay"; #address-cells = <1>; #size-cells = <0>; mcp251xfd@1 { compatible = "microchip,mcp251xfd"; reg = <1>; pinctrl-names = "default"; pinctrl-0 = <&mcp251xfd_pins_1>; spi-max-frequency = <20000000>; interrupt-parent = <&gpio>; interrupts = <16 IRQ_TYPE_LEVEL_LOW>; clocks = <&clk_mcp251xfd_osc_1>; }; }; }; };