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Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
68 lines
1.5 KiB
YAML
68 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/rtc/microchip,mfps-rtc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip PolarFire Soc (MPFS) RTC Device Tree Bindings
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allOf:
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- $ref: rtc.yaml#
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maintainers:
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- Daire McNamara <daire.mcnamara@microchip.com>
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- Lewis Hanly <lewis.hanly@microchip.com>
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properties:
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compatible:
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enum:
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- microchip,mpfs-rtc
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: |
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RTC_WAKEUP interrupt
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- description: |
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RTC_MATCH, asserted when the content of the Alarm register is equal
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to that of the RTC's count register.
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clocks:
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items:
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- description: |
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AHB clock
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- description: |
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Reference clock: divided by the prescaler to create a time-based
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strobe (typically 1 Hz) for the calendar counter. By default, the rtc
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on the PolarFire SoC shares it's reference with MTIMER so this will
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be a 1 MHz clock.
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clock-names:
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items:
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- const: rtc
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- const: rtcref
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include "dt-bindings/clock/microchip,mpfs-clock.h"
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rtc@20124000 {
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compatible = "microchip,mpfs-rtc";
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reg = <0x20124000 0x1000>;
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clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>;
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clock-names = "rtc", "rtcref";
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interrupts = <80>, <81>;
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};
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...
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