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Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
34 lines
1.3 KiB
ReStructuredText
34 lines
1.3 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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===============================================================
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Configurable sysfs parameters for the x86-64 machine check code
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===============================================================
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Machine checks report internal hardware error conditions detected
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by the CPU. Uncorrected errors typically cause a machine check
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(often with panic), corrected ones cause a machine check log entry.
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Machine checks are organized in banks (normally associated with
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a hardware subsystem) and subevents in a bank. The exact meaning
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of the banks and subevent is CPU specific.
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mcelog knows how to decode them.
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When you see the "Machine check errors logged" message in the system
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log then mcelog should run to collect and decode machine check entries
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from /dev/mcelog. Normally mcelog should be run regularly from a cronjob.
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Each CPU has a directory in /sys/devices/system/machinecheck/machinecheckN
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(N = CPU number).
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The directory contains some configurable entries. See
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Documentation/ABI/testing/sysfs-mce for more details.
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TBD document entries for AMD threshold interrupt configuration
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For more details about the x86 machine check architecture
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see the Intel and AMD architecture manuals from their developer websites.
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For more details about the architecture
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see http://one.firstfloor.org/~andi/mce.pdf
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