mirror of
https://github.com/Qortal/Brooklyn.git
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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
31 lines
1.1 KiB
C
31 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Optimized RAID-5 checksumming functions for IA-64.
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*/
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extern void xor_ia64_2(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2);
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extern void xor_ia64_3(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2,
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const unsigned long * __restrict p3);
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extern void xor_ia64_4(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2,
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const unsigned long * __restrict p3,
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const unsigned long * __restrict p4);
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extern void xor_ia64_5(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2,
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const unsigned long * __restrict p3,
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const unsigned long * __restrict p4,
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const unsigned long * __restrict p5);
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static struct xor_block_template xor_block_ia64 = {
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.name = "ia64",
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.do_2 = xor_ia64_2,
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.do_3 = xor_ia64_3,
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.do_4 = xor_ia64_4,
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.do_5 = xor_ia64_5,
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};
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#define XOR_TRY_TEMPLATES xor_speed(&xor_block_ia64)
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