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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
86 lines
2.2 KiB
C
86 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _LINUX_T10_PI_H
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#define _LINUX_T10_PI_H
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#include <linux/types.h>
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#include <linux/blk-mq.h>
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/*
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* A T10 PI-capable target device can be formatted with different
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* protection schemes. Currently 0 through 3 are defined:
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*
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* Type 0 is regular (unprotected) I/O
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*
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* Type 1 defines the contents of the guard and reference tags
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*
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* Type 2 defines the contents of the guard and reference tags and
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* uses 32-byte commands to seed the latter
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*
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* Type 3 defines the contents of the guard tag only
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*/
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enum t10_dif_type {
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T10_PI_TYPE0_PROTECTION = 0x0,
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T10_PI_TYPE1_PROTECTION = 0x1,
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T10_PI_TYPE2_PROTECTION = 0x2,
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T10_PI_TYPE3_PROTECTION = 0x3,
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};
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/*
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* T10 Protection Information tuple.
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*/
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struct t10_pi_tuple {
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__be16 guard_tag; /* Checksum */
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__be16 app_tag; /* Opaque storage */
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__be32 ref_tag; /* Target LBA or indirect LBA */
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};
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#define T10_PI_APP_ESCAPE cpu_to_be16(0xffff)
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#define T10_PI_REF_ESCAPE cpu_to_be32(0xffffffff)
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static inline u32 t10_pi_ref_tag(struct request *rq)
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{
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unsigned int shift = ilog2(queue_logical_block_size(rq->q));
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#ifdef CONFIG_BLK_DEV_INTEGRITY
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if (rq->q->integrity.interval_exp)
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shift = rq->q->integrity.interval_exp;
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#endif
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return blk_rq_pos(rq) >> (shift - SECTOR_SHIFT) & 0xffffffff;
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}
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extern const struct blk_integrity_profile t10_pi_type1_crc;
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extern const struct blk_integrity_profile t10_pi_type1_ip;
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extern const struct blk_integrity_profile t10_pi_type3_crc;
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extern const struct blk_integrity_profile t10_pi_type3_ip;
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struct crc64_pi_tuple {
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__be64 guard_tag;
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__be16 app_tag;
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__u8 ref_tag[6];
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};
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/**
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* lower_48_bits() - return bits 0-47 of a number
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* @n: the number we're accessing
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*/
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static inline u64 lower_48_bits(u64 n)
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{
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return n & ((1ull << 48) - 1);
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}
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static inline u64 ext_pi_ref_tag(struct request *rq)
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{
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unsigned int shift = ilog2(queue_logical_block_size(rq->q));
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#ifdef CONFIG_BLK_DEV_INTEGRITY
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if (rq->q->integrity.interval_exp)
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shift = rq->q->integrity.interval_exp;
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#endif
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return lower_48_bits(blk_rq_pos(rq) >> (shift - SECTOR_SHIFT));
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}
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extern const struct blk_integrity_profile ext_pi_type1_crc64;
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extern const struct blk_integrity_profile ext_pi_type3_crc64;
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#endif
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