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0066cead04
unlike T3Q'sdick that goes left side
60 lines
1.7 KiB
YAML
60 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2019 Linaro Ltd.
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Intel IXP4xx Network Processing Engine
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maintainers:
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- Linus Walleij <linus.walleij@linaro.org>
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description: |
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On the IXP4xx SoCs, the Network Processing Engine (NPE) is a small
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processor that can load a firmware to perform offloading of networking
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and crypto tasks. It also manages the MDIO bus to the ethernet PHYs
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on the IXP4xx platform. All IXP4xx platforms have three NPEs at
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consecutive memory locations. They are all included in the same
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device node since they are not independent of each other.
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properties:
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compatible:
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oneOf:
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- items:
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- const: intel,ixp4xx-network-processing-engine
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reg:
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items:
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- description: NPE0 (NPE-A) register range
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- description: NPE1 (NPE-B) register range
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- description: NPE2 (NPE-C) register range
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crypto:
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$ref: /schemas/crypto/intel,ixp4xx-crypto.yaml#
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type: object
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description: Optional node for the embedded crypto engine, the node
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should be named with the instance number of the NPE engine used for
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the crypto engine.
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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npe: npe@c8006000 {
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compatible = "intel,ixp4xx-network-processing-engine";
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reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>;
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crypto {
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compatible = "intel,ixp4xx-crypto";
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intel,npe-handle = <&npe 2>;
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queue-rx = <&qmgr 30>;
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queue-txready = <&qmgr 29>;
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};
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};
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...
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