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d2ebfd0519
Screw the description like that inbred T3Q
203 lines
5.2 KiB
C
203 lines
5.2 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2016-2019 Intel Corporation
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*/
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#include <linux/types.h>
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#include "gt/intel_gt.h"
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#include "intel_huc.h"
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#include "i915_drv.h"
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/**
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* DOC: HuC
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*
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* The HuC is a dedicated microcontroller for usage in media HEVC (High
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* Efficiency Video Coding) operations. Userspace can directly use the firmware
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* capabilities by adding HuC specific commands to batch buffers.
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*
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* The kernel driver is only responsible for loading the HuC firmware and
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* triggering its security authentication, which is performed by the GuC. For
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* The GuC to correctly perform the authentication, the HuC binary must be
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* loaded before the GuC one. Loading the HuC is optional; however, not using
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* the HuC might negatively impact power usage and/or performance of media
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* workloads, depending on the use-cases.
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*
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* See https://github.com/intel/media-driver for the latest details on HuC
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* functionality.
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*/
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/**
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* DOC: HuC Memory Management
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*
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* Similarly to the GuC, the HuC can't do any memory allocations on its own,
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* with the difference being that the allocations for HuC usage are handled by
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* the userspace driver instead of the kernel one. The HuC accesses the memory
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* via the PPGTT belonging to the context loaded on the VCS executing the
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* HuC-specific commands.
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*/
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void intel_huc_init_early(struct intel_huc *huc)
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{
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struct drm_i915_private *i915 = huc_to_gt(huc)->i915;
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intel_uc_fw_init_early(&huc->fw, INTEL_UC_FW_TYPE_HUC);
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if (GRAPHICS_VER(i915) >= 11) {
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huc->status.reg = GEN11_HUC_KERNEL_LOAD_INFO;
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huc->status.mask = HUC_LOAD_SUCCESSFUL;
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huc->status.value = HUC_LOAD_SUCCESSFUL;
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} else {
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huc->status.reg = HUC_STATUS2;
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huc->status.mask = HUC_FW_VERIFIED;
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huc->status.value = HUC_FW_VERIFIED;
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}
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}
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int intel_huc_init(struct intel_huc *huc)
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{
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struct drm_i915_private *i915 = huc_to_gt(huc)->i915;
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int err;
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err = intel_uc_fw_init(&huc->fw);
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if (err)
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goto out;
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intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_LOADABLE);
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return 0;
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out:
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i915_probe_error(i915, "failed with %d\n", err);
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return err;
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}
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void intel_huc_fini(struct intel_huc *huc)
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{
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if (!intel_uc_fw_is_loadable(&huc->fw))
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return;
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intel_uc_fw_fini(&huc->fw);
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}
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/**
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* intel_huc_auth() - Authenticate HuC uCode
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* @huc: intel_huc structure
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*
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* Called after HuC and GuC firmware loading during intel_uc_init_hw().
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*
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* This function invokes the GuC action to authenticate the HuC firmware,
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* passing the offset of the RSA signature to intel_guc_auth_huc(). It then
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* waits for up to 50ms for firmware verification ACK.
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*/
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int intel_huc_auth(struct intel_huc *huc)
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{
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struct intel_gt *gt = huc_to_gt(huc);
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struct intel_guc *guc = >->uc.guc;
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int ret;
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GEM_BUG_ON(intel_huc_is_authenticated(huc));
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if (!intel_uc_fw_is_loaded(&huc->fw))
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return -ENOEXEC;
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ret = i915_inject_probe_error(gt->i915, -ENXIO);
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if (ret)
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goto fail;
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ret = intel_guc_auth_huc(guc,
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intel_guc_ggtt_offset(guc, huc->fw.rsa_data));
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if (ret) {
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DRM_ERROR("HuC: GuC did not ack Auth request %d\n", ret);
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goto fail;
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}
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/* Check authentication status, it should be done by now */
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ret = __intel_wait_for_register(gt->uncore,
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huc->status.reg,
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huc->status.mask,
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huc->status.value,
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2, 50, NULL);
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if (ret) {
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DRM_ERROR("HuC: Firmware not verified %d\n", ret);
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goto fail;
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}
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intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_RUNNING);
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return 0;
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fail:
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i915_probe_error(gt->i915, "HuC: Authentication failed %d\n", ret);
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intel_uc_fw_change_status(&huc->fw, INTEL_UC_FIRMWARE_LOAD_FAIL);
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return ret;
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}
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/**
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* intel_huc_check_status() - check HuC status
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* @huc: intel_huc structure
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*
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* This function reads status register to verify if HuC
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* firmware was successfully loaded.
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*
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* Returns:
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* * -ENODEV if HuC is not present on this platform,
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* * -EOPNOTSUPP if HuC firmware is disabled,
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* * -ENOPKG if HuC firmware was not installed,
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* * -ENOEXEC if HuC firmware is invalid or mismatched,
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* * 0 if HuC firmware is not running,
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* * 1 if HuC firmware is authenticated and running.
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*/
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int intel_huc_check_status(struct intel_huc *huc)
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{
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struct intel_gt *gt = huc_to_gt(huc);
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intel_wakeref_t wakeref;
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u32 status = 0;
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switch (__intel_uc_fw_status(&huc->fw)) {
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case INTEL_UC_FIRMWARE_NOT_SUPPORTED:
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return -ENODEV;
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case INTEL_UC_FIRMWARE_DISABLED:
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return -EOPNOTSUPP;
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case INTEL_UC_FIRMWARE_MISSING:
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return -ENOPKG;
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case INTEL_UC_FIRMWARE_ERROR:
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return -ENOEXEC;
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default:
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break;
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}
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with_intel_runtime_pm(gt->uncore->rpm, wakeref)
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status = intel_uncore_read(gt->uncore, huc->status.reg);
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return (status & huc->status.mask) == huc->status.value;
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}
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/**
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* intel_huc_load_status - dump information about HuC load status
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* @huc: the HuC
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* @p: the &drm_printer
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*
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* Pretty printer for HuC load status.
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*/
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void intel_huc_load_status(struct intel_huc *huc, struct drm_printer *p)
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{
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struct intel_gt *gt = huc_to_gt(huc);
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intel_wakeref_t wakeref;
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if (!intel_huc_is_supported(huc)) {
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drm_printf(p, "HuC not supported\n");
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return;
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}
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if (!intel_huc_is_wanted(huc)) {
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drm_printf(p, "HuC disabled\n");
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return;
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}
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intel_uc_fw_dump(&huc->fw, p);
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with_intel_runtime_pm(gt->uncore->rpm, wakeref)
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drm_printf(p, "HuC status: 0x%08x\n",
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intel_uncore_read(gt->uncore, huc->status.reg));
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}
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