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Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
90 lines
1.8 KiB
YAML
90 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/sifive,gpio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SiFive GPIO controller
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maintainers:
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- Paul Walmsley <paul.walmsley@sifive.com>
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properties:
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compatible:
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items:
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- enum:
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- sifive,fu540-c000-gpio
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- sifive,fu740-c000-gpio
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- canaan,k210-gpiohs
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- const: sifive,gpio0
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reg:
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maxItems: 1
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interrupts:
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description:
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Interrupt mapping, one per GPIO. Maximum 32 GPIOs.
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minItems: 1
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maxItems: 32
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interrupt-controller: true
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"#interrupt-cells":
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const: 2
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clocks:
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maxItems: 1
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"#gpio-cells":
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const: 2
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ngpios:
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description:
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The number of GPIOs available on the controller implementation.
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It is 16 for the SiFive SoCs and 32 for the Canaan K210.
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minimum: 1
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maximum: 32
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default: 16
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gpio-controller: true
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-controller
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- "#interrupt-cells"
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- "#gpio-cells"
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- gpio-controller
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if:
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properties:
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compatible:
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contains:
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enum:
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- sifive,fu540-c000-gpio
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- sifive,fu740-c000-gpio
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then:
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required:
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/sifive-fu540-prci.h>
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gpio@10060000 {
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compatible = "sifive,fu540-c000-gpio", "sifive,gpio0";
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interrupt-parent = <&plic>;
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interrupts = <7>, <8>, <9>, <10>, <11>, <12>, <13>, <14>, <15>, <16>,
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<17>, <18>, <19>, <20>, <21>, <22>;
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reg = <0x10060000 0x1000>;
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clocks = <&tlclk FU540_PRCI_CLK_TLCLK>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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...
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