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Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
57 lines
1.0 KiB
YAML
57 lines
1.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/cdns,dphy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence DPHY Device Tree Bindings
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maintainers:
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- Pratyush Yadav <p.yadav@ti.com>
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properties:
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compatible:
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items:
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- const: cdns,dphy
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reg:
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maxItems: 1
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clocks:
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items:
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- description: PMA state machine clock
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- description: PLL reference clock
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clock-names:
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items:
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- const: psm
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- const: pll_ref
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"#phy-cells":
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const: 0
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- "#phy-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/soc/ti,sci_pm_domain.h>
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dphy0: phy@fd0e0000{
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compatible = "cdns,dphy";
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reg = <0xfd0e0000 0x1000>;
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clocks = <&psm_clk>, <&pll_ref_clk>;
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clock-names = "psm", "pll_ref";
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power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
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#phy-cells = <0>;
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};
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