mirror of
https://github.com/Qortal/Brooklyn.git
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144 lines
4.1 KiB
C
144 lines
4.1 KiB
C
/*
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* Copyright (C) 2010 Broadcom
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _PLAT_BCM2708_DMA_H
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#define _PLAT_BCM2708_DMA_H
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/* DMA CS Control and Status bits */
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#define BCM2708_DMA_ACTIVE BIT(0)
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#define BCM2708_DMA_INT BIT(2)
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#define BCM2708_DMA_ISPAUSED BIT(4) /* Pause requested or not active */
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#define BCM2708_DMA_ISHELD BIT(5) /* Is held by DREQ flow control */
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#define BCM2708_DMA_ERR BIT(8)
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#define BCM2708_DMA_ABORT BIT(30) /* stop current CB, go to next, WO */
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#define BCM2708_DMA_RESET BIT(31) /* WO, self clearing */
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/* DMA control block "info" field bits */
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#define BCM2708_DMA_INT_EN BIT(0)
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#define BCM2708_DMA_TDMODE BIT(1)
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#define BCM2708_DMA_WAIT_RESP BIT(3)
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#define BCM2708_DMA_D_INC BIT(4)
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#define BCM2708_DMA_D_WIDTH BIT(5)
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#define BCM2708_DMA_D_DREQ BIT(6)
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#define BCM2708_DMA_S_INC BIT(8)
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#define BCM2708_DMA_S_WIDTH BIT(9)
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#define BCM2708_DMA_S_DREQ BIT(10)
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#define BCM2708_DMA_BURST(x) (((x) & 0xf) << 12)
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#define BCM2708_DMA_PER_MAP(x) ((x) << 16)
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#define BCM2708_DMA_WAITS(x) (((x) & 0x1f) << 21)
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#define BCM2708_DMA_DREQ_EMMC 11
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#define BCM2708_DMA_DREQ_SDHOST 13
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#define BCM2708_DMA_CS 0x00 /* Control and Status */
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#define BCM2708_DMA_ADDR 0x04
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/* the current control block appears in the following registers - read only */
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#define BCM2708_DMA_INFO 0x08
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#define BCM2708_DMA_SOURCE_AD 0x0c
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#define BCM2708_DMA_DEST_AD 0x10
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#define BCM2708_DMA_NEXTCB 0x1C
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#define BCM2708_DMA_DEBUG 0x20
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#define BCM2708_DMA4_CS (BCM2708_DMA_CHAN(4) + BCM2708_DMA_CS)
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#define BCM2708_DMA4_ADDR (BCM2708_DMA_CHAN(4) + BCM2708_DMA_ADDR)
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#define BCM2708_DMA_TDMODE_LEN(w, h) ((h) << 16 | (w))
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/* When listing features we can ask for when allocating DMA channels give
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those with higher priority smaller ordinal numbers */
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#define BCM_DMA_FEATURE_FAST_ORD 0
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#define BCM_DMA_FEATURE_BULK_ORD 1
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#define BCM_DMA_FEATURE_NORMAL_ORD 2
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#define BCM_DMA_FEATURE_LITE_ORD 3
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#define BCM_DMA_FEATURE_FAST BIT(BCM_DMA_FEATURE_FAST_ORD)
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#define BCM_DMA_FEATURE_BULK BIT(BCM_DMA_FEATURE_BULK_ORD)
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#define BCM_DMA_FEATURE_NORMAL BIT(BCM_DMA_FEATURE_NORMAL_ORD)
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#define BCM_DMA_FEATURE_LITE BIT(BCM_DMA_FEATURE_LITE_ORD)
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#define BCM_DMA_FEATURE_COUNT 4
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struct bcm2708_dma_cb {
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u32 info;
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u32 src;
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u32 dst;
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u32 length;
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u32 stride;
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u32 next;
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u32 pad[2];
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};
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struct scatterlist;
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struct platform_device;
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#if defined(CONFIG_DMA_BCM2708) || defined(CONFIG_DMA_BCM2708_MODULE)
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int bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr, int sg_len);
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void bcm_dma_start(void __iomem *dma_chan_base, dma_addr_t control_block);
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void bcm_dma_wait_idle(void __iomem *dma_chan_base);
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bool bcm_dma_is_busy(void __iomem *dma_chan_base);
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int bcm_dma_abort(void __iomem *dma_chan_base);
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/* return channel no or -ve error */
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int bcm_dma_chan_alloc(unsigned preferred_feature_set,
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void __iomem **out_dma_base, int *out_dma_irq);
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int bcm_dma_chan_free(int channel);
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int bcm_dmaman_probe(struct platform_device *pdev, void __iomem *base,
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u32 chans_available);
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int bcm_dmaman_remove(struct platform_device *pdev);
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#else /* CONFIG_DMA_BCM2708 */
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static inline int bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr,
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int sg_len)
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{
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return 0;
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}
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static inline void bcm_dma_start(void __iomem *dma_chan_base,
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dma_addr_t control_block) { }
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static inline void bcm_dma_wait_idle(void __iomem *dma_chan_base) { }
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static inline bool bcm_dma_is_busy(void __iomem *dma_chan_base)
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{
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return false;
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}
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static inline int bcm_dma_abort(void __iomem *dma_chan_base)
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{
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return -EINVAL;
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}
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static inline int bcm_dma_chan_alloc(unsigned preferred_feature_set,
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void __iomem **out_dma_base,
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int *out_dma_irq)
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{
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return -EINVAL;
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}
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static inline int bcm_dma_chan_free(int channel)
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{
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return -EINVAL;
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}
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static inline int bcm_dmaman_probe(struct platform_device *pdev,
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void __iomem *base, u32 chans_available)
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{
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return 0;
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}
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static inline int bcm_dmaman_remove(struct platform_device *pdev)
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{
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return 0;
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}
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#endif /* CONFIG_DMA_BCM2708 || CONFIG_DMA_BCM2708_MODULE */
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#endif /* _PLAT_BCM2708_DMA_H */
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