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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
49 lines
956 B
C
49 lines
956 B
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* IOP Coprocessor-6 access handler
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* Copyright (c) 2006, Intel Corporation.
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*/
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#include <linux/init.h>
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#include <asm/traps.h>
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#include <asm/ptrace.h>
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#include "iop3xx.h"
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void iop_enable_cp6(void)
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{
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u32 temp;
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/* enable cp6 access */
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asm volatile (
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"mrc p15, 0, %0, c15, c1, 0\n\t"
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"orr %0, %0, #(1 << 6)\n\t"
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"mcr p15, 0, %0, c15, c1, 0\n\t"
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"mrc p15, 0, %0, c15, c1, 0\n\t"
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"mov %0, %0\n\t"
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"sub pc, pc, #4 @ cp_wait\n\t"
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: "=r"(temp));
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}
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static int cp6_trap(struct pt_regs *regs, unsigned int instr)
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{
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iop_enable_cp6();
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return 0;
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}
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/* permit kernel space cp6 access
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* deny user space cp6 access
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*/
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static struct undef_hook cp6_hook = {
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.instr_mask = 0x0f000ff0,
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.instr_val = 0x0e000610,
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.cpsr_mask = MODE_MASK,
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.cpsr_val = SVC_MODE,
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.fn = cp6_trap,
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};
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void __init iop_init_cp6_handler(void)
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{
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register_undef_hook(&cp6_hook);
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}
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