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Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
57 lines
1.3 KiB
YAML
57 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/microchip,corei2c.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip MPFS I2C Controller Device Tree Bindings
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maintainers:
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- Daire McNamara <daire.mcnamara@microchip.com>
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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properties:
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compatible:
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oneOf:
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- items:
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- const: microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs
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- const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
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- const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-frequency:
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description: |
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Desired I2C bus clock frequency in Hz. As only Standard and Fast
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modes are supported, possible values are 100000 and 400000.
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enum: [100000, 400000]
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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i2c@2010a000 {
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compatible = "microchip,mpfs-i2c", "microchip,corei2c-rtl-v7";
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reg = <0x2010a000 0x1000>;
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clocks = <&clkcfg 15>;
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interrupt-parent = <&plic>;
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interrupts = <58>;
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clock-frequency = <100000>;
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};
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...
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