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Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
78 lines
1.7 KiB
YAML
78 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/remoteproc/ingenic,vpu.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Ingenic Video Processing Unit bindings
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description:
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Inside the Video Processing Unit (VPU) of the recent JZ47xx SoCs from
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Ingenic is a second Xburst MIPS CPU very similar to the main core.
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This document describes the devicetree bindings for this auxiliary
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processor.
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maintainers:
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- Paul Cercueil <paul@crapouillou.net>
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properties:
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compatible:
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const: ingenic,jz4770-vpu-rproc
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reg:
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items:
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- description: aux registers
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- description: tcsm0 registers
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- description: tcsm1 registers
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- description: sram registers
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reg-names:
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items:
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- const: aux
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- const: tcsm0
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- const: tcsm1
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- const: sram
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clocks:
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items:
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- description: aux clock
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- description: vpu clock
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clock-names:
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items:
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- const: aux
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- const: vpu
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- clock-names
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
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vpu: video-decoder@132a0000 {
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compatible = "ingenic,jz4770-vpu-rproc";
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reg = <0x132a0000 0x20>, /* AUX */
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<0x132b0000 0x4000>, /* TCSM0 */
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<0x132c0000 0xc000>, /* TCSM1 */
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<0x132f0000 0x7000>; /* SRAM */
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reg-names = "aux", "tcsm0", "tcsm1", "sram";
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clocks = <&cgu JZ4770_CLK_AUX>, <&cgu JZ4770_CLK_VPU>;
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clock-names = "aux", "vpu";
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interrupt-parent = <&cpuintc>;
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interrupts = <3>;
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};
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