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Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
72 lines
1.5 KiB
YAML
72 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX8MQ VPU blk-ctrl
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maintainers:
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- Lucas Stach <l.stach@pengutronix.de>
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description:
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The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
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the NoC and ensuring proper power sequencing of the VPU peripherals
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located in the VPU domain of the SoC.
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properties:
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compatible:
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items:
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- const: fsl,imx8mq-vpu-blk-ctrl
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reg:
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maxItems: 1
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'#power-domain-cells':
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const: 1
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power-domains:
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minItems: 3
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maxItems: 3
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power-domain-names:
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items:
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- const: bus
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- const: g1
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- const: g2
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clocks:
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minItems: 2
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maxItems: 2
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clock-names:
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items:
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- const: g1
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- const: g2
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required:
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- compatible
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- reg
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- power-domains
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- power-domain-names
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8mq-clock.h>
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#include <dt-bindings/power/imx8mq-power.h>
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vpu_blk_ctrl: blk-ctrl@38320000 {
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compatible = "fsl,imx8mq-vpu-blk-ctrl";
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reg = <0x38320000 0x100>;
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power-domains = <&pgc_vpu>, <&pgc_vpu>, <&pgc_vpu>;
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power-domain-names = "bus", "g1", "g2";
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clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
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<&clk IMX8MQ_CLK_VPU_G2_ROOT>;
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clock-names = "g1", "g2";
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#power-domain-cells = <1>;
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};
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