mirror of
https://github.com/Qortal/Brooklyn.git
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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
47 lines
1.1 KiB
C
47 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_LSE_H
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#define __ASM_LSE_H
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#include <asm/atomic_ll_sc.h>
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#ifdef CONFIG_ARM64_LSE_ATOMICS
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#define __LSE_PREAMBLE ".arch_extension lse\n"
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#include <linux/compiler_types.h>
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#include <linux/export.h>
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#include <linux/jump_label.h>
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#include <linux/stringify.h>
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#include <asm/alternative.h>
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#include <asm/atomic_lse.h>
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#include <asm/cpucaps.h>
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extern struct static_key_false cpu_hwcap_keys[ARM64_NCAPS];
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static __always_inline bool system_uses_lse_atomics(void)
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{
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return static_branch_likely(&cpu_hwcap_keys[ARM64_HAS_LSE_ATOMICS]);
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}
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#define __lse_ll_sc_body(op, ...) \
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({ \
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system_uses_lse_atomics() ? \
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__lse_##op(__VA_ARGS__) : \
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__ll_sc_##op(__VA_ARGS__); \
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})
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/* In-line patching at runtime */
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#define ARM64_LSE_ATOMIC_INSN(llsc, lse) \
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ALTERNATIVE(llsc, __LSE_PREAMBLE lse, ARM64_HAS_LSE_ATOMICS)
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#else /* CONFIG_ARM64_LSE_ATOMICS */
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static inline bool system_uses_lse_atomics(void) { return false; }
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#define __lse_ll_sc_body(op, ...) __ll_sc_##op(__VA_ARGS__)
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#define ARM64_LSE_ATOMIC_INSN(llsc, lse) llsc
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#endif /* CONFIG_ARM64_LSE_ATOMICS */
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#endif /* __ASM_LSE_H */
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