mirror of
https://github.com/Qortal/Brooklyn.git
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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
143 lines
2.8 KiB
C
143 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2017-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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#ifndef GOYA_PACKETS_H
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#define GOYA_PACKETS_H
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#include <linux/types.h>
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#define PACKET_HEADER_PACKET_ID_SHIFT 56
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#define PACKET_HEADER_PACKET_ID_MASK 0x1F00000000000000ull
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enum packet_id {
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PACKET_WREG_32 = 0x1,
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PACKET_WREG_BULK = 0x2,
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PACKET_MSG_LONG = 0x3,
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PACKET_MSG_SHORT = 0x4,
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PACKET_CP_DMA = 0x5,
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PACKET_MSG_PROT = 0x7,
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PACKET_FENCE = 0x8,
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PACKET_LIN_DMA = 0x9,
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PACKET_NOP = 0xA,
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PACKET_STOP = 0xB,
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MAX_PACKET_ID = (PACKET_HEADER_PACKET_ID_MASK >>
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PACKET_HEADER_PACKET_ID_SHIFT) + 1
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};
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enum goya_dma_direction {
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DMA_HOST_TO_DRAM,
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DMA_HOST_TO_SRAM,
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DMA_DRAM_TO_SRAM,
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DMA_SRAM_TO_DRAM,
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DMA_SRAM_TO_HOST,
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DMA_DRAM_TO_HOST,
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DMA_DRAM_TO_DRAM,
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DMA_SRAM_TO_SRAM,
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DMA_ENUM_MAX
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};
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#define GOYA_PKT_CTL_OPCODE_SHIFT 24
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#define GOYA_PKT_CTL_OPCODE_MASK 0x1F000000
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#define GOYA_PKT_CTL_EB_SHIFT 29
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#define GOYA_PKT_CTL_EB_MASK 0x20000000
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#define GOYA_PKT_CTL_RB_SHIFT 30
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#define GOYA_PKT_CTL_RB_MASK 0x40000000
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#define GOYA_PKT_CTL_MB_SHIFT 31
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#define GOYA_PKT_CTL_MB_MASK 0x80000000
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/* All packets have, at least, an 8-byte header, which contains
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* the packet type. The kernel driver uses the packet header for packet
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* validation and to perform any necessary required preparation before
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* sending them off to the hardware.
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*/
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struct goya_packet {
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__le64 header;
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/* The rest of the packet data follows. Use the corresponding
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* packet_XXX struct to deference the data, based on packet type
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*/
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u8 contents[];
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};
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struct packet_nop {
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__le32 reserved;
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__le32 ctl;
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};
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struct packet_stop {
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__le32 reserved;
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__le32 ctl;
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};
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#define GOYA_PKT_WREG32_CTL_REG_OFFSET_SHIFT 0
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#define GOYA_PKT_WREG32_CTL_REG_OFFSET_MASK 0x0000FFFF
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struct packet_wreg32 {
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__le32 value;
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__le32 ctl;
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};
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struct packet_wreg_bulk {
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__le32 size64;
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__le32 ctl;
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__le64 values[]; /* data starts here */
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};
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struct packet_msg_long {
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__le32 value;
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__le32 ctl;
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__le64 addr;
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};
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struct packet_msg_short {
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__le32 value;
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__le32 ctl;
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};
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struct packet_msg_prot {
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__le32 value;
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__le32 ctl;
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__le64 addr;
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};
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struct packet_fence {
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__le32 cfg;
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__le32 ctl;
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};
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#define GOYA_PKT_LIN_DMA_CTL_WO_SHIFT 0
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#define GOYA_PKT_LIN_DMA_CTL_WO_MASK 0x00000001
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#define GOYA_PKT_LIN_DMA_CTL_RDCOMP_SHIFT 1
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#define GOYA_PKT_LIN_DMA_CTL_RDCOMP_MASK 0x00000002
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#define GOYA_PKT_LIN_DMA_CTL_WRCOMP_SHIFT 2
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#define GOYA_PKT_LIN_DMA_CTL_WRCOMP_MASK 0x00000004
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#define GOYA_PKT_LIN_DMA_CTL_MEMSET_SHIFT 6
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#define GOYA_PKT_LIN_DMA_CTL_MEMSET_MASK 0x00000040
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#define GOYA_PKT_LIN_DMA_CTL_DMA_DIR_SHIFT 20
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#define GOYA_PKT_LIN_DMA_CTL_DMA_DIR_MASK 0x00700000
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struct packet_lin_dma {
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__le32 tsize;
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__le32 ctl;
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__le64 src_addr;
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__le64 dst_addr;
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};
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struct packet_cp_dma {
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__le32 tsize;
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__le32 ctl;
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__le64 src_addr;
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};
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#endif /* GOYA_PACKETS_H */
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