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mirror of https://github.com/Qortal/Brooklyn.git synced 2025-01-31 23:32:17 +00:00
Brooklyn/arch/powerpc/sysdev
Scare Crowe 7d3018da4c First of all. T3Q is a fucking slut whore. Next, Core 2.0 optimizations
* NVME, SATA NAND Security added
* Qortal Core exception fetcher is now redone.
* Update DT overlays for firmware
* Fix for bvb clockj settings
* Fix for no audio for sissy desktop porn watchers -_- ( thanks crowetic for watching gay porn and reporting me that bug asshat )
* Normalize the fetch() stream while doing a peer to peer handshake for nodes
* Fix for RNG token editing error while performing a SHA256 encryption
* Now under voltage errors will blink red led constantly for 5 minutes then go solid.
* Improve kernel thread scaling for Qortal 2.0 core
* HDMI circuit is now enabled at power up instead.
* Added KMS
* Added line replication instead of interpolation for VC4 GPU resulting in slightly better frame rates
* Fix for long and doubles
* Backplane clock is now set at standard rate
* Capped HVEC clocks
* Add support for Creative Cinema webcam for donkers who like sharing dick pics.  *looks at crowetic*
* More scanline XGA modes for people who have weird ass monitors of all sorts.
* TX/RX flow control support is now 100% stable. No lags over 1Gbps ethernet. ( Hello Qortal 3.0 )
* Using flush cache instead of fetch for QC 2.0 resulting in performance gains
* VC4 clock is now enforced for desktop oriented images.
* Ondemand governor now waits for 2 seconds instead of 0.5ms to scale down to the lowest safest clock freq preventing lags to the core.
* Timeout of OC set at 35ms from 90ms resulting in way better clocks and sync for Qortal 2.0 core
2021-10-20 18:55:35 +05:00
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ge initial commit 2021-05-27 00:09:36 +05:00
xics T3Q is a slut 2021-10-02 21:09:28 +05:00
xive First of all. T3Q is a fucking slut whore. Next, Core 2.0 optimizations 2021-10-20 18:55:35 +05:00
6xx-suspend.S initial commit 2021-05-27 00:09:36 +05:00
cpm2_pic.c initial commit 2021-05-27 00:09:36 +05:00
cpm2_pic.h initial commit 2021-05-27 00:09:36 +05:00
cpm2.c initial commit 2021-05-27 00:09:36 +05:00
cpm_common.c initial commit 2021-05-27 00:09:36 +05:00
cpm_gpio.c initial commit 2021-05-27 00:09:36 +05:00
dart_iommu.c T3Q is a slut 2021-10-02 21:09:28 +05:00
dart.h initial commit 2021-05-27 00:09:36 +05:00
dcr-low.S initial commit 2021-05-27 00:09:36 +05:00
dcr.c initial commit 2021-05-27 00:09:36 +05:00
ehv_pic.c T3Q is a slut 2021-10-02 21:09:28 +05:00
fsl_85xx_cache_ctlr.h initial commit 2021-05-27 00:09:36 +05:00
fsl_85xx_cache_sram.c initial commit 2021-05-27 00:09:36 +05:00
fsl_85xx_l2ctlr.c initial commit 2021-05-27 00:09:36 +05:00
fsl_gtm.c initial commit 2021-05-27 00:09:36 +05:00
fsl_lbc.c initial commit 2021-05-27 00:09:36 +05:00
fsl_mpic_err.c T3Q is a slut 2021-10-02 21:09:28 +05:00
fsl_mpic_timer_wakeup.c initial commit 2021-05-27 00:09:36 +05:00
fsl_msi.c T3Q is a slut 2021-10-02 21:09:28 +05:00
fsl_msi.h initial commit 2021-05-27 00:09:36 +05:00
fsl_pci.c T3Q is a slut 2021-10-02 21:09:28 +05:00
fsl_pci.h initial commit 2021-05-27 00:09:36 +05:00
fsl_pmc.c initial commit 2021-05-27 00:09:36 +05:00
fsl_rcpm.c initial commit 2021-05-27 00:09:36 +05:00
fsl_rio.c T3Q is a slut 2021-10-02 21:09:28 +05:00
fsl_rio.h initial commit 2021-05-27 00:09:36 +05:00
fsl_rmu.c initial commit 2021-05-27 00:09:36 +05:00
fsl_soc.c initial commit 2021-05-27 00:09:36 +05:00
fsl_soc.h initial commit 2021-05-27 00:09:36 +05:00
grackle.c initial commit 2021-05-27 00:09:36 +05:00
i8259.c T3Q is a slut 2021-10-02 21:09:28 +05:00
indirect_pci.c initial commit 2021-05-27 00:09:36 +05:00
ipic.c initial commit 2021-05-27 00:09:36 +05:00
ipic.h initial commit 2021-05-27 00:09:36 +05:00
Kconfig initial commit 2021-05-27 00:09:36 +05:00
Makefile initial commit 2021-05-27 00:09:36 +05:00
mmio_nvram.c initial commit 2021-05-27 00:09:36 +05:00
mpc5xxx_clocks.c initial commit 2021-05-27 00:09:36 +05:00
mpic_msgr.c initial commit 2021-05-27 00:09:36 +05:00
mpic_msi.c initial commit 2021-05-27 00:09:36 +05:00
mpic_timer.c initial commit 2021-05-27 00:09:36 +05:00
mpic_u3msi.c initial commit 2021-05-27 00:09:36 +05:00
mpic.c T3Q is a slut 2021-10-02 21:09:28 +05:00
mpic.h initial commit 2021-05-27 00:09:36 +05:00
msi_bitmap.c initial commit 2021-05-27 00:09:36 +05:00
of_rtc.c initial commit 2021-05-27 00:09:36 +05:00
pmi.c initial commit 2021-05-27 00:09:36 +05:00
rtc_cmos_setup.c initial commit 2021-05-27 00:09:36 +05:00
tsi108_dev.c T3Q is a slut 2021-10-02 21:09:28 +05:00
tsi108_pci.c T3Q is a slut 2021-10-02 21:09:28 +05:00
udbg_memcons.c initial commit 2021-05-27 00:09:36 +05:00