mirror of
https://github.com/Qortal/Brooklyn.git
synced 2025-02-07 23:03:06 +00:00
7d3018da4c
* NVME, SATA NAND Security added * Qortal Core exception fetcher is now redone. * Update DT overlays for firmware * Fix for bvb clockj settings * Fix for no audio for sissy desktop porn watchers -_- ( thanks crowetic for watching gay porn and reporting me that bug asshat ) * Normalize the fetch() stream while doing a peer to peer handshake for nodes * Fix for RNG token editing error while performing a SHA256 encryption * Now under voltage errors will blink red led constantly for 5 minutes then go solid. * Improve kernel thread scaling for Qortal 2.0 core * HDMI circuit is now enabled at power up instead. * Added KMS * Added line replication instead of interpolation for VC4 GPU resulting in slightly better frame rates * Fix for long and doubles * Backplane clock is now set at standard rate * Capped HVEC clocks * Add support for Creative Cinema webcam for donkers who like sharing dick pics. *looks at crowetic* * More scanline XGA modes for people who have weird ass monitors of all sorts. * TX/RX flow control support is now 100% stable. No lags over 1Gbps ethernet. ( Hello Qortal 3.0 ) * Using flush cache instead of fetch for QC 2.0 resulting in performance gains * VC4 clock is now enforced for desktop oriented images. * Ondemand governor now waits for 2 seconds instead of 0.5ms to scale down to the lowest safest clock freq preventing lags to the core. * Timeout of OC set at 35ms from 90ms resulting in way better clocks and sync for Qortal 2.0 core
210 lines
4.6 KiB
C
210 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#include "msm_gpu.h"
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#include "msm_gpu_trace.h"
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#include <linux/devfreq.h>
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#include <linux/devfreq_cooling.h>
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/*
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* Power Management:
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*/
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static int msm_devfreq_target(struct device *dev, unsigned long *freq,
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u32 flags)
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{
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struct msm_gpu *gpu = dev_to_gpu(dev);
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struct dev_pm_opp *opp;
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opp = devfreq_recommended_opp(dev, freq, flags);
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/*
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* If the GPU is idle, devfreq is not aware, so just ignore
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* it's requests
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*/
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if (gpu->devfreq.idle_freq) {
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gpu->devfreq.idle_freq = *freq;
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return 0;
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}
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if (IS_ERR(opp))
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return PTR_ERR(opp);
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trace_msm_gpu_freq_change(dev_pm_opp_get_freq(opp));
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if (gpu->funcs->gpu_set_freq)
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gpu->funcs->gpu_set_freq(gpu, opp);
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else
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clk_set_rate(gpu->core_clk, *freq);
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dev_pm_opp_put(opp);
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return 0;
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}
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static unsigned long get_freq(struct msm_gpu *gpu)
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{
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if (gpu->devfreq.idle_freq)
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return gpu->devfreq.idle_freq;
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if (gpu->funcs->gpu_get_freq)
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return gpu->funcs->gpu_get_freq(gpu);
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return clk_get_rate(gpu->core_clk);
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}
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static int msm_devfreq_get_dev_status(struct device *dev,
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struct devfreq_dev_status *status)
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{
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struct msm_gpu *gpu = dev_to_gpu(dev);
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ktime_t time;
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status->current_frequency = get_freq(gpu);
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status->busy_time = gpu->funcs->gpu_busy(gpu);
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time = ktime_get();
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status->total_time = ktime_us_delta(time, gpu->devfreq.time);
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gpu->devfreq.time = time;
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return 0;
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}
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static int msm_devfreq_get_cur_freq(struct device *dev, unsigned long *freq)
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{
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*freq = get_freq(dev_to_gpu(dev));
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return 0;
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}
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static struct devfreq_dev_profile msm_devfreq_profile = {
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.timer = DEVFREQ_TIMER_DELAYED,
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.polling_ms = 50,
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.target = msm_devfreq_target,
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.get_dev_status = msm_devfreq_get_dev_status,
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.get_cur_freq = msm_devfreq_get_cur_freq,
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};
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void msm_devfreq_init(struct msm_gpu *gpu)
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{
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/* We need target support to do devfreq */
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if (!gpu->funcs->gpu_busy)
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return;
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msm_devfreq_profile.initial_freq = gpu->fast_rate;
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/*
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* Don't set the freq_table or max_state and let devfreq build the table
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* from OPP
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* After a deferred probe, these may have be left to non-zero values,
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* so set them back to zero before creating the devfreq device
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*/
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msm_devfreq_profile.freq_table = NULL;
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msm_devfreq_profile.max_state = 0;
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gpu->devfreq.devfreq = devm_devfreq_add_device(&gpu->pdev->dev,
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&msm_devfreq_profile, DEVFREQ_GOV_SIMPLE_ONDEMAND,
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NULL);
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if (IS_ERR(gpu->devfreq.devfreq)) {
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DRM_DEV_ERROR(&gpu->pdev->dev, "Couldn't initialize GPU devfreq\n");
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gpu->devfreq.devfreq = NULL;
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return;
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}
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devfreq_suspend_device(gpu->devfreq.devfreq);
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gpu->cooling = of_devfreq_cooling_register(gpu->pdev->dev.of_node,
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gpu->devfreq.devfreq);
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if (IS_ERR(gpu->cooling)) {
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DRM_DEV_ERROR(&gpu->pdev->dev,
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"Couldn't register GPU cooling device\n");
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gpu->cooling = NULL;
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}
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}
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void msm_devfreq_cleanup(struct msm_gpu *gpu)
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{
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devfreq_cooling_unregister(gpu->cooling);
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}
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void msm_devfreq_resume(struct msm_gpu *gpu)
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{
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gpu->devfreq.busy_cycles = 0;
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gpu->devfreq.time = ktime_get();
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devfreq_resume_device(gpu->devfreq.devfreq);
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}
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void msm_devfreq_suspend(struct msm_gpu *gpu)
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{
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devfreq_suspend_device(gpu->devfreq.devfreq);
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}
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void msm_devfreq_active(struct msm_gpu *gpu)
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{
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struct msm_gpu_devfreq *df = &gpu->devfreq;
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struct devfreq_dev_status status;
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unsigned int idle_time;
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unsigned long target_freq = df->idle_freq;
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if (!df->devfreq)
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return;
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/*
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* Hold devfreq lock to synchronize with get_dev_status()/
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* target() callbacks
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*/
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mutex_lock(&df->devfreq->lock);
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idle_time = ktime_to_ms(ktime_sub(ktime_get(), df->idle_time));
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/*
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* If we've been idle for a significant fraction of a polling
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* interval, then we won't meet the threshold of busyness for
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* the governor to ramp up the freq.. so give some boost
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*/
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if (idle_time > msm_devfreq_profile.polling_ms/2) {
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target_freq *= 2;
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}
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df->idle_freq = 0;
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msm_devfreq_target(&gpu->pdev->dev, &target_freq, 0);
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/*
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* Reset the polling interval so we aren't inconsistent
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* about freq vs busy/total cycles
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*/
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msm_devfreq_get_dev_status(&gpu->pdev->dev, &status);
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mutex_unlock(&df->devfreq->lock);
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}
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void msm_devfreq_idle(struct msm_gpu *gpu)
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{
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struct msm_gpu_devfreq *df = &gpu->devfreq;
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unsigned long idle_freq, target_freq = 0;
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if (!df->devfreq)
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return;
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/*
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* Hold devfreq lock to synchronize with get_dev_status()/
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* target() callbacks
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*/
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mutex_lock(&df->devfreq->lock);
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idle_freq = get_freq(gpu);
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msm_devfreq_target(&gpu->pdev->dev, &target_freq, 0);
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df->idle_time = ktime_get();
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df->idle_freq = idle_freq;
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mutex_unlock(&df->devfreq->lock);
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}
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