mirror of
https://github.com/Qortal/Brooklyn.git
synced 2025-01-31 07:12:18 +00:00
a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
48 lines
1.3 KiB
YAML
48 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
# Copyright 2021 Arm Ltd.
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/perf/arm,dsu-pmu.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: ARM DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU)
|
|
|
|
maintainers:
|
|
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
|
- Robin Murphy <robin.murphy@arm.com>
|
|
|
|
description:
|
|
ARM DynamIQ Shared Unit (DSU) integrates one or more CPU cores with a shared
|
|
L3 memory system, control logic and external interfaces to form a multicore
|
|
cluster. The PMU enables gathering various statistics on the operation of the
|
|
DSU. The PMU provides independent 32-bit counters that can count any of the
|
|
supported events, along with a 64-bit cycle counter. The PMU is accessed via
|
|
CPU system registers and has no MMIO component.
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- const: arm,dsu-pmu
|
|
- items:
|
|
- const: arm,dsu-110-pmu
|
|
- const: arm,dsu-pmu
|
|
|
|
interrupts:
|
|
items:
|
|
- description: nCLUSTERPMUIRQ interrupt
|
|
|
|
cpus:
|
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
|
minItems: 1
|
|
maxItems: 12
|
|
items:
|
|
maxItems: 1
|
|
description: List of phandles for the CPUs connected to this DSU instance.
|
|
|
|
required:
|
|
- compatible
|
|
- interrupts
|
|
- cpus
|
|
|
|
additionalProperties: false
|