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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
96 lines
2.7 KiB
YAML
96 lines
2.7 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/toshiba,visconti-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Toshiba Visconti TMPV770x pin mux/config controller
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maintainers:
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- Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
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description:
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Toshiba's Visconti ARM SoC a pin mux/config controller.
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properties:
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compatible:
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enum:
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- toshiba,tmpv7708-pinctrl
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reg:
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maxItems: 1
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allOf:
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- $ref: "pinctrl.yaml#"
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required:
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- compatible
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- reg
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patternProperties:
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'-pins$':
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type: object
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description: |
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A pinctrl node should contain at least one subnodes representing the
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pinctrl groups available on the machine. Each subnode will list the
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pins it needs, and how they should be configured, with regard to muxer
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configuration, pullups, drive strength.
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$ref: "pinmux-node.yaml"
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properties:
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function:
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description:
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Function to mux.
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$ref: "/schemas/types.yaml#/definitions/string"
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enum: [i2c0, i2c1, i2c2, i2c3, i2c4, i2c5, i2c6, i2c7, i2c8,
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spi0, spi1, spi2, spi3, spi4, spi5, spi6,
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uart0, uart1, uart2, uart3, pwm, pcmif_out, pcmif_in]
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groups:
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description:
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Name of the pin group to use for the functions.
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$ref: "/schemas/types.yaml#/definitions/string"
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enum: [i2c0_grp, i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp,
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i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp,
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spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp,
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spi1_grp, spi2_grp, spi3_grp, spi4_grp, spi5_grp, spi6_grp,
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uart0_grp, uart1_grp, uart2_grp, uart3_grp,
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pwm0_gpio4_grp, pwm0_gpio8_grp, pwm0_gpio12_grp,
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pwm0_gpio16_grp, pwm1_gpio5_grp, pwm1_gpio9_grp,
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pwm1_gpio13_grp, pwm1_gpio17_grp, pwm2_gpio6_grp,
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pwm2_gpio10_grp, pwm2_gpio14_grp, pwm2_gpio18_grp,
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pwm3_gpio7_grp, pwm3_gpio11_grp, pwm3_gpio15_grp,
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pwm3_gpio19_grp, pcmif_out_grp, pcmif_in_grp]
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drive-strength:
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enum: [2, 4, 6, 8, 16, 24, 32]
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default: 2
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description:
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Selects the drive strength for the specified pins, in mA.
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bias-pull-up: true
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bias-pull-down: true
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bias-disable: true
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additionalProperties: false
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examples:
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# Pinmux controller node
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pmux: pinmux@24190000 {
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compatible = "toshiba,tmpv7708-pinctrl";
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reg = <0 0x24190000 0 0x10000>;
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spi0_pins: spi0-pins {
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function = "spi0";
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groups = "spi0_grp";
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};
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};
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};
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