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Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
32 lines
756 B
C
32 lines
756 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Intel PCH/PCU SPI flash driver.
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*
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* Copyright (C) 2016, Intel Corporation
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* Author: Mika Westerberg <mika.westerberg@linux.intel.com>
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*/
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#ifndef SPI_INTEL_PDATA_H
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#define SPI_INTEL_PDATA_H
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enum intel_spi_type {
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INTEL_SPI_BYT = 1,
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INTEL_SPI_LPT,
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INTEL_SPI_BXT,
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INTEL_SPI_CNL,
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};
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/**
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* struct intel_spi_boardinfo - Board specific data for Intel SPI driver
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* @type: Type which this controller is compatible with
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* @set_writeable: Try to make the chip writeable (optional)
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* @data: Data to be passed to @set_writeable can be %NULL
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*/
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struct intel_spi_boardinfo {
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enum intel_spi_type type;
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bool (*set_writeable)(void __iomem *base, void *data);
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void *data;
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};
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#endif /* SPI_INTEL_PDATA_H */
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