mirror of
https://github.com/Qortal/Brooklyn.git
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84ba5b15ac
* Enhance GPIO addon for Noctua Fans for the Qortector upcoming case. This will put PWM signal to real-time. * Fixed RDP not letting a user login if not logged out on Cinnamon release (reported by Crowetic) * Update i2c sensor db * Fixed DRM broadcast over HDMI 2+ * Ease up DHCP security only to prevent Brooklyn blocking routers. * Add possibility to add extra memory for Cinnamon Desktop Release * Fix error message of Software Render mode on Cinnamon Desktop * Add proper offset for HD screens for pixel array *Fixed HDMI jitter for videocore4 GPU * Enable all radios (including Bluetooth)
733 lines
22 KiB
Plaintext
733 lines
22 KiB
Plaintext
// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
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// dtparams:
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// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
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// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
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// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
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// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
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//
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// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
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// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
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//
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// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
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// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
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//
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// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
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// dtoverlay=spi1-2cs
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// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
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/dts-v1/;
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/plugin/;
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/ {
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compatible = "brcm,bcm2835";
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// disable spi-dev on spi0.0
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fragment@0 {
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target = <&spidev0>;
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__dormant__ {
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status = "disabled";
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};
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};
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// disable spi-dev on spi0.1
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fragment@1 {
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target = <&spidev1>;
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__dormant__ {
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status = "disabled";
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};
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};
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// disable spi-dev on spi1.0
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fragment@2 {
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target-path = "spi1/spidev@0";
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__dormant__ {
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status = "disabled";
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};
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};
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// disable spi-dev on spi1.1
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fragment@3 {
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target-path = "spi1/spidev@1";
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__dormant__ {
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status = "disabled";
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};
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};
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// disable spi-dev on spi1.2
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fragment@4 {
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target-path = "spi1/spidev@2";
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__dormant__ {
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status = "disabled";
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};
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};
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// disable spi-dev on spi2.0
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fragment@5 {
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target-path = "spi2/spidev@0";
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__dormant__ {
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status = "disabled";
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};
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};
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// disable spi-dev on spi2.1
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fragment@6 {
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target-path = "spi2/spidev@1";
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__dormant__ {
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status = "disabled";
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};
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};
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// disable spi-dev on spi2.2
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fragment@7 {
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target-path = "spi2/spidev@2";
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__dormant__ {
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status = "disabled";
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};
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};
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// enable one or more mcp23s08s on spi0.0
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fragment@8 {
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target = <&spi0>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s08_00: mcp23s08@0 {
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compatible = "microchip,mcp23s08";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
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reg = <0>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s08s on spi0.1
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fragment@9 {
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target = <&spi0>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s08_01: mcp23s08@1 {
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compatible = "microchip,mcp23s08";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
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reg = <1>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s08s on spi1.0
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fragment@10 {
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target = <&spi1>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s08_10: mcp23s08@0 {
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compatible = "microchip,mcp23s08";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
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reg = <0>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s08s on spi1.1
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fragment@11 {
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target = <&spi1>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s08_11: mcp23s08@1 {
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compatible = "microchip,mcp23s08";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
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reg = <1>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s08s on spi1.2
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fragment@12 {
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target = <&spi1>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s08_12: mcp23s08@2 {
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compatible = "microchip,mcp23s08";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
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reg = <2>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s08s on spi2.0
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fragment@13 {
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target = <&spi2>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s08_20: mcp23s08@0 {
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compatible = "microchip,mcp23s08";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
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reg = <0>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s08s on spi2.1
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fragment@14 {
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target = <&spi2>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s08_21: mcp23s08@1 {
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compatible = "microchip,mcp23s08";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
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reg = <1>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s08s on spi2.2
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fragment@15 {
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target = <&spi2>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s08_22: mcp23s08@2 {
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compatible = "microchip,mcp23s08";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
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reg = <2>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s17s on spi0.0
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fragment@16 {
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target = <&spi0>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s17_00: mcp23s17@0 {
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compatible = "microchip,mcp23s17";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
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reg = <0>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s17s on spi0.1
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fragment@17 {
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target = <&spi0>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s17_01: mcp23s17@1 {
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compatible = "microchip,mcp23s17";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
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reg = <1>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s17s on spi1.0
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fragment@18 {
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target = <&spi1>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s17_10: mcp23s17@0 {
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compatible = "microchip,mcp23s17";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
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reg = <0>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s17s on spi1.1
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fragment@19 {
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target = <&spi1>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s17_11: mcp23s17@1 {
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compatible = "microchip,mcp23s17";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
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reg = <1>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s17s on spi1.2
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fragment@20 {
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target = <&spi1>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s17_12: mcp23s17@2 {
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compatible = "microchip,mcp23s17";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
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reg = <2>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s17s on spi2.0
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fragment@21 {
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target = <&spi2>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s17_20: mcp23s17@0 {
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compatible = "microchip,mcp23s17";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
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reg = <0>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s17s on spi2.1
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fragment@22 {
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target = <&spi2>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s17_21: mcp23s17@1 {
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compatible = "microchip,mcp23s17";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
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reg = <1>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
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};
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};
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};
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// enable one or more mcp23s17s on spi2.2
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fragment@23 {
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target = <&spi2>;
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__dormant__ {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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mcp23s17_22: mcp23s17@2 {
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compatible = "microchip,mcp23s17";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
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reg = <2>;
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spi-max-frequency = <500000>;
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status = "okay";
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#interrupt-cells=<2>;
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interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
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};
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};
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};
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// Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
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fragment@24 {
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target = <&gpio>;
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__dormant__ {
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spi0_0_int_pins: spi0_0_int_pins {
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brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
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brcm,function = <0>;
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brcm,pull = <0>;
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};
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};
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};
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// Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
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fragment@25 {
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target = <&gpio>;
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__dormant__ {
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spi0_1_int_pins: spi0_1_int_pins {
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brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
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brcm,function = <0>;
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brcm,pull = <0>;
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};
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};
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};
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// Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
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fragment@26 {
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target = <&gpio>;
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__dormant__ {
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spi1_0_int_pins: spi1_0_int_pins {
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brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
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brcm,function = <0>;
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brcm,pull = <0>;
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};
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};
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};
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// Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
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fragment@27 {
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target = <&gpio>;
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__dormant__ {
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spi1_1_int_pins: spi1_1_int_pins {
|
|
brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
|
|
brcm,function = <0>;
|
|
brcm,pull = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
// Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
|
|
fragment@28 {
|
|
target = <&gpio>;
|
|
__dormant__ {
|
|
spi1_2_int_pins: spi1_2_int_pins {
|
|
brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
|
|
brcm,function = <0>;
|
|
brcm,pull = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
// Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
|
|
fragment@29 {
|
|
target = <&gpio>;
|
|
__dormant__ {
|
|
spi2_0_int_pins: spi2_0_int_pins {
|
|
brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
|
|
brcm,function = <0>;
|
|
brcm,pull = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
// Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
|
|
fragment@30 {
|
|
target = <&gpio>;
|
|
__dormant__ {
|
|
spi2_1_int_pins: spi2_1_int_pins {
|
|
brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
|
|
brcm,function = <0>;
|
|
brcm,pull = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
// Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
|
|
fragment@31 {
|
|
target = <&gpio>;
|
|
__dormant__ {
|
|
spi2_2_int_pins: spi2_2_int_pins {
|
|
brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
|
|
brcm,function = <0>;
|
|
brcm,pull = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s08 on spi0.0.
|
|
// Use default active low interrupt signalling.
|
|
fragment@32 {
|
|
target = <&mcp23s08_00>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s08 on spi0.1.
|
|
// Use default active low interrupt signalling.
|
|
fragment@33 {
|
|
target = <&mcp23s08_01>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s08 on spi1.0.
|
|
// Use default active low interrupt signalling.
|
|
fragment@34 {
|
|
target = <&mcp23s08_10>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s08 on spi1.1.
|
|
// Use default active low interrupt signalling.
|
|
fragment@35 {
|
|
target = <&mcp23s08_11>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s08 on spi1.2.
|
|
// Use default active low interrupt signalling.
|
|
fragment@36 {
|
|
target = <&mcp23s08_12>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s08 on spi2.0.
|
|
// Use default active low interrupt signalling.
|
|
fragment@37 {
|
|
target = <&mcp23s08_20>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s08 on spi2.1.
|
|
// Use default active low interrupt signalling.
|
|
fragment@38 {
|
|
target = <&mcp23s08_21>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s08 on spi2.2.
|
|
// Use default active low interrupt signalling.
|
|
fragment@39 {
|
|
target = <&mcp23s08_22>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s17 on spi0.0.
|
|
// Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
// Use default active low interrupt signalling.
|
|
fragment@40 {
|
|
target = <&mcp23s17_00>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
microchip,irq-mirror;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s17 on spi0.1.
|
|
// Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
// Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
fragment@41 {
|
|
target = <&mcp23s17_01>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
microchip,irq-mirror;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s17 on spi1.0.
|
|
// Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
// Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
fragment@42 {
|
|
target = <&mcp23s17_10>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
microchip,irq-mirror;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s17 on spi1.1.
|
|
// Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
// Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
fragment@43 {
|
|
target = <&mcp23s17_11>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
microchip,irq-mirror;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s17 on spi1.2.
|
|
// Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
// Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
fragment@44 {
|
|
target = <&mcp23s17_12>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
microchip,irq-mirror;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s17 on spi2.0.
|
|
// Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
// Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
fragment@45 {
|
|
target = <&mcp23s17_20>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
microchip,irq-mirror;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s17 on spi2.1.
|
|
// Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
// Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
fragment@46 {
|
|
target = <&mcp23s17_21>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
microchip,irq-mirror;
|
|
};
|
|
};
|
|
|
|
// Enable interrupts for a mcp23s17 on spi2.2.
|
|
// Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
// Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
fragment@47 {
|
|
target = <&mcp23s17_22>;
|
|
__dormant__ {
|
|
interrupt-parent = <&gpio>;
|
|
interrupt-controller;
|
|
microchip,irq-mirror;
|
|
};
|
|
};
|
|
|
|
__overrides__ {
|
|
s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
|
|
s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
|
|
s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
|
|
s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
|
|
s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
|
|
s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
|
|
s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
|
|
s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
|
|
s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
|
|
s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
|
|
s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
|
|
s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
|
|
s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
|
|
s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
|
|
s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
|
|
s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
|
|
s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
|
|
s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
|
|
s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
|
|
s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
|
|
s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
|
|
s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
|
|
s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
|
|
s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
|
|
s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
|
|
s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
|
|
s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
|
|
s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
|
|
s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
|
|
s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
|
|
s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
|
|
s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
|
|
};
|
|
};
|
|
|