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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
62 lines
1.1 KiB
Plaintext
62 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2022 Gateworks Corporation
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*
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* GW72xx RS485 HD:
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* - GPIO1_0 rs485_term selects on-chip termination
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* - GPIO4_0 rs485_en needs to be driven high (active)
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* - GPIO4_2 rs485_hd needs to be driven high (active)
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* - UART4_TX is DE for RS485 transmitter
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* - RS485_EN needs to be pulled high
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* - RS485_HALF needs to be pulled high
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include "imx8mm-pinfunc.h"
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/dts-v1/;
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/plugin/;
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&{/} {
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compatible = "gw,imx8mm-gw72xx-0x";
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};
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&gpio4 {
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rs485_en {
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gpio-hog;
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gpios = <0 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "rs485_en";
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};
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rs485_hd {
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gpio-hog;
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gpios = <2 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "rs485_hd";
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};
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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rts-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
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linux,rs485-enabled-at-boot-time;
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status = "okay";
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};
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&uart4 {
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status = "disabled";
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};
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&iomuxc {
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
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MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
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MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x140
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>;
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};
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};
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