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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
30 lines
724 B
C
30 lines
724 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
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/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
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*/
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#ifndef __AMD_MACH_CONFIG_H
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#define __AMD_MACH_CONFIG_H
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#include <sound/soc-acpi.h>
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#define FLAG_AMD_SOF BIT(1)
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#define FLAG_AMD_SOF_ONLY_DMIC BIT(2)
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#define FLAG_AMD_LEGACY BIT(3)
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#define ACP_PCI_DEV_ID 0x15E2
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extern struct snd_soc_acpi_mach snd_soc_acpi_amd_sof_machines[];
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struct config_entry {
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u32 flags;
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u16 device;
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const struct dmi_system_id *dmi_table;
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};
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#endif
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