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https://github.com/Qortal/Brooklyn.git
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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
48 lines
1.3 KiB
C
48 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_ARM_INSN_H
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#define __ASM_ARM_INSN_H
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#include <linux/types.h>
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/*
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* Avoid a literal load by emitting a sequence of ADD/LDR instructions with the
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* appropriate relocations. The combined sequence has a range of -/+ 256 MiB,
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* which should be sufficient for the core kernel as well as modules loaded
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* into the module region. (Not supported by LLD before release 14)
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*/
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#define LOAD_SYM_ARMV6(reg, sym) \
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" .globl " #sym " \n\t" \
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" .reloc 10f, R_ARM_ALU_PC_G0_NC, " #sym " \n\t" \
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" .reloc 11f, R_ARM_ALU_PC_G1_NC, " #sym " \n\t" \
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" .reloc 12f, R_ARM_LDR_PC_G2, " #sym " \n\t" \
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"10: sub " #reg ", pc, #8 \n\t" \
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"11: sub " #reg ", " #reg ", #4 \n\t" \
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"12: ldr " #reg ", [" #reg ", #0] \n\t"
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static inline unsigned long
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arm_gen_nop(void)
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{
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#ifdef CONFIG_THUMB2_KERNEL
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return 0xf3af8000; /* nop.w */
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#else
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return 0xe1a00000; /* mov r0, r0 */
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#endif
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}
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unsigned long
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__arm_gen_branch(unsigned long pc, unsigned long addr, bool link, bool warn);
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static inline unsigned long
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arm_gen_branch(unsigned long pc, unsigned long addr)
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{
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return __arm_gen_branch(pc, addr, false, true);
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}
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static inline unsigned long
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arm_gen_branch_link(unsigned long pc, unsigned long addr, bool warn)
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{
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return __arm_gen_branch(pc, addr, true, warn);
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}
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#endif
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