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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
65 lines
1.4 KiB
YAML
65 lines
1.4 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/samsung,exynos5250-sata-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung Exynos5250 SoC SATA PHY
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maintainers:
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- Krzysztof Kozlowski <krzk@kernel.org>
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- Marek Szyprowski <m.szyprowski@samsung.com>
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- Sylwester Nawrocki <s.nawrocki@samsung.com>
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properties:
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compatible:
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const: samsung,exynos5250-sata-phy
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: sata_phyctrl
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"#phy-cells":
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const: 0
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reg:
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maxItems: 1
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samsung,syscon-phandle:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to PMU system controller interface.
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samsung,exynos-sataphy-i2c-phandle:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to I2C SATA interface.
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required:
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- compatible
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- clocks
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- clock-names
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- "#phy-cells"
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- reg
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- samsung,syscon-phandle
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- samsung,exynos-sataphy-i2c-phandle
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/exynos5250.h>
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phy@12170000 {
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compatible = "samsung,exynos5250-sata-phy";
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reg = <0x12170000 0x1ff>;
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clocks = <&clock CLK_SATA_PHYCTRL>;
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clock-names = "sata_phyctrl";
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#phy-cells = <0>;
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samsung,syscon-phandle = <&pmu_system_controller>;
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samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
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};
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