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d2ebfd0519
Screw the description like that inbred T3Q
1298 lines
30 KiB
C
1298 lines
30 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Omnivision OV9281 1280x800 global shutter image sensor driver
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*
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* This driver has been taken from
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* https://github.com/rockchip-linux/kernel/blob/develop-4.4/drivers/media/i2c/ov9281.c
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* cleaned up, made to compile against mainline kernels instead of the Rockchip
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* vendor kernel, and the relevant controls added to work with libcamera.
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*
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* Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
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* V0.0X01.0X02 fix mclk issue when probe multiple camera.
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* V0.0X01.0X03 add enum_frame_interval function.
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <linux/sysfs.h>
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#include <linux/slab.h>
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#include <media/media-entity.h>
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#include <media/v4l2-async.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-fwnode.h>
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#include <media/v4l2-subdev.h>
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#define OV9281_LINK_FREQ_400MHZ 400000000
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#define OV9281_LANES 2
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/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
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#define OV9281_PIXEL_RATE_10BIT (OV9281_LINK_FREQ_400MHZ * 2 * \
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OV9281_LANES / 10)
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#define OV9281_PIXEL_RATE_8BIT (OV9281_LINK_FREQ_400MHZ * 2 * \
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OV9281_LANES / 8)
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#define OV9281_XVCLK_FREQ 24000000
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#define CHIP_ID 0x9281
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#define OV9281_REG_CHIP_ID 0x300a
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#define OV9281_REG_TIMING_FORMAT_1 0x3820
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#define OV9281_REG_TIMING_FORMAT_2 0x3821
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#define OV9281_FLIP_BIT BIT(2)
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#define OV9281_REG_CTRL_MODE 0x0100
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#define OV9281_MODE_SW_STANDBY 0x0
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#define OV9281_MODE_STREAMING BIT(0)
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#define OV9281_REG_EXPOSURE 0x3500
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#define OV9281_EXPOSURE_MIN 4
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#define OV9281_EXPOSURE_STEP 1
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/*
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* Number of lines less than frame length (VTS) that exposure must be.
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* Datasheet states 25, although empirically 5 appears to work.
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*/
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#define OV9281_EXPOSURE_OFFSET 25
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#define OV9281_REG_GAIN_H 0x3508
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#define OV9281_REG_GAIN_L 0x3509
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#define OV9281_GAIN_H_MASK 0x07
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#define OV9281_GAIN_H_SHIFT 8
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#define OV9281_GAIN_L_MASK 0xff
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#define OV9281_GAIN_MIN 0x10
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#define OV9281_GAIN_MAX 0xf8
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#define OV9281_GAIN_STEP 1
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#define OV9281_GAIN_DEFAULT 0x10
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#define OV9281_REG_TEST_PATTERN 0x5e00
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#define OV9281_TEST_PATTERN_ENABLE 0x80
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#define OV9281_TEST_PATTERN_DISABLE 0x0
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#define OV9281_REG_VTS 0x380e
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#define OV9281_VTS_MAX 0x7fff
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/*
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* OV9281 native and active pixel array size.
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* Datasheet not available to confirm these values, so assume there are no
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* border pixels.
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*/
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#define OV9281_NATIVE_WIDTH 1280U
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#define OV9281_NATIVE_HEIGHT 800U
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#define OV9281_PIXEL_ARRAY_LEFT 0U
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#define OV9281_PIXEL_ARRAY_TOP 0U
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#define OV9281_PIXEL_ARRAY_WIDTH 1280U
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#define OV9281_PIXEL_ARRAY_HEIGHT 800U
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#define REG_NULL 0xFFFF
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#define OV9281_REG_VALUE_08BIT 1
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#define OV9281_REG_VALUE_16BIT 2
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#define OV9281_REG_VALUE_24BIT 3
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#define OV9281_NAME "ov9281"
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static const char * const ov9281_supply_names[] = {
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"avdd", /* Analog power */
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"dovdd", /* Digital I/O power */
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"dvdd", /* Digital core power */
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};
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#define OV9281_NUM_SUPPLIES ARRAY_SIZE(ov9281_supply_names)
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struct regval {
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u16 addr;
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u8 val;
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};
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struct ov9281_mode {
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u32 width;
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u32 height;
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u32 hts_def;
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u32 vts_def;
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u32 exp_def;
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struct v4l2_rect crop;
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const struct regval *reg_list;
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};
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struct ov9281 {
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struct i2c_client *client;
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struct clk *xvclk;
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struct gpio_desc *reset_gpio;
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struct gpio_desc *pwdn_gpio;
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struct regulator_bulk_data supplies[OV9281_NUM_SUPPLIES];
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struct v4l2_subdev subdev;
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struct media_pad pad;
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struct v4l2_ctrl_handler ctrl_handler;
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struct v4l2_ctrl *exposure;
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struct v4l2_ctrl *anal_gain;
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struct v4l2_ctrl *digi_gain;
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struct v4l2_ctrl *hblank;
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struct v4l2_ctrl *vblank;
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struct v4l2_ctrl *hflip;
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struct v4l2_ctrl *vflip;
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struct v4l2_ctrl *pixel_rate;
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struct v4l2_ctrl *test_pattern;
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struct mutex mutex;
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bool streaming;
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bool power_on;
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const struct ov9281_mode *cur_mode;
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u32 code;
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};
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#define to_ov9281(sd) container_of(sd, struct ov9281, subdev)
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/*
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* Xclk 24Mhz
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* max_framerate 120fps for 10 bit, 144fps for 8 bit.
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* mipi_datarate per lane 800Mbps
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*/
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static const struct regval ov9281_common_regs[] = {
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{0x0103, 0x01},
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{0x0302, 0x32},
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{0x030e, 0x02},
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{0x3001, 0x00},
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{0x3004, 0x00},
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{0x3005, 0x00},
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{0x3006, 0x04},
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{0x3011, 0x0a},
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{0x3013, 0x18},
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{0x3022, 0x01},
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{0x3023, 0x00},
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{0x302c, 0x00},
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{0x302f, 0x00},
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{0x3030, 0x04},
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{0x3039, 0x32},
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{0x303a, 0x00},
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{0x303f, 0x01},
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{0x3500, 0x00},
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{0x3501, 0x2a},
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{0x3502, 0x90},
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{0x3503, 0x08},
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{0x3505, 0x8c},
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{0x3507, 0x03},
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{0x3508, 0x00},
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{0x3509, 0x10},
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{0x3610, 0x80},
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{0x3611, 0xa0},
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{0x3620, 0x6f},
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{0x3632, 0x56},
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{0x3633, 0x78},
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{0x3666, 0x00},
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{0x366f, 0x5a},
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{0x3680, 0x84},
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{0x3712, 0x80},
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{0x372d, 0x22},
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{0x3731, 0x80},
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{0x3732, 0x30},
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{0x377d, 0x22},
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{0x3788, 0x02},
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{0x3789, 0xa4},
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{0x378a, 0x00},
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{0x378b, 0x4a},
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{0x3799, 0x20},
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{0x3881, 0x42},
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{0x38b1, 0x00},
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{0x3920, 0xff},
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{0x4010, 0x40},
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{0x4043, 0x40},
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{0x4307, 0x30},
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{0x4317, 0x00},
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{0x4501, 0x00},
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{0x450a, 0x08},
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{0x4601, 0x04},
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{0x470f, 0x00},
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{0x4f07, 0x00},
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{0x4800, 0x00},
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{0x5000, 0x9f},
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{0x5001, 0x00},
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{0x5e00, 0x00},
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{0x5d00, 0x07},
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{0x5d01, 0x00},
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{REG_NULL, 0x00},
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};
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static const struct regval ov9281_1280x800_regs[] = {
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{0x3778, 0x00},
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{0x3800, 0x00},
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{0x3801, 0x00},
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{0x3802, 0x00},
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{0x3803, 0x00},
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{0x3804, 0x05},
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{0x3805, 0x0f},
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{0x3806, 0x03},
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{0x3807, 0x2f},
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{0x3808, 0x05},
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{0x3809, 0x00},
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{0x380a, 0x03},
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{0x380b, 0x20},
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{0x380c, 0x02},
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{0x380d, 0xd8},
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{0x380e, 0x03},
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{0x380f, 0x8e},
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{0x3810, 0x00},
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{0x3811, 0x08},
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{0x3812, 0x00},
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{0x3813, 0x08},
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{0x3814, 0x11},
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{0x3815, 0x11},
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{0x3820, 0x40},
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{0x3821, 0x00},
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{0x4003, 0x40},
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{0x4008, 0x04},
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{0x4009, 0x0b},
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{0x400c, 0x00},
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{0x400d, 0x07},
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{0x4507, 0x00},
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{0x4509, 0x00},
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{REG_NULL, 0x00},
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};
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static const struct regval ov9281_1280x720_regs[] = {
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{0x3778, 0x00},
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{0x3800, 0x00},
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{0x3801, 0x00},
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{0x3802, 0x00},
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{0x3803, 0x28},
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{0x3804, 0x05},
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{0x3805, 0x0f},
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{0x3806, 0x03},
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{0x3807, 0x07},
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{0x3808, 0x05},
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{0x3809, 0x00},
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{0x380a, 0x02},
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{0x380b, 0xd0},
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{0x380c, 0x02},
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{0x380d, 0xd8},
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{0x380e, 0x03},
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{0x380f, 0x8e},
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{0x3810, 0x00},
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{0x3811, 0x08},
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{0x3812, 0x00},
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{0x3813, 0x08},
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{0x3814, 0x11},
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{0x3815, 0x11},
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{0x3820, 0x40},
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{0x3821, 0x00},
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{0x4003, 0x40},
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{0x4008, 0x04},
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{0x4009, 0x0b},
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{0x400c, 0x00},
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{0x400d, 0x07},
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{0x4507, 0x00},
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{0x4509, 0x00},
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{REG_NULL, 0x00},
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};
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static const struct regval ov9281_640x400_regs[] = {
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{0x3778, 0x10},
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{0x3800, 0x00},
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{0x3801, 0x00},
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{0x3802, 0x00},
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{0x3803, 0x00},
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{0x3804, 0x05},
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{0x3805, 0x0f},
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{0x3806, 0x03},
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{0x3807, 0x2f},
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{0x3808, 0x02},
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{0x3809, 0x80},
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{0x380a, 0x01},
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{0x380b, 0x90},
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{0x380c, 0x02},
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{0x380d, 0xd8},
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{0x380e, 0x02},
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{0x380f, 0x08},
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{0x3810, 0x00},
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{0x3811, 0x04},
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{0x3812, 0x00},
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{0x3813, 0x04},
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{0x3814, 0x31},
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{0x3815, 0x22},
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{0x3820, 0x60},
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{0x3821, 0x01},
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{0x4008, 0x02},
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{0x4009, 0x05},
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{0x400c, 0x00},
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{0x400d, 0x03},
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{0x4507, 0x03},
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{0x4509, 0x80},
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{REG_NULL, 0x00},
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};
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static const struct regval op_10bit[] = {
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{0x030d, 0x50},
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{0x3662, 0x05},
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{REG_NULL, 0x00},
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};
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static const struct regval op_8bit[] = {
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{0x030d, 0x60},
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{0x3662, 0x07},
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{REG_NULL, 0x00},
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};
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static const struct ov9281_mode supported_modes[] = {
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{
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.width = 1280,
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.height = 800,
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.exp_def = 0x0320,
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.hts_def = 0x05b0, /* 0x2d8*2 */
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.vts_def = 0x038e,
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.crop = {
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.left = 0,
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.top = 0,
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.width = 1280,
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.height = 800
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},
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.reg_list = ov9281_1280x800_regs,
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},
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{
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.width = 1280,
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.height = 720,
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.exp_def = 0x0320,
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.hts_def = 0x05b0,
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.vts_def = 761,
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.crop = {
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.left = 0,
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.top = 40,
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.width = 1280,
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.height = 720
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},
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.reg_list = ov9281_1280x720_regs,
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},
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{
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.width = 640,
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.height = 400,
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.exp_def = 0x0320,
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.hts_def = 0x05b0,
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.vts_def = 421,
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.crop = {
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.left = 0,
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.top = 0,
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.width = 1280,
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.height = 800
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},
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.reg_list = ov9281_640x400_regs,
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},
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};
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static const s64 link_freq_menu_items[] = {
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OV9281_LINK_FREQ_400MHZ
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};
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static const char * const ov9281_test_pattern_menu[] = {
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"Disabled",
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"Vertical Color Bar Type 1",
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"Vertical Color Bar Type 2",
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"Vertical Color Bar Type 3",
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"Vertical Color Bar Type 4"
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};
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/* Write registers up to 4 at a time */
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static int ov9281_write_reg(struct i2c_client *client, u16 reg,
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u32 len, u32 val)
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{
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u32 buf_i, val_i;
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u8 buf[6];
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u8 *val_p;
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__be32 val_be;
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if (len > 4)
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return -EINVAL;
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buf[0] = reg >> 8;
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buf[1] = reg & 0xff;
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val_be = cpu_to_be32(val);
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val_p = (u8 *)&val_be;
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buf_i = 2;
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val_i = 4 - len;
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while (val_i < 4)
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buf[buf_i++] = val_p[val_i++];
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if (i2c_master_send(client, buf, len + 2) != len + 2)
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return -EIO;
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return 0;
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}
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static int ov9281_write_array(struct i2c_client *client,
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const struct regval *regs)
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{
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u32 i;
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int ret = 0;
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for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
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ret = ov9281_write_reg(client, regs[i].addr,
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OV9281_REG_VALUE_08BIT, regs[i].val);
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return ret;
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}
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/* Read registers up to 4 at a time */
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static int ov9281_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
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u32 *val)
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{
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struct i2c_msg msgs[2];
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u8 *data_be_p;
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__be32 data_be = 0;
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__be16 reg_addr_be = cpu_to_be16(reg);
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int ret;
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if (len > 4 || !len)
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return -EINVAL;
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data_be_p = (u8 *)&data_be;
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/* Write register address */
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msgs[0].addr = client->addr;
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msgs[0].flags = 0;
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msgs[0].len = 2;
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msgs[0].buf = (u8 *)®_addr_be;
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/* Read data from register */
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msgs[1].addr = client->addr;
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msgs[1].flags = I2C_M_RD;
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msgs[1].len = len;
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msgs[1].buf = &data_be_p[4 - len];
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ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
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if (ret != ARRAY_SIZE(msgs))
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return -EIO;
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*val = be32_to_cpu(data_be);
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return 0;
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}
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static int ov9281_get_reso_dist(const struct ov9281_mode *mode,
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struct v4l2_mbus_framefmt *framefmt)
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{
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return abs(mode->width - framefmt->width) +
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abs(mode->height - framefmt->height);
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}
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static const struct ov9281_mode *
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ov9281_find_best_fit(struct v4l2_subdev_format *fmt)
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{
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struct v4l2_mbus_framefmt *framefmt = &fmt->format;
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int dist;
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|
int cur_best_fit = 0;
|
|
int cur_best_fit_dist = -1;
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
|
|
dist = ov9281_get_reso_dist(&supported_modes[i], framefmt);
|
|
if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
|
|
cur_best_fit_dist = dist;
|
|
cur_best_fit = i;
|
|
}
|
|
}
|
|
|
|
return &supported_modes[cur_best_fit];
|
|
}
|
|
|
|
static int ov9281_set_fmt(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_format *fmt)
|
|
{
|
|
struct ov9281 *ov9281 = to_ov9281(sd);
|
|
const struct ov9281_mode *mode;
|
|
s64 h_blank, vblank_def, pixel_rate;
|
|
|
|
mutex_lock(&ov9281->mutex);
|
|
|
|
mode = ov9281_find_best_fit(fmt);
|
|
if (fmt->format.code != MEDIA_BUS_FMT_Y8_1X8)
|
|
fmt->format.code = MEDIA_BUS_FMT_Y10_1X10;
|
|
fmt->format.width = mode->width;
|
|
fmt->format.height = mode->height;
|
|
fmt->format.field = V4L2_FIELD_NONE;
|
|
fmt->format.colorspace = V4L2_COLORSPACE_RAW;
|
|
fmt->format.ycbcr_enc =
|
|
V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->format.colorspace);
|
|
fmt->format.quantization =
|
|
V4L2_MAP_QUANTIZATION_DEFAULT(true, fmt->format.colorspace,
|
|
fmt->format.ycbcr_enc);
|
|
fmt->format.xfer_func =
|
|
V4L2_MAP_XFER_FUNC_DEFAULT(fmt->format.colorspace);
|
|
|
|
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
|
|
*v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
|
|
} else {
|
|
ov9281->cur_mode = mode;
|
|
ov9281->code = fmt->format.code;
|
|
h_blank = mode->hts_def - mode->width;
|
|
__v4l2_ctrl_modify_range(ov9281->hblank, h_blank,
|
|
h_blank, 1, h_blank);
|
|
__v4l2_ctrl_s_ctrl(ov9281->hblank, h_blank);
|
|
vblank_def = mode->vts_def - mode->height;
|
|
__v4l2_ctrl_modify_range(ov9281->vblank, vblank_def,
|
|
OV9281_VTS_MAX - mode->height,
|
|
1, vblank_def);
|
|
__v4l2_ctrl_s_ctrl(ov9281->vblank, vblank_def);
|
|
|
|
pixel_rate = (fmt->format.code == MEDIA_BUS_FMT_Y10_1X10) ?
|
|
OV9281_PIXEL_RATE_10BIT : OV9281_PIXEL_RATE_8BIT;
|
|
__v4l2_ctrl_modify_range(ov9281->pixel_rate, pixel_rate,
|
|
pixel_rate, 1, pixel_rate);
|
|
}
|
|
|
|
mutex_unlock(&ov9281->mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov9281_get_fmt(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_format *fmt)
|
|
{
|
|
struct ov9281 *ov9281 = to_ov9281(sd);
|
|
const struct ov9281_mode *mode = ov9281->cur_mode;
|
|
|
|
mutex_lock(&ov9281->mutex);
|
|
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
|
|
fmt->format = *v4l2_subdev_get_try_format(sd, sd_state,
|
|
fmt->pad);
|
|
} else {
|
|
fmt->format.width = mode->width;
|
|
fmt->format.height = mode->height;
|
|
fmt->format.code = ov9281->code;
|
|
fmt->format.field = V4L2_FIELD_NONE;
|
|
fmt->format.colorspace = V4L2_COLORSPACE_RAW;
|
|
fmt->format.ycbcr_enc =
|
|
V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->format.colorspace);
|
|
fmt->format.quantization =
|
|
V4L2_MAP_QUANTIZATION_DEFAULT(true,
|
|
fmt->format.colorspace,
|
|
fmt->format.ycbcr_enc);
|
|
fmt->format.xfer_func =
|
|
V4L2_MAP_XFER_FUNC_DEFAULT(fmt->format.colorspace);
|
|
}
|
|
mutex_unlock(&ov9281->mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov9281_enum_mbus_code(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_mbus_code_enum *code)
|
|
{
|
|
switch (code->index) {
|
|
default:
|
|
return -EINVAL;
|
|
case 0:
|
|
code->code = MEDIA_BUS_FMT_Y10_1X10;
|
|
break;
|
|
case 1:
|
|
code->code = MEDIA_BUS_FMT_Y8_1X8;
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov9281_enum_frame_sizes(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_frame_size_enum *fse)
|
|
{
|
|
if (fse->index >= ARRAY_SIZE(supported_modes))
|
|
return -EINVAL;
|
|
|
|
if (fse->code != MEDIA_BUS_FMT_Y10_1X10 &&
|
|
fse->code != MEDIA_BUS_FMT_Y8_1X8)
|
|
return -EINVAL;
|
|
|
|
fse->min_width = supported_modes[fse->index].width;
|
|
fse->max_width = supported_modes[fse->index].width;
|
|
fse->max_height = supported_modes[fse->index].height;
|
|
fse->min_height = supported_modes[fse->index].height;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov9281_enable_test_pattern(struct ov9281 *ov9281, u32 pattern)
|
|
{
|
|
u32 val;
|
|
|
|
if (pattern)
|
|
val = (pattern - 1) | OV9281_TEST_PATTERN_ENABLE;
|
|
else
|
|
val = OV9281_TEST_PATTERN_DISABLE;
|
|
|
|
return ov9281_write_reg(ov9281->client, OV9281_REG_TEST_PATTERN,
|
|
OV9281_REG_VALUE_08BIT, val);
|
|
}
|
|
|
|
static int ov9281_set_ctrl_hflip(struct ov9281 *ov9281, int value)
|
|
{
|
|
u32 current_val;
|
|
int ret = ov9281_read_reg(ov9281->client, OV9281_REG_TIMING_FORMAT_2,
|
|
OV9281_REG_VALUE_08BIT, ¤t_val);
|
|
if (!ret) {
|
|
if (value)
|
|
current_val |= OV9281_FLIP_BIT;
|
|
else
|
|
current_val &= ~OV9281_FLIP_BIT;
|
|
return ov9281_write_reg(ov9281->client,
|
|
OV9281_REG_TIMING_FORMAT_2,
|
|
OV9281_REG_VALUE_08BIT,
|
|
current_val);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static int ov9281_set_ctrl_vflip(struct ov9281 *ov9281, int value)
|
|
{
|
|
u32 current_val;
|
|
int ret = ov9281_read_reg(ov9281->client, OV9281_REG_TIMING_FORMAT_1,
|
|
OV9281_REG_VALUE_08BIT, ¤t_val);
|
|
if (!ret) {
|
|
if (value)
|
|
current_val |= OV9281_FLIP_BIT;
|
|
else
|
|
current_val &= ~OV9281_FLIP_BIT;
|
|
return ov9281_write_reg(ov9281->client,
|
|
OV9281_REG_TIMING_FORMAT_1,
|
|
OV9281_REG_VALUE_08BIT,
|
|
current_val);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static const struct v4l2_rect *
|
|
__ov9281_get_pad_crop(struct ov9281 *ov9281,
|
|
struct v4l2_subdev_state *sd_state,
|
|
unsigned int pad, enum v4l2_subdev_format_whence which)
|
|
{
|
|
switch (which) {
|
|
case V4L2_SUBDEV_FORMAT_TRY:
|
|
return v4l2_subdev_get_try_crop(&ov9281->subdev, sd_state,
|
|
pad);
|
|
case V4L2_SUBDEV_FORMAT_ACTIVE:
|
|
return &ov9281->cur_mode->crop;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static int ov9281_get_selection(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_selection *sel)
|
|
{
|
|
switch (sel->target) {
|
|
case V4L2_SEL_TGT_CROP: {
|
|
struct ov9281 *ov9281 = to_ov9281(sd);
|
|
|
|
mutex_lock(&ov9281->mutex);
|
|
sel->r = *__ov9281_get_pad_crop(ov9281, sd_state, sel->pad,
|
|
sel->which);
|
|
mutex_unlock(&ov9281->mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
case V4L2_SEL_TGT_NATIVE_SIZE:
|
|
sel->r.top = 0;
|
|
sel->r.left = 0;
|
|
sel->r.width = OV9281_NATIVE_WIDTH;
|
|
sel->r.height = OV9281_NATIVE_HEIGHT;
|
|
|
|
return 0;
|
|
|
|
case V4L2_SEL_TGT_CROP_DEFAULT:
|
|
case V4L2_SEL_TGT_CROP_BOUNDS:
|
|
sel->r.top = OV9281_PIXEL_ARRAY_TOP;
|
|
sel->r.left = OV9281_PIXEL_ARRAY_LEFT;
|
|
sel->r.width = OV9281_PIXEL_ARRAY_WIDTH;
|
|
sel->r.height = OV9281_PIXEL_ARRAY_HEIGHT;
|
|
|
|
return 0;
|
|
}
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static int __ov9281_start_stream(struct ov9281 *ov9281)
|
|
{
|
|
int ret;
|
|
|
|
ret = ov9281_write_array(ov9281->client, ov9281_common_regs);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = ov9281_write_array(ov9281->client, ov9281->cur_mode->reg_list);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (ov9281->code == MEDIA_BUS_FMT_Y10_1X10)
|
|
ret = ov9281_write_array(ov9281->client, op_10bit);
|
|
else
|
|
ret = ov9281_write_array(ov9281->client, op_8bit);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* In case these controls are set before streaming */
|
|
mutex_unlock(&ov9281->mutex);
|
|
ret = v4l2_ctrl_handler_setup(&ov9281->ctrl_handler);
|
|
mutex_lock(&ov9281->mutex);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return ov9281_write_reg(ov9281->client, OV9281_REG_CTRL_MODE,
|
|
OV9281_REG_VALUE_08BIT, OV9281_MODE_STREAMING);
|
|
}
|
|
|
|
static int __ov9281_stop_stream(struct ov9281 *ov9281)
|
|
{
|
|
return ov9281_write_reg(ov9281->client, OV9281_REG_CTRL_MODE,
|
|
OV9281_REG_VALUE_08BIT, OV9281_MODE_SW_STANDBY);
|
|
}
|
|
|
|
static int ov9281_s_stream(struct v4l2_subdev *sd, int on)
|
|
{
|
|
struct ov9281 *ov9281 = to_ov9281(sd);
|
|
struct i2c_client *client = ov9281->client;
|
|
int ret = 0;
|
|
|
|
mutex_lock(&ov9281->mutex);
|
|
on = !!on;
|
|
if (on == ov9281->streaming)
|
|
goto unlock_and_return;
|
|
|
|
if (on) {
|
|
ret = pm_runtime_get_sync(&client->dev);
|
|
if (ret < 0) {
|
|
pm_runtime_put_noidle(&client->dev);
|
|
goto unlock_and_return;
|
|
}
|
|
|
|
ret = __ov9281_start_stream(ov9281);
|
|
if (ret) {
|
|
v4l2_err(sd, "start stream failed while write regs\n");
|
|
pm_runtime_put(&client->dev);
|
|
goto unlock_and_return;
|
|
}
|
|
} else {
|
|
__ov9281_stop_stream(ov9281);
|
|
pm_runtime_put(&client->dev);
|
|
}
|
|
|
|
ov9281->streaming = on;
|
|
|
|
unlock_and_return:
|
|
mutex_unlock(&ov9281->mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ov9281_s_power(struct v4l2_subdev *sd, int on)
|
|
{
|
|
struct ov9281 *ov9281 = to_ov9281(sd);
|
|
struct i2c_client *client = ov9281->client;
|
|
int ret = 0;
|
|
|
|
mutex_lock(&ov9281->mutex);
|
|
|
|
/* If the power state is not modified - no work to do. */
|
|
if (ov9281->power_on == !!on)
|
|
goto unlock_and_return;
|
|
|
|
if (on) {
|
|
ret = pm_runtime_get_sync(&client->dev);
|
|
if (ret < 0) {
|
|
pm_runtime_put_noidle(&client->dev);
|
|
goto unlock_and_return;
|
|
}
|
|
ov9281->power_on = true;
|
|
} else {
|
|
pm_runtime_put(&client->dev);
|
|
ov9281->power_on = false;
|
|
}
|
|
|
|
unlock_and_return:
|
|
mutex_unlock(&ov9281->mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* Calculate the delay in us by clock rate and clock cycles */
|
|
static inline u32 ov9281_cal_delay(u32 cycles)
|
|
{
|
|
return DIV_ROUND_UP(cycles, OV9281_XVCLK_FREQ / 1000 / 1000);
|
|
}
|
|
|
|
static int __ov9281_power_on(struct ov9281 *ov9281)
|
|
{
|
|
int ret;
|
|
u32 delay_us;
|
|
struct device *dev = &ov9281->client->dev;
|
|
|
|
ret = clk_set_rate(ov9281->xvclk, OV9281_XVCLK_FREQ);
|
|
if (ret < 0)
|
|
dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
|
|
if (clk_get_rate(ov9281->xvclk) != OV9281_XVCLK_FREQ)
|
|
dev_warn(dev, "xvclk mismatched, modes are based on 24MHz - rate is %lu\n",
|
|
clk_get_rate(ov9281->xvclk));
|
|
|
|
ret = clk_prepare_enable(ov9281->xvclk);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to enable xvclk\n");
|
|
return ret;
|
|
}
|
|
|
|
if (!IS_ERR(ov9281->reset_gpio))
|
|
gpiod_set_value_cansleep(ov9281->reset_gpio, 0);
|
|
|
|
ret = regulator_bulk_enable(OV9281_NUM_SUPPLIES, ov9281->supplies);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to enable regulators\n");
|
|
goto disable_clk;
|
|
}
|
|
|
|
if (!IS_ERR(ov9281->reset_gpio))
|
|
gpiod_set_value_cansleep(ov9281->reset_gpio, 1);
|
|
|
|
usleep_range(500, 1000);
|
|
if (!IS_ERR(ov9281->pwdn_gpio))
|
|
gpiod_set_value_cansleep(ov9281->pwdn_gpio, 1);
|
|
|
|
/* 8192 cycles prior to first SCCB transaction */
|
|
delay_us = ov9281_cal_delay(8192);
|
|
usleep_range(delay_us, delay_us * 2);
|
|
|
|
return 0;
|
|
|
|
disable_clk:
|
|
clk_disable_unprepare(ov9281->xvclk);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __ov9281_power_off(struct ov9281 *ov9281)
|
|
{
|
|
if (!IS_ERR(ov9281->pwdn_gpio))
|
|
gpiod_set_value_cansleep(ov9281->pwdn_gpio, 0);
|
|
clk_disable_unprepare(ov9281->xvclk);
|
|
if (!IS_ERR(ov9281->reset_gpio))
|
|
gpiod_set_value_cansleep(ov9281->reset_gpio, 0);
|
|
regulator_bulk_disable(OV9281_NUM_SUPPLIES, ov9281->supplies);
|
|
}
|
|
|
|
static int ov9281_runtime_resume(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ov9281 *ov9281 = to_ov9281(sd);
|
|
|
|
return __ov9281_power_on(ov9281);
|
|
}
|
|
|
|
static int ov9281_runtime_suspend(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ov9281 *ov9281 = to_ov9281(sd);
|
|
|
|
__ov9281_power_off(ov9281);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov9281_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
|
|
{
|
|
struct ov9281 *ov9281 = to_ov9281(sd);
|
|
struct v4l2_mbus_framefmt *try_fmt =
|
|
v4l2_subdev_get_try_format(sd, fh->state, 0);
|
|
const struct ov9281_mode *def_mode = &supported_modes[0];
|
|
|
|
mutex_lock(&ov9281->mutex);
|
|
/* Initialize try_fmt */
|
|
try_fmt->width = def_mode->width;
|
|
try_fmt->height = def_mode->height;
|
|
try_fmt->code = MEDIA_BUS_FMT_Y10_1X10;
|
|
try_fmt->field = V4L2_FIELD_NONE;
|
|
try_fmt->colorspace = V4L2_COLORSPACE_RAW;
|
|
try_fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(try_fmt->colorspace);
|
|
try_fmt->quantization =
|
|
V4L2_MAP_QUANTIZATION_DEFAULT(true, try_fmt->colorspace,
|
|
try_fmt->ycbcr_enc);
|
|
try_fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(try_fmt->colorspace);
|
|
|
|
mutex_unlock(&ov9281->mutex);
|
|
/* No crop or compose */
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops ov9281_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(ov9281_runtime_suspend,
|
|
ov9281_runtime_resume, NULL)
|
|
};
|
|
|
|
static const struct v4l2_subdev_internal_ops ov9281_internal_ops = {
|
|
.open = ov9281_open,
|
|
};
|
|
|
|
static const struct v4l2_subdev_core_ops ov9281_core_ops = {
|
|
.s_power = ov9281_s_power,
|
|
};
|
|
|
|
static const struct v4l2_subdev_video_ops ov9281_video_ops = {
|
|
.s_stream = ov9281_s_stream,
|
|
};
|
|
|
|
static const struct v4l2_subdev_pad_ops ov9281_pad_ops = {
|
|
.enum_mbus_code = ov9281_enum_mbus_code,
|
|
.enum_frame_size = ov9281_enum_frame_sizes,
|
|
.get_fmt = ov9281_get_fmt,
|
|
.set_fmt = ov9281_set_fmt,
|
|
.get_selection = ov9281_get_selection,
|
|
};
|
|
|
|
static const struct v4l2_subdev_ops ov9281_subdev_ops = {
|
|
.core = &ov9281_core_ops,
|
|
.video = &ov9281_video_ops,
|
|
.pad = &ov9281_pad_ops,
|
|
};
|
|
|
|
static int ov9281_set_ctrl(struct v4l2_ctrl *ctrl)
|
|
{
|
|
struct ov9281 *ov9281 = container_of(ctrl->handler,
|
|
struct ov9281, ctrl_handler);
|
|
struct i2c_client *client = ov9281->client;
|
|
s64 max;
|
|
int ret = 0;
|
|
|
|
/* Propagate change of current control to all related controls */
|
|
switch (ctrl->id) {
|
|
case V4L2_CID_VBLANK:
|
|
/* Update max exposure while meeting expected vblanking */
|
|
max = ov9281->cur_mode->height + ctrl->val - OV9281_EXPOSURE_OFFSET;
|
|
__v4l2_ctrl_modify_range(ov9281->exposure,
|
|
ov9281->exposure->minimum, max,
|
|
ov9281->exposure->step,
|
|
ov9281->exposure->default_value);
|
|
break;
|
|
}
|
|
|
|
if (pm_runtime_get(&client->dev) <= 0)
|
|
return 0;
|
|
|
|
switch (ctrl->id) {
|
|
case V4L2_CID_HFLIP:
|
|
ret = ov9281_set_ctrl_hflip(ov9281, ctrl->val);
|
|
break;
|
|
case V4L2_CID_VFLIP:
|
|
ret = ov9281_set_ctrl_vflip(ov9281, ctrl->val);
|
|
break;
|
|
case V4L2_CID_EXPOSURE:
|
|
/* 4 least significant bits of expsoure are fractional part */
|
|
ret = ov9281_write_reg(ov9281->client, OV9281_REG_EXPOSURE,
|
|
OV9281_REG_VALUE_24BIT, ctrl->val << 4);
|
|
break;
|
|
case V4L2_CID_ANALOGUE_GAIN:
|
|
ret = ov9281_write_reg(ov9281->client, OV9281_REG_GAIN_H,
|
|
OV9281_REG_VALUE_08BIT,
|
|
(ctrl->val >> OV9281_GAIN_H_SHIFT) &
|
|
OV9281_GAIN_H_MASK);
|
|
ret |= ov9281_write_reg(ov9281->client, OV9281_REG_GAIN_L,
|
|
OV9281_REG_VALUE_08BIT,
|
|
ctrl->val & OV9281_GAIN_L_MASK);
|
|
break;
|
|
case V4L2_CID_VBLANK:
|
|
ret = ov9281_write_reg(ov9281->client, OV9281_REG_VTS,
|
|
OV9281_REG_VALUE_16BIT,
|
|
ctrl->val + ov9281->cur_mode->height);
|
|
break;
|
|
case V4L2_CID_TEST_PATTERN:
|
|
ret = ov9281_enable_test_pattern(ov9281, ctrl->val);
|
|
break;
|
|
default:
|
|
dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
|
|
__func__, ctrl->id, ctrl->val);
|
|
break;
|
|
}
|
|
|
|
pm_runtime_put(&client->dev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct v4l2_ctrl_ops ov9281_ctrl_ops = {
|
|
.s_ctrl = ov9281_set_ctrl,
|
|
};
|
|
|
|
static int ov9281_initialize_controls(struct ov9281 *ov9281)
|
|
{
|
|
struct v4l2_fwnode_device_properties props;
|
|
const struct ov9281_mode *mode;
|
|
struct v4l2_ctrl_handler *handler;
|
|
struct v4l2_ctrl *ctrl;
|
|
s64 exposure_max, vblank_def;
|
|
u32 h_blank;
|
|
int ret;
|
|
|
|
handler = &ov9281->ctrl_handler;
|
|
mode = ov9281->cur_mode;
|
|
ret = v4l2_ctrl_handler_init(handler, 11);
|
|
if (ret)
|
|
return ret;
|
|
handler->lock = &ov9281->mutex;
|
|
|
|
ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
|
|
0, 0, link_freq_menu_items);
|
|
if (ctrl)
|
|
ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
|
|
|
ov9281->pixel_rate = v4l2_ctrl_new_std(handler, NULL,
|
|
V4L2_CID_PIXEL_RATE,
|
|
OV9281_PIXEL_RATE_10BIT,
|
|
OV9281_PIXEL_RATE_10BIT, 1,
|
|
OV9281_PIXEL_RATE_10BIT);
|
|
|
|
h_blank = mode->hts_def - mode->width;
|
|
ov9281->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
|
|
h_blank, h_blank, 1, h_blank);
|
|
if (ov9281->hblank)
|
|
ov9281->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
|
|
|
vblank_def = mode->vts_def - mode->height;
|
|
ov9281->vblank = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
|
|
V4L2_CID_VBLANK, vblank_def,
|
|
OV9281_VTS_MAX - mode->height, 1,
|
|
vblank_def);
|
|
|
|
exposure_max = mode->vts_def - OV9281_EXPOSURE_OFFSET;
|
|
ov9281->exposure = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
|
|
V4L2_CID_EXPOSURE,
|
|
OV9281_EXPOSURE_MIN, exposure_max,
|
|
OV9281_EXPOSURE_STEP,
|
|
mode->exp_def);
|
|
|
|
ov9281->anal_gain = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
|
|
V4L2_CID_ANALOGUE_GAIN,
|
|
OV9281_GAIN_MIN, OV9281_GAIN_MAX,
|
|
OV9281_GAIN_STEP,
|
|
OV9281_GAIN_DEFAULT);
|
|
|
|
ov9281->vflip = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
|
|
V4L2_CID_VFLIP,
|
|
0, 1, 1, 0);
|
|
|
|
ov9281->hflip = v4l2_ctrl_new_std(handler, &ov9281_ctrl_ops,
|
|
V4L2_CID_HFLIP,
|
|
0, 1, 1, 0);
|
|
|
|
ov9281->test_pattern =
|
|
v4l2_ctrl_new_std_menu_items(handler, &ov9281_ctrl_ops,
|
|
V4L2_CID_TEST_PATTERN,
|
|
ARRAY_SIZE(ov9281_test_pattern_menu) - 1,
|
|
0, 0, ov9281_test_pattern_menu);
|
|
|
|
if (handler->error) {
|
|
ret = handler->error;
|
|
dev_err(&ov9281->client->dev,
|
|
"Failed to init controls(%d)\n", ret);
|
|
goto err_free_handler;
|
|
}
|
|
|
|
ret = v4l2_fwnode_device_parse(&ov9281->client->dev, &props);
|
|
if (ret)
|
|
goto err_free_handler;
|
|
|
|
ret = v4l2_ctrl_new_fwnode_properties(handler, &ov9281_ctrl_ops,
|
|
&props);
|
|
if (ret)
|
|
goto err_free_handler;
|
|
|
|
ov9281->subdev.ctrl_handler = handler;
|
|
|
|
return 0;
|
|
|
|
err_free_handler:
|
|
v4l2_ctrl_handler_free(handler);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ov9281_check_sensor_id(struct ov9281 *ov9281,
|
|
struct i2c_client *client)
|
|
{
|
|
struct device *dev = &ov9281->client->dev;
|
|
u32 id = 0, id_msb = 0;
|
|
int ret;
|
|
|
|
ret = ov9281_read_reg(client, OV9281_REG_CHIP_ID + 1,
|
|
OV9281_REG_VALUE_08BIT, &id);
|
|
if (!ret)
|
|
ret = ov9281_read_reg(client, OV9281_REG_CHIP_ID,
|
|
OV9281_REG_VALUE_08BIT, &id_msb);
|
|
id |= (id_msb << 8);
|
|
if (ret || id != CHIP_ID) {
|
|
dev_err(dev, "Unexpected sensor id(%04x), ret(%d)\n", id, ret);
|
|
return -ENODEV;
|
|
}
|
|
|
|
dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov9281_configure_regulators(struct ov9281 *ov9281)
|
|
{
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < OV9281_NUM_SUPPLIES; i++)
|
|
ov9281->supplies[i].supply = ov9281_supply_names[i];
|
|
|
|
return devm_regulator_bulk_get(&ov9281->client->dev,
|
|
OV9281_NUM_SUPPLIES,
|
|
ov9281->supplies);
|
|
}
|
|
|
|
static int ov9281_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct device *dev = &client->dev;
|
|
struct ov9281 *ov9281;
|
|
struct v4l2_subdev *sd;
|
|
int ret;
|
|
|
|
ov9281 = devm_kzalloc(dev, sizeof(*ov9281), GFP_KERNEL);
|
|
if (!ov9281)
|
|
return -ENOMEM;
|
|
|
|
ov9281->client = client;
|
|
ov9281->cur_mode = &supported_modes[0];
|
|
|
|
ov9281->xvclk = devm_clk_get(dev, "xvclk");
|
|
if (IS_ERR(ov9281->xvclk)) {
|
|
dev_err(dev, "Failed to get xvclk\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ov9281->reset_gpio = devm_gpiod_get_optional(dev, "reset",
|
|
GPIOD_OUT_LOW);
|
|
if (IS_ERR(ov9281->reset_gpio))
|
|
dev_warn(dev, "Failed to get reset-gpios\n");
|
|
|
|
ov9281->pwdn_gpio = devm_gpiod_get_optional(dev, "pwdn", GPIOD_OUT_LOW);
|
|
if (IS_ERR(ov9281->pwdn_gpio))
|
|
dev_warn(dev, "Failed to get pwdn-gpios\n");
|
|
|
|
ret = ov9281_configure_regulators(ov9281);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to get power regulators\n");
|
|
return ret;
|
|
}
|
|
|
|
mutex_init(&ov9281->mutex);
|
|
|
|
sd = &ov9281->subdev;
|
|
v4l2_i2c_subdev_init(sd, client, &ov9281_subdev_ops);
|
|
ret = ov9281_initialize_controls(ov9281);
|
|
if (ret)
|
|
goto err_destroy_mutex;
|
|
|
|
ret = __ov9281_power_on(ov9281);
|
|
if (ret)
|
|
goto err_free_handler;
|
|
|
|
ret = ov9281_check_sensor_id(ov9281, client);
|
|
if (ret)
|
|
goto err_power_off;
|
|
|
|
sd->internal_ops = &ov9281_internal_ops;
|
|
sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
|
|
|
|
ov9281->pad.flags = MEDIA_PAD_FL_SOURCE;
|
|
sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
|
|
ret = media_entity_pads_init(&sd->entity, 1, &ov9281->pad);
|
|
if (ret < 0)
|
|
goto err_power_off;
|
|
|
|
ret = v4l2_async_register_subdev_sensor(sd);
|
|
if (ret) {
|
|
dev_err(dev, "v4l2 async register subdev failed\n");
|
|
goto err_clean_entity;
|
|
}
|
|
|
|
pm_runtime_set_active(dev);
|
|
pm_runtime_enable(dev);
|
|
pm_runtime_idle(dev);
|
|
|
|
return 0;
|
|
|
|
err_clean_entity:
|
|
media_entity_cleanup(&sd->entity);
|
|
err_power_off:
|
|
__ov9281_power_off(ov9281);
|
|
err_free_handler:
|
|
v4l2_ctrl_handler_free(&ov9281->ctrl_handler);
|
|
err_destroy_mutex:
|
|
mutex_destroy(&ov9281->mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ov9281_remove(struct i2c_client *client)
|
|
{
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ov9281 *ov9281 = to_ov9281(sd);
|
|
|
|
v4l2_async_unregister_subdev(sd);
|
|
media_entity_cleanup(&sd->entity);
|
|
v4l2_ctrl_handler_free(&ov9281->ctrl_handler);
|
|
mutex_destroy(&ov9281->mutex);
|
|
|
|
pm_runtime_disable(&client->dev);
|
|
if (!pm_runtime_status_suspended(&client->dev))
|
|
__ov9281_power_off(ov9281);
|
|
pm_runtime_set_suspended(&client->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id ov9281_of_match[] = {
|
|
{ .compatible = "ovti,ov9281" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ov9281_of_match);
|
|
|
|
static const struct i2c_device_id ov9281_match_id[] = {
|
|
{ "ovti,ov9281", 0 },
|
|
{ },
|
|
};
|
|
|
|
static struct i2c_driver ov9281_i2c_driver = {
|
|
.driver = {
|
|
.name = OV9281_NAME,
|
|
.pm = &ov9281_pm_ops,
|
|
.of_match_table = of_match_ptr(ov9281_of_match),
|
|
},
|
|
.probe = &ov9281_probe,
|
|
.remove = &ov9281_remove,
|
|
.id_table = ov9281_match_id,
|
|
};
|
|
|
|
static int __init sensor_mod_init(void)
|
|
{
|
|
return i2c_add_driver(&ov9281_i2c_driver);
|
|
}
|
|
|
|
static void __exit sensor_mod_exit(void)
|
|
{
|
|
i2c_del_driver(&ov9281_i2c_driver);
|
|
}
|
|
|
|
device_initcall_sync(sensor_mod_init);
|
|
module_exit(sensor_mod_exit);
|
|
|
|
MODULE_DESCRIPTION("OmniVision ov9281 sensor driver");
|
|
MODULE_LICENSE("GPL v2");
|