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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
104 lines
3.0 KiB
C
104 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This file provides wrappers with sanitizer instrumentation for atomic bit
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* operations.
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*
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* To use this functionality, an arch's bitops.h file needs to define each of
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* the below bit operations with an arch_ prefix (e.g. arch_set_bit(),
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* arch___set_bit(), etc.).
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*/
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#ifndef _ASM_GENERIC_BITOPS_INSTRUMENTED_ATOMIC_H
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#define _ASM_GENERIC_BITOPS_INSTRUMENTED_ATOMIC_H
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#include <linux/instrumented.h>
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/**
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* set_bit - Atomically set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* This is a relaxed atomic operation (no implied memory barriers).
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*
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static __always_inline void set_bit(long nr, volatile unsigned long *addr)
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{
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instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));
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arch_set_bit(nr, addr);
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}
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/**
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* clear_bit - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* This is a relaxed atomic operation (no implied memory barriers).
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*/
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static __always_inline void clear_bit(long nr, volatile unsigned long *addr)
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{
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instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));
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arch_clear_bit(nr, addr);
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}
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/**
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* change_bit - Toggle a bit in memory
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* @nr: Bit to change
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* @addr: Address to start counting from
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*
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* This is a relaxed atomic operation (no implied memory barriers).
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*
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static __always_inline void change_bit(long nr, volatile unsigned long *addr)
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{
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instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));
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arch_change_bit(nr, addr);
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}
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/**
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* test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This is an atomic fully-ordered operation (implied full memory barrier).
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*/
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static __always_inline bool test_and_set_bit(long nr, volatile unsigned long *addr)
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{
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kcsan_mb();
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instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_and_set_bit(nr, addr);
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}
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/**
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* test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to clear
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* @addr: Address to count from
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*
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* This is an atomic fully-ordered operation (implied full memory barrier).
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*/
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static __always_inline bool test_and_clear_bit(long nr, volatile unsigned long *addr)
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{
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kcsan_mb();
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instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_and_clear_bit(nr, addr);
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}
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/**
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* test_and_change_bit - Change a bit and return its old value
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* @nr: Bit to change
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* @addr: Address to count from
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*
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* This is an atomic fully-ordered operation (implied full memory barrier).
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*/
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static __always_inline bool test_and_change_bit(long nr, volatile unsigned long *addr)
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{
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kcsan_mb();
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instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
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return arch_test_and_change_bit(nr, addr);
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}
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#endif /* _ASM_GENERIC_BITOPS_INSTRUMENTED_NON_ATOMIC_H */
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