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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
52 lines
954 B
YAML
52 lines
954 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/ti/ti,clksel.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Binding for TI clksel clock
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maintainers:
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- Tony Lindgren <tony@atomide.com>
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description: |
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The TI CLKSEL clocks consist of consist of input clock mux bits, and in some
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cases also has divider, multiplier and gate bits.
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properties:
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compatible:
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const: ti,clksel
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reg:
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maxItems: 1
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description: The CLKSEL register range
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'#address-cells':
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enum: [ 0, 1, 2 ]
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'#size-cells':
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enum: [ 0, 1, 2 ]
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ranges: true
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"#clock-cells":
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const: 2
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description: The CLKSEL register and bit offset
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required:
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- compatible
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- reg
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- "#clock-cells"
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additionalProperties:
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type: object
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examples:
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- |
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clksel_gfx_fclk: clock@52c {
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compatible = "ti,clksel";
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reg = <0x25c 0x4>;
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#clock-cells = <2>;
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};
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...
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