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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
56 lines
1.3 KiB
Plaintext
56 lines
1.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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#include "bcm283x.dtsi"
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#include "bcm2835-common.dtsi"
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#include "bcm2835-rpi-common.dtsi"
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/ {
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compatible = "brcm,bcm2835";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,arm1176jzf-s";
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reg = <0x0>;
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/* Source for d/i-cache-line-size and d/i-cache-sets
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* https://developer.arm.com/documentation/ddi0301
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* /h/level-one-memory-system/cache-organization?lang=en
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*
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* Source for d/i-cache-size
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* https://forums.raspberrypi.com/viewtopic.php?t=98428
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*
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* NOTE: The BCM2835 has a L2 cache but it is dedicated to the GPU
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* It can be shared with the CPU through fw settings,
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* but this is not recommended.
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*/
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d-cache-size = <0x4000>;
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d-cache-line-size = <16>;
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d-cache-sets = <256>; // 16KiB(size)/16(line-size)=1024ways/4-way set
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i-cache-size = <0x4000>;
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i-cache-line-size = <16>;
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i-cache-sets = <256>; // 16KiB(size)/16(line-size)=1024ways/4-way set
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};
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};
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soc {
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ranges = <0x7e000000 0x20000000 0x02000000>;
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dma-ranges = <0x80000000 0x00000000 0x20000000>;
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};
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arm-pmu {
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compatible = "arm,arm1176-pmu";
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};
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};
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&cpu_thermal {
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coefficients = <(-538) 407000>;
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};
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/* enable thermal sensor with the correct compatible property set */
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&thermal {
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compatible = "brcm,bcm2835-thermal";
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status = "okay";
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};
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