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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
70 lines
1.4 KiB
C
70 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright IBM Corp. 2020
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*
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* Author(s): Alexandra Winter <wintera@linux.ibm.com>
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*
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* Interface for Channel Subsystem Call
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*/
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#ifndef _ASM_S390_CHSC_H
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#define _ASM_S390_CHSC_H
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#include <uapi/asm/chsc.h>
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/**
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* Operation codes for CHSC PNSO:
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* PNSO_OC_NET_BRIDGE_INFO - only addresses that are visible to a bridgeport
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* PNSO_OC_NET_ADDR_INFO - all addresses
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*/
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#define PNSO_OC_NET_BRIDGE_INFO 0
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#define PNSO_OC_NET_ADDR_INFO 3
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/**
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* struct chsc_pnso_naid_l2 - network address information descriptor
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* @nit: Network interface token
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* @addr_lnid: network address and logical network id (VLAN ID)
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*/
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struct chsc_pnso_naid_l2 {
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u64 nit;
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struct { u8 mac[6]; u16 lnid; } addr_lnid;
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} __packed;
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struct chsc_pnso_resume_token {
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u64 t1;
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u64 t2;
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} __packed;
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struct chsc_pnso_naihdr {
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struct chsc_pnso_resume_token resume_token;
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u32:32;
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u32 instance;
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u32:24;
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u8 naids;
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u32 reserved[3];
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} __packed;
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struct chsc_pnso_area {
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struct chsc_header request;
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u8:2;
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u8 m:1;
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u8:5;
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u8:2;
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u8 ssid:2;
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u8 fmt:4;
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u16 sch;
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u8:8;
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u8 cssid;
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u16:16;
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u8 oc;
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u32:24;
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struct chsc_pnso_resume_token resume_token;
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u32 n:1;
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u32:31;
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u32 reserved[3];
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struct chsc_header response;
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u32:32;
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struct chsc_pnso_naihdr naihdr;
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struct chsc_pnso_naid_l2 entries[];
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} __packed __aligned(PAGE_SIZE);
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#endif /* _ASM_S390_CHSC_H */
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