2021-06-12 08:10:41 +00:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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// Copyright 2020 IBM Corp.
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/dts-v1/;
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#include "aspeed-g6.dtsi"
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#include <dt-bindings/gpio/aspeed-gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/leds/leds-pca955x.h>
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/ {
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model = "Everest";
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compatible = "ibm,everest-bmc", "aspeed,ast2600";
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aliases {
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i2c100 = &cfam0_i2c0;
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i2c101 = &cfam0_i2c1;
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i2c110 = &cfam0_i2c10;
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i2c111 = &cfam0_i2c11;
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i2c112 = &cfam0_i2c12;
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i2c113 = &cfam0_i2c13;
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i2c114 = &cfam0_i2c14;
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i2c115 = &cfam0_i2c15;
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i2c202 = &cfam1_i2c2;
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i2c203 = &cfam1_i2c3;
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i2c210 = &cfam1_i2c10;
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i2c211 = &cfam1_i2c11;
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i2c214 = &cfam1_i2c14;
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i2c215 = &cfam1_i2c15;
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i2c216 = &cfam1_i2c16;
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i2c217 = &cfam1_i2c17;
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i2c300 = &cfam2_i2c0;
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i2c301 = &cfam2_i2c1;
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i2c310 = &cfam2_i2c10;
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i2c311 = &cfam2_i2c11;
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i2c312 = &cfam2_i2c12;
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i2c313 = &cfam2_i2c13;
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i2c314 = &cfam2_i2c14;
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i2c315 = &cfam2_i2c15;
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i2c402 = &cfam3_i2c2;
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i2c403 = &cfam3_i2c3;
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i2c410 = &cfam3_i2c10;
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i2c411 = &cfam3_i2c11;
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i2c414 = &cfam3_i2c14;
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i2c415 = &cfam3_i2c15;
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i2c416 = &cfam3_i2c16;
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i2c417 = &cfam3_i2c17;
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2021-07-12 19:01:19 +00:00
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i2c500 = &cfam4_i2c0;
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i2c501 = &cfam4_i2c1;
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i2c510 = &cfam4_i2c10;
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i2c511 = &cfam4_i2c11;
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i2c512 = &cfam4_i2c12;
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i2c513 = &cfam4_i2c13;
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i2c514 = &cfam4_i2c14;
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i2c515 = &cfam4_i2c15;
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i2c602 = &cfam5_i2c2;
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i2c603 = &cfam5_i2c3;
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i2c610 = &cfam5_i2c10;
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i2c611 = &cfam5_i2c11;
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i2c614 = &cfam5_i2c14;
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i2c615 = &cfam5_i2c15;
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i2c616 = &cfam5_i2c16;
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i2c617 = &cfam5_i2c17;
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i2c700 = &cfam6_i2c0;
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i2c701 = &cfam6_i2c1;
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i2c710 = &cfam6_i2c10;
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i2c711 = &cfam6_i2c11;
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i2c712 = &cfam6_i2c12;
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i2c713 = &cfam6_i2c13;
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i2c714 = &cfam6_i2c14;
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i2c715 = &cfam6_i2c15;
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i2c802 = &cfam7_i2c2;
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i2c803 = &cfam7_i2c3;
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i2c810 = &cfam7_i2c10;
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i2c811 = &cfam7_i2c11;
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i2c814 = &cfam7_i2c14;
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i2c815 = &cfam7_i2c15;
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i2c816 = &cfam7_i2c16;
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i2c817 = &cfam7_i2c17;
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i2c16 = &i2c4mux0chn0;
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i2c17 = &i2c4mux0chn1;
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i2c18 = &i2c4mux0chn2;
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i2c19 = &i2c5mux0chn0;
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i2c20 = &i2c5mux0chn1;
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i2c21 = &i2c5mux0chn2;
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i2c22 = &i2c5mux0chn3;
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i2c23 = &i2c6mux0chn0;
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i2c24 = &i2c6mux0chn1;
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i2c25 = &i2c6mux0chn2;
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i2c26 = &i2c6mux0chn3;
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i2c27 = &i2c14mux0chn0;
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i2c28 = &i2c14mux0chn1;
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i2c29 = &i2c14mux0chn2;
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i2c30 = &i2c14mux0chn3;
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i2c31 = &i2c14mux1chn0;
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i2c32 = &i2c14mux1chn1;
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i2c33 = &i2c14mux1chn2;
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i2c34 = &i2c14mux1chn3;
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2021-06-12 08:10:41 +00:00
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serial4 = &uart5;
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spi10 = &cfam0_spi0;
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spi11 = &cfam0_spi1;
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spi12 = &cfam0_spi2;
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spi13 = &cfam0_spi3;
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spi20 = &cfam1_spi0;
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spi21 = &cfam1_spi1;
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spi22 = &cfam1_spi2;
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spi23 = &cfam1_spi3;
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spi30 = &cfam2_spi0;
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spi31 = &cfam2_spi1;
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spi32 = &cfam2_spi2;
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spi33 = &cfam2_spi3;
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spi40 = &cfam3_spi0;
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spi41 = &cfam3_spi1;
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spi42 = &cfam3_spi2;
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spi43 = &cfam3_spi3;
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2021-07-12 19:01:19 +00:00
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spi50 = &cfam4_spi0;
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spi51 = &cfam4_spi1;
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spi52 = &cfam4_spi2;
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spi53 = &cfam4_spi3;
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spi60 = &cfam5_spi0;
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spi61 = &cfam5_spi1;
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spi62 = &cfam5_spi2;
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spi63 = &cfam5_spi3;
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spi70 = &cfam6_spi0;
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spi71 = &cfam6_spi1;
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spi72 = &cfam6_spi2;
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spi73 = &cfam6_spi3;
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spi80 = &cfam7_spi0;
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spi81 = &cfam7_spi1;
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spi82 = &cfam7_spi2;
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spi83 = &cfam7_spi3;
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2021-06-12 08:10:41 +00:00
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};
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chosen {
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stdout-path = &uart5;
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bootargs = "console=ttyS4,115200n8";
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x40000000>;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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/* LPC FW cycle bridge region requires natural alignment */
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flash_memory: region@b8000000 {
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no-map;
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reg = <0xb8000000 0x04000000>; /* 64M */
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};
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/* 48MB region from the end of flash to start of vga memory */
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ramoops@bc000000 {
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compatible = "ramoops";
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reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */
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record-size = <0x8000>;
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console-size = <0x8000>;
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pmsg-size = <0x8000>;
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max-reason = <3>; /* KMSG_DUMP_EMERG */
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};
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/* VGA region is dictated by hardware strapping */
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vga_memory: region@bf000000 {
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no-map;
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compatible = "shared-dma-pool";
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reg = <0xbf000000 0x01000000>; /* 16M */
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};
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};
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2021-07-12 19:01:19 +00:00
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <1000>;
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fan0-presence {
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label = "fan0-presence";
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gpios = <&pca0 15 GPIO_ACTIVE_LOW>;
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linux,code = <15>;
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};
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fan1-presence {
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label = "fan1-presence";
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gpios = <&pca0 14 GPIO_ACTIVE_LOW>;
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linux,code = <14>;
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};
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fan2-presence {
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label = "fan2-presence";
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gpios = <&pca0 13 GPIO_ACTIVE_LOW>;
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linux,code = <13>;
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};
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fan3-presence {
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label = "fan3-presence";
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gpios = <&pca0 12 GPIO_ACTIVE_LOW>;
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linux,code = <12>;
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};
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};
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};
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&gpio0 {
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gpio-line-names =
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/*A0-A7*/ "","","","","","","","",
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/*B0-B7*/ "USERSPACE_RSTIND_BUFF","","","","","","","",
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/*C0-C7*/ "","","","","","","","",
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/*D0-D7*/ "","","","","","","","",
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/*E0-E7*/ "","","","","","","","",
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/*F0-F7*/ "PIN_HOLE_RESET_IN_N","","",
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"PIN_HOLE_RESET_OUT_N","","","","",
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/*G0-G7*/ "","","","","","","","",
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/*H0-H7*/ "","","","","","","","",
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/*I0-I7*/ "","","","","","","","",
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/*J0-J7*/ "","","","","","","","",
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/*K0-K7*/ "","","","","","","","",
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/*L0-L7*/ "","","","","","","","",
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/*M0-M7*/ "","","","","","","","",
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/*N0-N7*/ "","","","","","","","",
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/*O0-O7*/ "","","","","","","","",
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/*P0-P7*/ "","","","","","","","",
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/*Q0-Q7*/ "","","","","","","","",
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/*R0-R7*/ "","","","","","I2C_FLASH_MICRO_N","","",
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/*S0-S7*/ "","","","","","","","",
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/*T0-T7*/ "","","","","","","","",
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/*U0-U7*/ "","","","","","","","",
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/*V0-V7*/ "","BMC_3RESTART_ATTEMPT_P","","","","","","",
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/*W0-W7*/ "","","","","","","","",
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/*X0-X7*/ "","","","","","","","",
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/*Y0-Y7*/ "","","","","","","","",
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/*Z0-Z7*/ "","","","","","","","";
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};
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&i2c0 {
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status = "okay";
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eeprom@51 {
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compatible = "atmel,24c64";
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reg = <0x51>;
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};
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pca1: pca9552@62 {
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compatible = "nxp,pca9552";
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reg = <0x62>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names =
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"presence-ps0",
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"presence-ps1",
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"presence-ps2",
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"presence-ps3",
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"presence-pdb",
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"presence-tpm",
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"", "",
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"presence-cp0",
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"presence-cp1",
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"presence-cp2",
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"presence-cp3",
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"presence-dasd",
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"presence-lcd-op",
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"presence-base-op",
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"";
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gpio@0 {
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reg = <0>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@01 {
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reg = <1>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@2 {
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reg = <2>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@3 {
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reg = <3>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@4 {
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reg = <4>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@5 {
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reg = <5>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@6 {
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reg = <6>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@7 {
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reg = <7>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@8 {
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reg = <8>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@9 {
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reg = <9>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@10 {
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reg = <10>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@11 {
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reg = <11>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@12 {
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reg = <12>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@13 {
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reg = <13>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@14 {
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reg = <14>;
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type = <PCA955X_TYPE_GPIO>;
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};
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gpio@15 {
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reg = <15>;
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type = <PCA955X_TYPE_GPIO>;
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};
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};
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|
|
};
|
|
|
|
|
|
|
|
&i2c1 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
pca2: pca9552@61 {
|
|
|
|
compatible = "nxp,pca9552";
|
|
|
|
reg = <0x61>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
gpio-line-names =
|
|
|
|
"presence-cable-card1",
|
|
|
|
"presence-cable-card2",
|
|
|
|
"presence-cable-card3",
|
|
|
|
"presence-cable-card4",
|
|
|
|
"presence-cable-card5",
|
|
|
|
"expander-cable-card1",
|
|
|
|
"expander-cable-card2",
|
|
|
|
"expander-cable-card3",
|
|
|
|
"expander-cable-card4",
|
|
|
|
"expander-cable-card5";
|
|
|
|
|
|
|
|
gpio@0 {
|
|
|
|
reg = <0>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@1 {
|
|
|
|
reg = <1>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@2 {
|
|
|
|
reg = <2>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@3 {
|
|
|
|
reg = <3>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@4 {
|
|
|
|
reg = <4>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@5 {
|
|
|
|
reg = <5>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@6 {
|
|
|
|
reg = <6>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@7 {
|
|
|
|
reg = <7>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@8 {
|
|
|
|
reg = <8>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@9 {
|
|
|
|
reg = <9>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
pca3: pca9552@62 {
|
|
|
|
compatible = "nxp,pca9552";
|
|
|
|
reg = <0x62>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
gpio-line-names =
|
|
|
|
"presence-cable-card6",
|
|
|
|
"presence-cable-card7",
|
|
|
|
"presence-cable-card8",
|
|
|
|
"presence-cable-card9",
|
|
|
|
"presence-cable-card10",
|
|
|
|
"presence-cable-card11",
|
|
|
|
"expander-cable-card6",
|
|
|
|
"expander-cable-card7",
|
|
|
|
"expander-cable-card8",
|
|
|
|
"expander-cable-card9",
|
|
|
|
"expander-cable-card10",
|
|
|
|
"expander-cable-card11";
|
|
|
|
|
|
|
|
gpio@0 {
|
|
|
|
reg = <0>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@1 {
|
|
|
|
reg = <1>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@2 {
|
|
|
|
reg = <2>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@3 {
|
|
|
|
reg = <3>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@4 {
|
|
|
|
reg = <4>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@5 {
|
|
|
|
reg = <5>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@6 {
|
|
|
|
reg = <6>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@7 {
|
|
|
|
reg = <7>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@8 {
|
|
|
|
reg = <8>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@9 {
|
|
|
|
reg = <9>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@10 {
|
|
|
|
reg = <10>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@11 {
|
|
|
|
reg = <11>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c2 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c3 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
eeprom@54 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x54>;
|
|
|
|
};
|
|
|
|
|
|
|
|
power-supply@68 {
|
|
|
|
compatible = "ibm,cffps";
|
|
|
|
reg = <0x68>;
|
|
|
|
};
|
|
|
|
|
|
|
|
power-supply@69 {
|
|
|
|
compatible = "ibm,cffps";
|
|
|
|
reg = <0x69>;
|
|
|
|
};
|
|
|
|
|
|
|
|
power-supply@6a {
|
|
|
|
compatible = "ibm,cffps";
|
|
|
|
reg = <0x6a>;
|
|
|
|
};
|
|
|
|
|
|
|
|
power-supply@6b {
|
|
|
|
compatible = "ibm,cffps";
|
|
|
|
reg = <0x6b>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c4 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
i2c-switch@70 {
|
|
|
|
compatible = "nxp,pca9546";
|
|
|
|
reg = <0x70>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "okay";
|
|
|
|
i2c-mux-idle-disconnect;
|
|
|
|
|
|
|
|
i2c4mux0chn0: i2c@0 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <0>;
|
|
|
|
eeprom@52 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x52>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c4mux0chn1: i2c@1 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <1>;
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c4mux0chn2: i2c@2 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <2>;
|
|
|
|
eeprom@51 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c5 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
i2c-switch@70 {
|
|
|
|
compatible = "nxp,pca9546";
|
|
|
|
reg = <0x70>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "okay";
|
|
|
|
i2c-mux-idle-disconnect;
|
|
|
|
|
|
|
|
i2c5mux0chn0: i2c@0 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <0>;
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c5mux0chn1: i2c@1 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <1>;
|
|
|
|
eeprom@51 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c5mux0chn2: i2c@2 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <2>;
|
|
|
|
eeprom@52 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x52>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c5mux0chn3: i2c@3 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <3>;
|
|
|
|
eeprom@53 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x53>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c6 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
i2c-switch@70 {
|
|
|
|
compatible = "nxp,pca9546";
|
|
|
|
reg = <0x70>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "okay";
|
|
|
|
i2c-mux-idle-disconnect;
|
|
|
|
|
|
|
|
i2c6mux0chn0: i2c@0 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <0>;
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c6mux0chn1: i2c@1 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <1>;
|
|
|
|
eeprom@52 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x52>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c6mux0chn2: i2c@2 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <2>;
|
|
|
|
eeprom@53 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x53>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c6mux0chn3: i2c@3 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <3>;
|
|
|
|
eeprom@51 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c7 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c8 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
ucd90320@11 {
|
|
|
|
compatible = "ti,ucd90320";
|
|
|
|
reg = <0x11>;
|
|
|
|
};
|
|
|
|
|
|
|
|
rtc@32 {
|
|
|
|
compatible = "epson,rx8900";
|
|
|
|
reg = <0x32>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@51 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c9 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@51 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@53 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x53>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@52 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x52>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c10 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
eeprom@51 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@53 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x53>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@52 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x52>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c11 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
eeprom@51 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@53 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x53>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@52 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x52>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c12 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c13 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
eeprom@51 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@53 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x53>;
|
|
|
|
};
|
|
|
|
|
|
|
|
eeprom@52 {
|
|
|
|
compatible = "atmel,24c128";
|
|
|
|
reg = <0x52>;
|
|
|
|
};
|
2021-06-12 08:10:41 +00:00
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
&i2c14 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
i2c-switch@70 {
|
|
|
|
compatible = "nxp,pca9546";
|
|
|
|
reg = <0x70>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "okay";
|
|
|
|
i2c-mux-idle-disconnect;
|
|
|
|
|
|
|
|
i2c14mux0chn0: i2c@0 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <0>;
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c64";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c14mux0chn1: i2c@1 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <1>;
|
|
|
|
eeprom@51 {
|
|
|
|
compatible = "atmel,24c32";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c14mux0chn2: i2c@2 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <2>;
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c32";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c14mux0chn3: i2c@3 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <3>;
|
|
|
|
|
|
|
|
max31785@52 {
|
|
|
|
compatible = "maxim,max31785a";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <0x52>;
|
|
|
|
|
|
|
|
fan@0 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <0>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
fan@1 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <1>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
fan@2 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <2>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
fan@3 {
|
|
|
|
compatible = "pmbus-fan";
|
|
|
|
reg = <3>;
|
|
|
|
tach-pulses = <2>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
pca0: pca9552@61 {
|
|
|
|
compatible = "nxp,pca9552";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <0x61>;
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
gpio-line-names =
|
|
|
|
"","","","",
|
|
|
|
"","","","",
|
|
|
|
"","","","",
|
|
|
|
"presence-fan3",
|
|
|
|
"presence-fan2",
|
|
|
|
"presence-fan1",
|
|
|
|
"presence-fan0";
|
|
|
|
|
|
|
|
gpio@0 {
|
|
|
|
reg = <0>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@1 {
|
|
|
|
reg = <1>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@2 {
|
|
|
|
reg = <2>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@3 {
|
|
|
|
reg = <3>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@4 {
|
|
|
|
reg = <4>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@5 {
|
|
|
|
reg = <5>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@6 {
|
|
|
|
reg = <6>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@7 {
|
|
|
|
reg = <7>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@8 {
|
|
|
|
reg = <8>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@9 {
|
|
|
|
reg = <9>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@10 {
|
|
|
|
reg = <10>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@11 {
|
|
|
|
reg = <11>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@12 {
|
|
|
|
reg = <12>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@13 {
|
|
|
|
reg = <13>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@14 {
|
|
|
|
reg = <14>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
|
|
|
|
gpio@15 {
|
|
|
|
reg = <15>;
|
|
|
|
type = <PCA955X_TYPE_GPIO>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c-switch@71 {
|
|
|
|
compatible = "nxp,pca9546";
|
|
|
|
reg = <0x71>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
status = "okay";
|
|
|
|
i2c-mux-idle-disconnect;
|
|
|
|
|
|
|
|
i2c14mux1chn0: i2c@0 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <0>;
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c32";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c14mux1chn1: i2c@1 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <1>;
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c32";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c14mux1chn2: i2c@2 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <2>;
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c32";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c14mux1chn3: i2c@3 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
reg = <3>;
|
|
|
|
eeprom@50 {
|
|
|
|
compatible = "atmel,24c32";
|
|
|
|
reg = <0x50>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c15 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&ehci1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&emmc_controller {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pinctrl_emmc_default {
|
|
|
|
bias-disable;
|
|
|
|
};
|
|
|
|
|
|
|
|
&emmc {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&fsim0 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* CFAM Reset is supposed to be active low but pass1 hardware is wired
|
|
|
|
* active high.
|
|
|
|
*/
|
|
|
|
cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
|
|
|
cfam@0,0 { /* DCM0_C0 */
|
|
|
|
reg = <0 0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
chip-id = <0>;
|
|
|
|
|
|
|
|
scom@1000 {
|
|
|
|
compatible = "ibm,fsi2pib";
|
|
|
|
reg = <0x1000 0x400>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@1800 {
|
|
|
|
compatible = "ibm,fsi-i2c-master";
|
|
|
|
reg = <0x1800 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
cfam0_i2c0: i2c-bus@0 {
|
|
|
|
reg = <0>; /* OMI01 */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam0_i2c1: i2c-bus@1 {
|
|
|
|
reg = <1>; /* OMI23 */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam0_i2c10: i2c-bus@a {
|
|
|
|
reg = <10>; /* OP3A */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam0_i2c11: i2c-bus@b {
|
|
|
|
reg = <11>; /* OP3B */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam0_i2c12: i2c-bus@c {
|
|
|
|
reg = <12>; /* OP4A */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam0_i2c13: i2c-bus@d {
|
|
|
|
reg = <13>; /* OP4B */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam0_i2c14: i2c-bus@e {
|
|
|
|
reg = <14>; /* OP5A */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam0_i2c15: i2c-bus@f {
|
|
|
|
reg = <15>; /* OP5B */
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi2spi@1c00 {
|
|
|
|
compatible = "ibm,fsi2spi";
|
|
|
|
reg = <0x1c00 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
cfam0_spi0: spi@0 {
|
|
|
|
reg = <0x0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam0_spi1: spi@20 {
|
|
|
|
reg = <0x20>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam0_spi2: spi@40 {
|
|
|
|
reg = <0x40>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam0_spi3: spi@60 {
|
|
|
|
reg = <0x60>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
sbefifo@2400 {
|
|
|
|
compatible = "ibm,p9-sbefifo";
|
|
|
|
reg = <0x2400 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
fsi_occ0: occ {
|
|
|
|
compatible = "ibm,p10-occ";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi_hub0: hub@3400 {
|
|
|
|
compatible = "fsi-master-hub";
|
|
|
|
reg = <0x3400 0x400>;
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&fsi_hub0 {
|
|
|
|
cfam@1,0 { /* DCM0_C1 */
|
|
|
|
reg = <1 0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
chip-id = <1>;
|
|
|
|
|
|
|
|
scom@1000 {
|
|
|
|
compatible = "ibm,fsi2pib";
|
|
|
|
reg = <0x1000 0x400>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@1800 {
|
|
|
|
compatible = "ibm,fsi-i2c-master";
|
|
|
|
reg = <0x1800 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
cfam1_i2c2: i2c-bus@2 {
|
|
|
|
reg = <2>; /* OMI45 */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam1_i2c3: i2c-bus@3 {
|
|
|
|
reg = <3>; /* OMI67 */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam1_i2c10: i2c-bus@a {
|
|
|
|
reg = <10>; /* OP3A */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam1_i2c11: i2c-bus@b {
|
|
|
|
reg = <11>; /* OP3B */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam1_i2c14: i2c-bus@e {
|
|
|
|
reg = <14>; /* OP5A */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam1_i2c15: i2c-bus@f {
|
|
|
|
reg = <15>; /* OP5B */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam1_i2c16: i2c-bus@10 {
|
|
|
|
reg = <16>; /* OP6A */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam1_i2c17: i2c-bus@11 {
|
|
|
|
reg = <17>; /* OP6B */
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi2spi@1c00 {
|
|
|
|
compatible = "ibm,fsi2spi";
|
|
|
|
reg = <0x1c00 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
cfam1_spi0: spi@0 {
|
|
|
|
reg = <0x0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam1_spi1: spi@20 {
|
|
|
|
reg = <0x20>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam1_spi2: spi@40 {
|
|
|
|
reg = <0x40>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam1_spi3: spi@60 {
|
|
|
|
reg = <0x60>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
sbefifo@2400 {
|
|
|
|
compatible = "ibm,p9-sbefifo";
|
|
|
|
reg = <0x2400 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
fsi_occ1: occ {
|
|
|
|
compatible = "ibm,p10-occ";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi_hub1: hub@3400 {
|
|
|
|
compatible = "fsi-master-hub";
|
|
|
|
reg = <0x3400 0x400>;
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
no-scan-on-init;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam@2,0 { /* DCM1_C0 */
|
|
|
|
reg = <2 0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
chip-id = <2>;
|
|
|
|
|
|
|
|
scom@1000 {
|
|
|
|
compatible = "ibm,fsi2pib";
|
|
|
|
reg = <0x1000 0x400>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@1800 {
|
|
|
|
compatible = "ibm,fsi-i2c-master";
|
|
|
|
reg = <0x1800 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
cfam2_i2c0: i2c-bus@0 {
|
|
|
|
reg = <0>; /* OM01 */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam2_i2c1: i2c-bus@1 {
|
|
|
|
reg = <1>; /* OM23 */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam2_i2c10: i2c-bus@a {
|
|
|
|
reg = <10>; /* OP3A */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam2_i2c11: i2c-bus@b {
|
|
|
|
reg = <11>; /* OP3B */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam2_i2c12: i2c-bus@c {
|
|
|
|
reg = <12>; /* OP4A */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam2_i2c13: i2c-bus@d {
|
|
|
|
reg = <13>; /* OP4B */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam2_i2c14: i2c-bus@e {
|
|
|
|
reg = <14>; /* OP5A */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam2_i2c15: i2c-bus@f {
|
|
|
|
reg = <15>; /* OP5B */
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi2spi@1c00 {
|
|
|
|
compatible = "ibm,fsi2spi";
|
|
|
|
reg = <0x1c00 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
cfam2_spi0: spi@0 {
|
|
|
|
reg = <0x0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam2_spi1: spi@20 {
|
|
|
|
reg = <0x20>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam2_spi2: spi@40 {
|
|
|
|
reg = <0x40>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam2_spi3: spi@60 {
|
|
|
|
reg = <0x60>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
sbefifo@2400 {
|
|
|
|
compatible = "ibm,p9-sbefifo";
|
|
|
|
reg = <0x2400 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
fsi_occ2: occ {
|
|
|
|
compatible = "ibm,p10-occ";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi_hub2: hub@3400 {
|
|
|
|
compatible = "fsi-master-hub";
|
|
|
|
reg = <0x3400 0x400>;
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
no-scan-on-init;
|
|
|
|
};
|
|
|
|
};
|
2021-06-12 08:10:41 +00:00
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam@3,0 { /* DCM1_C1 */
|
|
|
|
reg = <3 0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
chip-id = <3>;
|
2021-06-12 08:10:41 +00:00
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
scom@1000 {
|
|
|
|
compatible = "ibm,fsi2pib";
|
|
|
|
reg = <0x1000 0x400>;
|
|
|
|
};
|
2021-06-12 08:10:41 +00:00
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
i2c@1800 {
|
|
|
|
compatible = "ibm,fsi-i2c-master";
|
|
|
|
reg = <0x1800 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
2021-06-12 08:10:41 +00:00
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam3_i2c2: i2c-bus@2 {
|
|
|
|
reg = <2>; /* OM45 */
|
|
|
|
};
|
2021-06-12 08:10:41 +00:00
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam3_i2c3: i2c-bus@3 {
|
|
|
|
reg = <3>; /* OM67 */
|
|
|
|
};
|
2021-06-12 08:10:41 +00:00
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam3_i2c10: i2c-bus@a {
|
|
|
|
reg = <10>; /* OP3A */
|
|
|
|
};
|
2021-06-12 08:10:41 +00:00
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam3_i2c11: i2c-bus@b {
|
|
|
|
reg = <11>; /* OP3B */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam3_i2c14: i2c-bus@e {
|
|
|
|
reg = <14>; /* OP5A */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam3_i2c15: i2c-bus@f {
|
|
|
|
reg = <15>; /* OP5B */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam3_i2c16: i2c-bus@10 {
|
|
|
|
reg = <16>; /* OP6A */
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam3_i2c17: i2c-bus@11 {
|
|
|
|
reg = <17>; /* OP6B */
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi2spi@1c00 {
|
|
|
|
compatible = "ibm,fsi2spi";
|
|
|
|
reg = <0x1c00 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
cfam3_spi0: spi@0 {
|
|
|
|
reg = <0x0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam3_spi1: spi@20 {
|
|
|
|
reg = <0x20>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam3_spi2: spi@40 {
|
|
|
|
reg = <0x40>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam3_spi3: spi@60 {
|
|
|
|
reg = <0x60>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
sbefifo@2400 {
|
|
|
|
compatible = "ibm,p9-sbefifo";
|
|
|
|
reg = <0x2400 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
fsi_occ3: occ {
|
|
|
|
compatible = "ibm,p10-occ";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi_hub3: hub@3400 {
|
|
|
|
compatible = "fsi-master-hub";
|
|
|
|
reg = <0x3400 0x400>;
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
no-scan-on-init;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
cfam@4,0 { /* DCM2_C0 */
|
|
|
|
reg = <4 0>;
|
2021-06-12 08:10:41 +00:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
2021-07-12 19:01:19 +00:00
|
|
|
chip-id = <4>;
|
2021-06-12 08:10:41 +00:00
|
|
|
|
|
|
|
scom@1000 {
|
|
|
|
compatible = "ibm,fsi2pib";
|
|
|
|
reg = <0x1000 0x400>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@1800 {
|
|
|
|
compatible = "ibm,fsi-i2c-master";
|
|
|
|
reg = <0x1800 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_i2c0: i2c-bus@0 {
|
|
|
|
reg = <0>; /* OM01 */
|
2021-06-12 08:10:41 +00:00
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_i2c1: i2c-bus@1 {
|
|
|
|
reg = <1>; /* OM23 */
|
2021-06-12 08:10:41 +00:00
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_i2c10: i2c-bus@a {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <10>; /* OP3A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_i2c11: i2c-bus@b {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <11>; /* OP3B */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_i2c12: i2c-bus@c {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <12>; /* OP4A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_i2c13: i2c-bus@d {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <13>; /* OP4B */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_i2c14: i2c-bus@e {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <14>; /* OP5A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_i2c15: i2c-bus@f {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <15>; /* OP5B */
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi2spi@1c00 {
|
|
|
|
compatible = "ibm,fsi2spi";
|
|
|
|
reg = <0x1c00 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_spi0: spi@0 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_spi1: spi@20 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x20>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_spi2: spi@40 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x40>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam4_spi3: spi@60 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x60>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
sbefifo@2400 {
|
|
|
|
compatible = "ibm,p9-sbefifo";
|
|
|
|
reg = <0x2400 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
fsi_occ4: occ {
|
2021-06-12 08:10:41 +00:00
|
|
|
compatible = "ibm,p10-occ";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
fsi_hub4: hub@3400 {
|
2021-06-12 08:10:41 +00:00
|
|
|
compatible = "fsi-master-hub";
|
|
|
|
reg = <0x3400 0x400>;
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <0>;
|
2021-07-12 19:01:19 +00:00
|
|
|
|
|
|
|
no-scan-on-init;
|
2021-06-12 08:10:41 +00:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam@5,0 { /* DCM2_C1 */
|
|
|
|
reg = <5 0>;
|
2021-06-12 08:10:41 +00:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
2021-07-12 19:01:19 +00:00
|
|
|
chip-id = <5>;
|
2021-06-12 08:10:41 +00:00
|
|
|
|
|
|
|
scom@1000 {
|
|
|
|
compatible = "ibm,fsi2pib";
|
|
|
|
reg = <0x1000 0x400>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@1800 {
|
|
|
|
compatible = "ibm,fsi-i2c-master";
|
|
|
|
reg = <0x1800 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_i2c2: i2c-bus@2 {
|
|
|
|
reg = <2>; /* OM45 */
|
2021-06-12 08:10:41 +00:00
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_i2c3: i2c-bus@3 {
|
|
|
|
reg = <3>; /* OM67 */
|
2021-06-12 08:10:41 +00:00
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_i2c10: i2c-bus@a {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <10>; /* OP3A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_i2c11: i2c-bus@b {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <11>; /* OP3B */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_i2c14: i2c-bus@e {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <14>; /* OP5A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_i2c15: i2c-bus@f {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <15>; /* OP5B */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_i2c16: i2c-bus@10 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <16>; /* OP6A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_i2c17: i2c-bus@11 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <17>; /* OP6B */
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi2spi@1c00 {
|
|
|
|
compatible = "ibm,fsi2spi";
|
|
|
|
reg = <0x1c00 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_spi0: spi@0 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_spi1: spi@20 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x20>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_spi2: spi@40 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x40>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam5_spi3: spi@60 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x60>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
sbefifo@2400 {
|
|
|
|
compatible = "ibm,p9-sbefifo";
|
|
|
|
reg = <0x2400 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
fsi_occ5: occ {
|
2021-06-12 08:10:41 +00:00
|
|
|
compatible = "ibm,p10-occ";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
fsi_hub5: hub@3400 {
|
2021-06-12 08:10:41 +00:00
|
|
|
compatible = "fsi-master-hub";
|
|
|
|
reg = <0x3400 0x400>;
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
no-scan-on-init;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam@6,0 { /* DCM3_C0 */
|
|
|
|
reg = <6 0>;
|
2021-06-12 08:10:41 +00:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
2021-07-12 19:01:19 +00:00
|
|
|
chip-id = <6>;
|
2021-06-12 08:10:41 +00:00
|
|
|
|
|
|
|
scom@1000 {
|
|
|
|
compatible = "ibm,fsi2pib";
|
|
|
|
reg = <0x1000 0x400>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@1800 {
|
|
|
|
compatible = "ibm,fsi-i2c-master";
|
|
|
|
reg = <0x1800 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_i2c0: i2c-bus@0 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0>; /* OM01 */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_i2c1: i2c-bus@1 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <1>; /* OM23 */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_i2c10: i2c-bus@a {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <10>; /* OP3A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_i2c11: i2c-bus@b {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <11>; /* OP3B */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_i2c12: i2c-bus@c {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <12>; /* OP4A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_i2c13: i2c-bus@d {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <13>; /* OP4B */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_i2c14: i2c-bus@e {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <14>; /* OP5A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_i2c15: i2c-bus@f {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <15>; /* OP5B */
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi2spi@1c00 {
|
|
|
|
compatible = "ibm,fsi2spi";
|
|
|
|
reg = <0x1c00 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_spi0: spi@0 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_spi1: spi@20 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x20>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_spi2: spi@40 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x40>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam6_spi3: spi@60 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x60>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
sbefifo@2400 {
|
|
|
|
compatible = "ibm,p9-sbefifo";
|
|
|
|
reg = <0x2400 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
fsi_occ6: occ {
|
2021-06-12 08:10:41 +00:00
|
|
|
compatible = "ibm,p10-occ";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
fsi_hub6: hub@3400 {
|
2021-06-12 08:10:41 +00:00
|
|
|
compatible = "fsi-master-hub";
|
|
|
|
reg = <0x3400 0x400>;
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
no-scan-on-init;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam@7,0 { /* DCM3_C1 */
|
|
|
|
reg = <7 0>;
|
2021-06-12 08:10:41 +00:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
2021-07-12 19:01:19 +00:00
|
|
|
chip-id = <7>;
|
2021-06-12 08:10:41 +00:00
|
|
|
|
|
|
|
scom@1000 {
|
|
|
|
compatible = "ibm,fsi2pib";
|
|
|
|
reg = <0x1000 0x400>;
|
|
|
|
};
|
|
|
|
|
|
|
|
i2c@1800 {
|
|
|
|
compatible = "ibm,fsi-i2c-master";
|
|
|
|
reg = <0x1800 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_i2c2: i2c-bus@2 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <2>; /* OM45 */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_i2c3: i2c-bus@3 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <3>; /* OM67 */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_i2c10: i2c-bus@a {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <10>; /* OP3A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_i2c11: i2c-bus@b {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <11>; /* OP3B */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_i2c14: i2c-bus@e {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <14>; /* OP5A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_i2c15: i2c-bus@f {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <15>; /* OP5B */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_i2c16: i2c-bus@10 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <16>; /* OP6A */
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_i2c17: i2c-bus@11 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <17>; /* OP6B */
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
fsi2spi@1c00 {
|
|
|
|
compatible = "ibm,fsi2spi";
|
|
|
|
reg = <0x1c00 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_spi0: spi@0 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x0>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_spi1: spi@20 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x20>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_spi2: spi@40 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x40>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
cfam7_spi3: spi@60 {
|
2021-06-12 08:10:41 +00:00
|
|
|
reg = <0x60>;
|
|
|
|
compatible = "ibm,fsi2spi-restricted";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
eeprom@0 {
|
|
|
|
at25,byte-len = <0x80000>;
|
|
|
|
at25,addr-mode = <4>;
|
|
|
|
at25,page-size = <256>;
|
|
|
|
|
|
|
|
compatible = "atmel,at25";
|
|
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
sbefifo@2400 {
|
|
|
|
compatible = "ibm,p9-sbefifo";
|
|
|
|
reg = <0x2400 0x400>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
fsi_occ7: occ {
|
2021-06-12 08:10:41 +00:00
|
|
|
compatible = "ibm,p10-occ";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
fsi_hub7: hub@3400 {
|
2021-06-12 08:10:41 +00:00
|
|
|
compatible = "fsi-master-hub";
|
|
|
|
reg = <0x3400 0x400>;
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
no-scan-on-init;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Legacy OCC numbering (to get rid of when userspace is fixed) */
|
|
|
|
&fsi_occ0 {
|
|
|
|
reg = <1>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&fsi_occ1 {
|
|
|
|
reg = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&fsi_occ2 {
|
|
|
|
reg = <3>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&fsi_occ3 {
|
|
|
|
reg = <4>;
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
&fsi_occ4 {
|
|
|
|
reg = <5>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&fsi_occ5 {
|
|
|
|
reg = <6>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&fsi_occ6 {
|
|
|
|
reg = <7>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&fsi_occ7 {
|
|
|
|
reg = <8>;
|
|
|
|
};
|
|
|
|
|
2021-06-12 08:10:41 +00:00
|
|
|
&ibt {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&vuart1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&vuart2 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&lpc_ctrl {
|
|
|
|
status = "okay";
|
|
|
|
memory-region = <&flash_memory>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&kcs4 {
|
|
|
|
compatible = "openbmc,mctp-lpc";
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&mac2 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_rmii3_default>;
|
|
|
|
clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,
|
|
|
|
<&syscon ASPEED_CLK_MAC3RCLK>;
|
|
|
|
clock-names = "MACCLK", "RCLK";
|
|
|
|
use-ncsi;
|
|
|
|
};
|
|
|
|
|
|
|
|
&mac3 {
|
|
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_rmii4_default>;
|
|
|
|
clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>,
|
|
|
|
<&syscon ASPEED_CLK_MAC4RCLK>;
|
|
|
|
clock-names = "MACCLK", "RCLK";
|
|
|
|
use-ncsi;
|
|
|
|
};
|
|
|
|
|
2021-07-12 19:01:19 +00:00
|
|
|
&wdt1 {
|
|
|
|
aspeed,reset-type = "none";
|
|
|
|
aspeed,external-signal;
|
|
|
|
aspeed,ext-push-pull;
|
|
|
|
aspeed,ext-active-high;
|
|
|
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_wdtrst1_default>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&wdt2 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2021-06-12 08:10:41 +00:00
|
|
|
&xdma {
|
|
|
|
status = "okay";
|
|
|
|
memory-region = <&vga_memory>;
|
|
|
|
};
|