Brooklyn/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts

// redo: ovmerge -c spi1-1cs-overlay.dts,cs0_pin=18,cs0_spidev=false mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi1-0,interrupt=24

// Device tree overlay for https://www.seeedstudio.com/2-Channel-CAN-BUS-FD-Shield-for-Raspberry-Pi-p-4072.html

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/bcm2835.h>

/ {
	compatible = "brcm,bcm2835";
	fragment@0 {
		target = <&gpio>;
		__overlay__ {
			spi1_pins: spi1_pins {
				brcm,pins = <19 20 21>;
				brcm,function = <3>;
			};
			spi1_cs_pins: spi1_cs_pins {
				brcm,pins = <18>;
				brcm,function = <1>;
			};
		};
	};
	fragment@1 {
		target = <&spi1>;
		__overlay__ {
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
			cs-gpios = <&gpio 18 1>;
			status = "okay";
			spidev@0 {
				compatible = "spidev";
				reg = <0>;
				#address-cells = <1>;
				#size-cells = <0>;
				spi-max-frequency = <125000000>;
				status = "disabled";
			};
		};
	};
	fragment@2 {
		target = <&aux>;
		__overlay__ {
			status = "okay";
		};
	};
	fragment@3 {
		target = <&spidev0>;
		__overlay__ {
			status = "disabled";
		};
	};
	fragment@4 {
		target = <&gpio>;
		__overlay__ {
			mcp251xfd_pins: mcp251xfd_spi0_0_pins {
				brcm,pins = <25>;
				brcm,function = <BCM2835_FSEL_GPIO_IN>;
			};
		};
	};
	fragment@5 {
		target-path = "/clocks";
		__overlay__ {
			clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
				#clock-cells = <0>;
				compatible = "fixed-clock";
				clock-frequency = <40000000>;
			};
		};
	};
	fragment@6 {
		target = <&spi0>;
		__overlay__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;
			mcp251xfd@0 {
				compatible = "microchip,mcp251xfd";
				reg = <0>;
				pinctrl-names = "default";
				pinctrl-0 = <&mcp251xfd_pins>;
				spi-max-frequency = <20000000>;
				interrupt-parent = <&gpio>;
				interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
				clocks = <&clk_mcp251xfd_osc>;
			};
		};
	};
	fragment@7 {
		target-path = "spi1/spidev@0";
		__overlay__ {
			status = "disabled";
		};
	};
	fragment@8 {
		target = <&gpio>;
		__overlay__ {
			mcp251xfd_pins_1: mcp251xfd_spi1_0_pins {
				brcm,pins = <24>;
				brcm,function = <BCM2835_FSEL_GPIO_IN>;
			};
		};
	};
	fragment@9 {
		target-path = "/clocks";
		__overlay__ {
			clk_mcp251xfd_osc_1: mcp251xfd-spi1-0-osc {
				#clock-cells = <0>;
				compatible = "fixed-clock";
				clock-frequency = <40000000>;
			};
		};
	};
	fragment@10 {
		target = <&spi1>;
		__overlay__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;
			mcp251xfd@0 {
				compatible = "microchip,mcp251xfd";
				reg = <0>;
				pinctrl-names = "default";
				pinctrl-0 = <&mcp251xfd_pins_1>;
				spi-max-frequency = <20000000>;
				interrupt-parent = <&gpio>;
				interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
				clocks = <&clk_mcp251xfd_osc_1>;
			};
		};
	};
};