forked from Qortal/Brooklyn
a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
76 lines
1.5 KiB
YAML
76 lines
1.5 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spmi/spmi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: System Power Management Interface (SPMI) Controller
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maintainers:
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- Stephen Boyd <sboyd@kernel.org>
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description: |
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The System Power Management (SPMI) controller is a 2-wire bus defined
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by the MIPI Alliance for power management control to be used on SoC designs.
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SPMI controllers are modelled in device tree using a generic set of
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bindings defined here, plus any bus controller specific properties, if
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needed.
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Each SPMI controller has zero or more child nodes (up to 16 ones), each
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one representing an unique slave at the bus.
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properties:
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$nodename:
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pattern: "^spmi@.*"
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"#address-cells":
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const: 2
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"#size-cells":
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const: 0
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patternProperties:
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"@[0-9a-f]$":
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description: up to 16 child PMIC nodes
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type: object
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properties:
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reg:
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items:
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- minItems: 1
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items:
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- minimum: 0
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maximum: 0xf
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- enum: [ 0 ]
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description:
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0 means user ID address. 1 is reserved for group ID
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address.
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required:
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- reg
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required:
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- reg
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additionalProperties: true
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examples:
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- |
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#include <dt-bindings/spmi/spmi.h>
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spmi@0 {
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reg = <0 0>;
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#address-cells = <2>;
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#size-cells = <0>;
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child@0 {
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reg = <0 SPMI_USID>;
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};
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child@7 {
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reg = <7 SPMI_USID>;
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};
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};
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