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04c1822c0a
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346 lines
7.4 KiB
C
346 lines
7.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* XPower AXP288 PMIC operation region driver
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*
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* Copyright (C) 2014 Intel Corporation. All rights reserved.
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*/
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#include <linux/acpi.h>
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#include <linux/init.h>
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#include <linux/mfd/axp20x.h>
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#include <linux/regmap.h>
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#include <linux/platform_device.h>
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#include <asm/iosf_mbi.h>
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#include "intel_pmic.h"
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#define XPOWER_GPADC_LOW 0x5b
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#define XPOWER_GPI1_CTRL 0x92
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#define GPI1_LDO_MASK GENMASK(2, 0)
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#define GPI1_LDO_ON (3 << 0)
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#define GPI1_LDO_OFF (4 << 0)
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#define AXP288_ADC_TS_CURRENT_ON_OFF_MASK GENMASK(1, 0)
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#define AXP288_ADC_TS_CURRENT_OFF (0 << 0)
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#define AXP288_ADC_TS_CURRENT_ON_WHEN_CHARGING (1 << 0)
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#define AXP288_ADC_TS_CURRENT_ON_ONDEMAND (2 << 0)
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#define AXP288_ADC_TS_CURRENT_ON (3 << 0)
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static struct pmic_table power_table[] = {
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{
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.address = 0x00,
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.reg = 0x13,
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.bit = 0x05,
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}, /* ALD1 */
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{
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.address = 0x04,
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.reg = 0x13,
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.bit = 0x06,
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}, /* ALD2 */
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{
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.address = 0x08,
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.reg = 0x13,
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.bit = 0x07,
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}, /* ALD3 */
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{
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.address = 0x0c,
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.reg = 0x12,
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.bit = 0x03,
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}, /* DLD1 */
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{
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.address = 0x10,
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.reg = 0x12,
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.bit = 0x04,
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}, /* DLD2 */
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{
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.address = 0x14,
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.reg = 0x12,
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.bit = 0x05,
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}, /* DLD3 */
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{
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.address = 0x18,
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.reg = 0x12,
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.bit = 0x06,
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}, /* DLD4 */
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{
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.address = 0x1c,
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.reg = 0x12,
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.bit = 0x00,
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}, /* ELD1 */
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{
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.address = 0x20,
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.reg = 0x12,
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.bit = 0x01,
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}, /* ELD2 */
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{
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.address = 0x24,
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.reg = 0x12,
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.bit = 0x02,
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}, /* ELD3 */
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{
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.address = 0x28,
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.reg = 0x13,
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.bit = 0x02,
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}, /* FLD1 */
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{
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.address = 0x2c,
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.reg = 0x13,
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.bit = 0x03,
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}, /* FLD2 */
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{
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.address = 0x30,
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.reg = 0x13,
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.bit = 0x04,
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}, /* FLD3 */
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{
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.address = 0x34,
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.reg = 0x10,
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.bit = 0x03,
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}, /* BUC1 */
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{
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.address = 0x38,
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.reg = 0x10,
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.bit = 0x06,
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}, /* BUC2 */
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{
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.address = 0x3c,
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.reg = 0x10,
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.bit = 0x05,
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}, /* BUC3 */
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{
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.address = 0x40,
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.reg = 0x10,
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.bit = 0x04,
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}, /* BUC4 */
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{
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.address = 0x44,
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.reg = 0x10,
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.bit = 0x01,
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}, /* BUC5 */
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{
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.address = 0x48,
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.reg = 0x10,
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.bit = 0x00
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}, /* BUC6 */
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{
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.address = 0x4c,
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.reg = 0x92,
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}, /* GPI1 */
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};
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/* TMP0 - TMP5 are the same, all from GPADC */
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static struct pmic_table thermal_table[] = {
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{
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.address = 0x00,
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.reg = XPOWER_GPADC_LOW
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},
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{
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.address = 0x0c,
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.reg = XPOWER_GPADC_LOW
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},
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{
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.address = 0x18,
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.reg = XPOWER_GPADC_LOW
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},
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{
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.address = 0x24,
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.reg = XPOWER_GPADC_LOW
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},
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{
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.address = 0x30,
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.reg = XPOWER_GPADC_LOW
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},
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{
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.address = 0x3c,
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.reg = XPOWER_GPADC_LOW
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},
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};
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static int intel_xpower_pmic_get_power(struct regmap *regmap, int reg,
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int bit, u64 *value)
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{
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int data;
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if (regmap_read(regmap, reg, &data))
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return -EIO;
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/* GPIO1 LDO regulator needs special handling */
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if (reg == XPOWER_GPI1_CTRL)
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*value = ((data & GPI1_LDO_MASK) == GPI1_LDO_ON);
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else
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*value = (data & BIT(bit)) ? 1 : 0;
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return 0;
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}
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static int intel_xpower_pmic_update_power(struct regmap *regmap, int reg,
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int bit, bool on)
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{
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int data, ret;
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ret = iosf_mbi_block_punit_i2c_access();
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if (ret)
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return ret;
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/* GPIO1 LDO regulator needs special handling */
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if (reg == XPOWER_GPI1_CTRL) {
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ret = regmap_update_bits(regmap, reg, GPI1_LDO_MASK,
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on ? GPI1_LDO_ON : GPI1_LDO_OFF);
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goto out;
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}
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if (regmap_read(regmap, reg, &data)) {
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ret = -EIO;
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goto out;
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}
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if (on)
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data |= BIT(bit);
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else
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data &= ~BIT(bit);
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if (regmap_write(regmap, reg, data))
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ret = -EIO;
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out:
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iosf_mbi_unblock_punit_i2c_access();
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return ret;
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}
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/**
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* intel_xpower_pmic_get_raw_temp(): Get raw temperature reading from the PMIC
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*
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* @regmap: regmap of the PMIC device
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* @reg: register to get the reading
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*
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* Return a positive value on success, errno on failure.
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*/
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static int intel_xpower_pmic_get_raw_temp(struct regmap *regmap, int reg)
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{
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int ret, adc_ts_pin_ctrl;
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u8 buf[2];
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/*
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* The current-source used for the battery temp-sensor (TS) is shared
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* with the GPADC. For proper fuel-gauge and charger operation the TS
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* current-source needs to be permanently on. But to read the GPADC we
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* need to temporary switch the TS current-source to ondemand, so that
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* the GPADC can use it, otherwise we will always read an all 0 value.
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*
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* Note that the switching from on to on-ondemand is not necessary
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* when the TS current-source is off (this happens on devices which
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* do not use the TS-pin).
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*/
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ret = regmap_read(regmap, AXP288_ADC_TS_PIN_CTRL, &adc_ts_pin_ctrl);
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if (ret)
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return ret;
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if (adc_ts_pin_ctrl & AXP288_ADC_TS_CURRENT_ON_OFF_MASK) {
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/*
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* AXP288_ADC_TS_PIN_CTRL reads are cached by the regmap, so
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* this does to a single I2C-transfer, and thus there is no
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* need to explicitly call iosf_mbi_block_punit_i2c_access().
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*/
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ret = regmap_update_bits(regmap, AXP288_ADC_TS_PIN_CTRL,
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AXP288_ADC_TS_CURRENT_ON_OFF_MASK,
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AXP288_ADC_TS_CURRENT_ON_ONDEMAND);
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if (ret)
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return ret;
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/* Wait a bit after switching the current-source */
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usleep_range(6000, 10000);
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}
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ret = iosf_mbi_block_punit_i2c_access();
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if (ret)
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return ret;
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ret = regmap_bulk_read(regmap, AXP288_GP_ADC_H, buf, 2);
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if (ret == 0)
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ret = (buf[0] << 4) + ((buf[1] >> 4) & 0x0f);
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if (adc_ts_pin_ctrl & AXP288_ADC_TS_CURRENT_ON_OFF_MASK) {
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regmap_update_bits(regmap, AXP288_ADC_TS_PIN_CTRL,
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AXP288_ADC_TS_CURRENT_ON_OFF_MASK,
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AXP288_ADC_TS_CURRENT_ON);
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}
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iosf_mbi_unblock_punit_i2c_access();
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return ret;
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}
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static int intel_xpower_exec_mipi_pmic_seq_element(struct regmap *regmap,
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u16 i2c_address, u32 reg_address,
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u32 value, u32 mask)
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{
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int ret;
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if (i2c_address != 0x34) {
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pr_err("%s: Unexpected i2c-addr: 0x%02x (reg-addr 0x%x value 0x%x mask 0x%x)\n",
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__func__, i2c_address, reg_address, value, mask);
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return -ENXIO;
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}
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ret = iosf_mbi_block_punit_i2c_access();
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if (ret)
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return ret;
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ret = regmap_update_bits(regmap, reg_address, mask, value);
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iosf_mbi_unblock_punit_i2c_access();
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return ret;
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}
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static struct intel_pmic_opregion_data intel_xpower_pmic_opregion_data = {
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.get_power = intel_xpower_pmic_get_power,
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.update_power = intel_xpower_pmic_update_power,
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.get_raw_temp = intel_xpower_pmic_get_raw_temp,
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.exec_mipi_pmic_seq_element = intel_xpower_exec_mipi_pmic_seq_element,
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.power_table = power_table,
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.power_table_count = ARRAY_SIZE(power_table),
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.thermal_table = thermal_table,
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.thermal_table_count = ARRAY_SIZE(thermal_table),
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.pmic_i2c_address = 0x34,
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};
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static acpi_status intel_xpower_pmic_gpio_handler(u32 function,
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acpi_physical_address address, u32 bit_width, u64 *value,
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void *handler_context, void *region_context)
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{
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return AE_OK;
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}
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static int intel_xpower_pmic_opregion_probe(struct platform_device *pdev)
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{
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struct device *parent = pdev->dev.parent;
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struct axp20x_dev *axp20x = dev_get_drvdata(parent);
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acpi_status status;
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int result;
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status = acpi_install_address_space_handler(ACPI_HANDLE(parent),
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ACPI_ADR_SPACE_GPIO, intel_xpower_pmic_gpio_handler,
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NULL, NULL);
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if (ACPI_FAILURE(status))
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return -ENODEV;
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result = intel_pmic_install_opregion_handler(&pdev->dev,
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ACPI_HANDLE(parent), axp20x->regmap,
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&intel_xpower_pmic_opregion_data);
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if (result)
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acpi_remove_address_space_handler(ACPI_HANDLE(parent),
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ACPI_ADR_SPACE_GPIO,
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intel_xpower_pmic_gpio_handler);
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return result;
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}
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static struct platform_driver intel_xpower_pmic_opregion_driver = {
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.probe = intel_xpower_pmic_opregion_probe,
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.driver = {
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.name = "axp288_pmic_acpi",
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},
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};
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builtin_platform_driver(intel_xpower_pmic_opregion_driver);
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