forked from Qortal/Brooklyn
a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
71 lines
2.1 KiB
YAML
71 lines
2.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/nand-chip.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NAND Chip and NAND Controller Generic Binding
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maintainers:
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- Miquel Raynal <miquel.raynal@bootlin.com>
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description: |
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This file covers the generic description of a NAND chip. It implies that the
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bus interface should not be taken into account: both raw NAND devices and
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SPI-NAND devices are concerned by this description.
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properties:
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reg:
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description:
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Contains the chip-select IDs.
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nand-ecc-engine:
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description: |
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A phandle on the hardware ECC engine if any. There are
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basically three possibilities:
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1/ The ECC engine is part of the NAND controller, in this
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case the phandle should reference the parent node.
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2/ The ECC engine is part of the NAND part (on-die), in this
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case the phandle should reference the node itself.
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3/ The ECC engine is external, in this case the phandle should
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reference the specific ECC engine node.
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$ref: /schemas/types.yaml#/definitions/phandle
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nand-use-soft-ecc-engine:
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description: Use a software ECC engine.
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type: boolean
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nand-no-ecc-engine:
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description: Do not use any ECC correction.
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type: boolean
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nand-ecc-algo:
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description:
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Desired ECC algorithm.
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$ref: /schemas/types.yaml#/definitions/string
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enum: [hamming, bch, rs]
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nand-ecc-strength:
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description:
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Maximum number of bits that can be corrected per ECC step.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 1
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nand-ecc-step-size:
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description:
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Number of data bytes covered by a single ECC step.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 1
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secure-regions:
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description:
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Regions in the NAND chip which are protected using a secure element
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like Trustzone. This property contains the start address and size of
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the secure regions present.
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$ref: /schemas/types.yaml#/definitions/uint64-matrix
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required:
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- reg
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additionalProperties: true
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