crowetic a94b3d14aa Brooklyn+ (PLUS) changes
Changes included (and more):

1. Dynamic RAM merge

2. Real-time page scan and allocation

3. Cache compression

4. Real-time IRQ checks

5. Dynamic I/O allocation for Java heap

6. Java page migration

7. Contiguous memory allocation

8. Idle pages tracking

9. Per CPU RAM usage tracking

10. ARM NEON scalar multiplication library

11. NEON/ARMv8 crypto extensions

12. NEON SHA, Blake, RIPEMD crypto extensions

13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
2022-05-12 10:47:00 -07:00

59 lines
1.1 KiB
C

/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Arch specific extensions to struct device
*/
#ifndef _ASM_POWERPC_DEVICE_H
#define _ASM_POWERPC_DEVICE_H
struct device_node;
#ifdef CONFIG_PPC64
struct pci_dn;
struct iommu_table;
#endif
/*
* Arch extensions to struct device.
*
* When adding fields, consider macio_add_one_device in
* drivers/macintosh/macio_asic.c
*/
struct dev_archdata {
/*
* These two used to be a union. However, with the hybrid ops we need
* both so here we store both a DMA offset for direct mappings and
* an iommu_table for remapped DMA.
*/
dma_addr_t dma_offset;
#ifdef CONFIG_PPC64
struct iommu_table *iommu_table_base;
#endif
#ifdef CONFIG_PPC64
struct pci_dn *pci_data;
#endif
#ifdef CONFIG_EEH
struct eeh_dev *edev;
#endif
#ifdef CONFIG_FAIL_IOMMU
int fail_iommu;
#endif
#ifdef CONFIG_CXL_BASE
struct cxl_context *cxl_ctx;
#endif
#ifdef CONFIG_PCI_IOV
void *iov_data;
#endif
};
struct pdev_archdata {
u64 dma_mask;
/*
* Pointer to nvdimm_pmu structure, to handle the unregistering
* of pmu device
*/
void *priv;
};
#endif /* _ASM_POWERPC_DEVICE_H */