Brooklyn/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml
crowetic a94b3d14aa Brooklyn+ (PLUS) changes
Changes included (and more):

1. Dynamic RAM merge

2. Real-time page scan and allocation

3. Cache compression

4. Real-time IRQ checks

5. Dynamic I/O allocation for Java heap

6. Java page migration

7. Contiguous memory allocation

8. Idle pages tracking

9. Per CPU RAM usage tracking

10. ARM NEON scalar multiplication library

11. NEON/ARMv8 crypto extensions

12. NEON SHA, Blake, RIPEMD crypto extensions

13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
2022-05-12 10:47:00 -07:00

70 lines
1.7 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
%YAML 1.2
---
$id: http://devicetree.org/schemas/rtc/atmel,at91sam9260-rtt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel AT91 RTT Device Tree Bindings
allOf:
- $ref: "rtc.yaml#"
maintainers:
- Alexandre Belloni <alexandre.belloni@bootlin.com>
properties:
compatible:
oneOf:
- items:
- const: atmel,at91sam9260-rtt
- items:
- const: microchip,sam9x60-rtt
- const: atmel,at91sam9260-rtt
- items:
- const: microchip,sama7g5-rtt
- const: microchip,sam9x60-rtt
- const: atmel,at91sam9260-rtt
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
atmel,rtt-rtc-time-reg:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: Phandle to the GPBR node.
- description: Offset within the GPBR block.
description:
Should encode the GPBR register used to store the time base when the
RTT is used as an RTC. The first cell should point to the GPBR node
and the second one encodes the offset within the GPBR block (or in
other words, the GPBR register used to store the time base).
required:
- compatible
- reg
- interrupts
- clocks
- atmel,rtt-rtc-time-reg
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
rtc@fffffd20 {
compatible = "atmel,at91sam9260-rtt";
reg = <0xfffffd20 0x10>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
clocks = <&clk32k>;
atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
};