forked from Qortal/Brooklyn
2a709f28fa
* 0day explit mitigation * Memory corruption prevention * Privilege escalation prevention * Buffer over flow prevention * File System corruption defense * Thread escape prevention This may very well be the most intensive inclusion to BrooklynR. This will not be part of an x86 suite nor it will be released as tool kit. The security core toolkit will remain part of kernel base.
89 lines
2.4 KiB
C
89 lines
2.4 KiB
C
/*
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* This header provides clock numbers for the ingenic,jz4780-cgu DT binding.
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*
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* They are roughly ordered as:
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* - external clocks
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* - PLLs
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* - muxes/dividers in the order they appear in the jz4780 programmers manual
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* - gates in order of their bit in the CLKGR* registers
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*/
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#ifndef __DT_BINDINGS_CLOCK_JZ4780_CGU_H__
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#define __DT_BINDINGS_CLOCK_JZ4780_CGU_H__
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#define JZ4780_CLK_EXCLK 0
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#define JZ4780_CLK_RTCLK 1
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#define JZ4780_CLK_APLL 2
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#define JZ4780_CLK_MPLL 3
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#define JZ4780_CLK_EPLL 4
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#define JZ4780_CLK_VPLL 5
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#define JZ4780_CLK_OTGPHY 6
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#define JZ4780_CLK_SCLKA 7
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#define JZ4780_CLK_CPUMUX 8
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#define JZ4780_CLK_CPU 9
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#define JZ4780_CLK_L2CACHE 10
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#define JZ4780_CLK_AHB0 11
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#define JZ4780_CLK_AHB2PMUX 12
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#define JZ4780_CLK_AHB2 13
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#define JZ4780_CLK_PCLK 14
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#define JZ4780_CLK_DDR 15
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#define JZ4780_CLK_VPU 16
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#define JZ4780_CLK_I2SPLL 17
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#define JZ4780_CLK_I2S 18
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#define JZ4780_CLK_LCD0PIXCLK 19
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#define JZ4780_CLK_LCD1PIXCLK 20
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#define JZ4780_CLK_MSCMUX 21
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#define JZ4780_CLK_MSC0 22
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#define JZ4780_CLK_MSC1 23
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#define JZ4780_CLK_MSC2 24
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#define JZ4780_CLK_UHC 25
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#define JZ4780_CLK_SSIPLL 26
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#define JZ4780_CLK_SSI 27
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#define JZ4780_CLK_CIMMCLK 28
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#define JZ4780_CLK_PCMPLL 29
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#define JZ4780_CLK_PCM 30
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#define JZ4780_CLK_GPU 31
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#define JZ4780_CLK_HDMI 32
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#define JZ4780_CLK_BCH 33
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#define JZ4780_CLK_NEMC 34
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#define JZ4780_CLK_OTG0 35
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#define JZ4780_CLK_SSI0 36
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#define JZ4780_CLK_SMB0 37
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#define JZ4780_CLK_SMB1 38
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#define JZ4780_CLK_SCC 39
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#define JZ4780_CLK_AIC 40
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#define JZ4780_CLK_TSSI0 41
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#define JZ4780_CLK_OWI 42
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#define JZ4780_CLK_KBC 43
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#define JZ4780_CLK_SADC 44
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#define JZ4780_CLK_UART0 45
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#define JZ4780_CLK_UART1 46
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#define JZ4780_CLK_UART2 47
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#define JZ4780_CLK_UART3 48
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#define JZ4780_CLK_SSI1 49
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#define JZ4780_CLK_SSI2 50
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#define JZ4780_CLK_PDMA 51
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#define JZ4780_CLK_GPS 52
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#define JZ4780_CLK_MAC 53
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#define JZ4780_CLK_SMB2 54
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#define JZ4780_CLK_CIM 55
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#define JZ4780_CLK_LCD 56
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#define JZ4780_CLK_TVE 57
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#define JZ4780_CLK_IPU 58
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#define JZ4780_CLK_DDR0 59
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#define JZ4780_CLK_DDR1 60
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#define JZ4780_CLK_SMB3 61
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#define JZ4780_CLK_TSSI1 62
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#define JZ4780_CLK_COMPRESS 63
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#define JZ4780_CLK_AIC1 64
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#define JZ4780_CLK_GPVLC 65
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#define JZ4780_CLK_OTG1 66
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#define JZ4780_CLK_UART4 67
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#define JZ4780_CLK_AHBMON 68
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#define JZ4780_CLK_SMB4 69
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#define JZ4780_CLK_DES 70
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#define JZ4780_CLK_X2D 71
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#define JZ4780_CLK_CORE1 72
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#endif /* __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ */
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