forked from Qortal/Brooklyn
a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
49 lines
1.0 KiB
YAML
49 lines
1.0 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/npcm/nuvoton,gcr.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Global Control Registers block in Nuvoton SoCs
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maintainers:
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- Jonathan Neuschäfer <j.neuschaefer@gmx.net>
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description:
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The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs
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that expose misc functionality such as chip model and version information or
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pinmux settings.
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properties:
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compatible:
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items:
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- enum:
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- nuvoton,wpcm450-gcr
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- nuvoton,npcm750-gcr
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- const: syscon
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- const: simple-mfd
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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additionalProperties:
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type: object
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examples:
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- |
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gcr: syscon@800000 {
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compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd";
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reg = <0x800000 0x1000>;
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mux-controller {
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compatible = "mmio-mux";
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#mux-control-cells = <1>;
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mux-reg-masks = <0x38 0x07>;
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idle-states = <2>;
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};
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};
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