forked from Qortal/Brooklyn
13 lines
365 B
Plaintext
13 lines
365 B
Plaintext
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config STM32MP1_DDR
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bool "STM32MP1 DDR driver"
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depends on DM && OF_CONTROL && ARCH_STM32MP
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select RAM
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select SPL_RAM if SPL
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default y
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help
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activate STM32MP1 DDR controller driver for STM32MP1 soc
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family: support for LPDDR2, LPDDR3 and DDR3
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the SDRAM parameters for controleur and phy need to be provided
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in device tree (computed by DDR tuning tools)
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