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Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
92 lines
2.0 KiB
YAML
92 lines
2.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2019-2020 Artur Rojek
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Ingenic JZ47xx ADC controller IIO bindings
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maintainers:
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- Artur Rojek <contact@artur-rojek.eu>
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description: >
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Industrial I/O subsystem bindings for ADC controller found in
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Ingenic JZ47xx SoCs.
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ADC clients must use the format described in
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https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml,
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giving a phandle and IIO specifier pair ("io-channels") to the ADC controller.
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properties:
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compatible:
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enum:
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- ingenic,jz4725b-adc
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- ingenic,jz4740-adc
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- ingenic,jz4760-adc
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- ingenic,jz4760b-adc
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- ingenic,jz4770-adc
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'#io-channel-cells':
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const: 1
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description:
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Must be set to <1> to indicate channels are selected by index.
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: adc
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interrupts:
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maxItems: 1
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ingenic,use-internal-divider:
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description:
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If present, battery voltage is read from the VBAT_IR pin, which has an
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internal 1/4 divider. If absent, it is read through the VBAT_ER pin,
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which does not have such a divider.
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type: boolean
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if:
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not:
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properties:
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compatible:
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contains:
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const: ingenic,jz4760b-adc
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then:
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properties:
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ingenic,use-internal-divider: false
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required:
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- compatible
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- '#io-channel-cells'
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- reg
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- clocks
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- clock-names
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
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#include <dt-bindings/iio/adc/ingenic,adc.h>
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adc@10070000 {
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compatible = "ingenic,jz4740-adc";
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#io-channel-cells = <1>;
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reg = <0x10070000 0x30>;
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clocks = <&cgu JZ4740_CLK_ADC>;
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clock-names = "adc";
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interrupt-parent = <&intc>;
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interrupts = <18>;
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};
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