forked from Qortal/Brooklyn
a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
91 lines
2.6 KiB
C
91 lines
2.6 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2014-2019 Intel Corporation
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*/
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#ifndef _INTEL_GUC_LOG_H_
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#define _INTEL_GUC_LOG_H_
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#include <linux/mutex.h>
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#include <linux/relay.h>
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#include <linux/workqueue.h>
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#include "intel_guc_fwif.h"
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#include "i915_gem.h"
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struct intel_guc;
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#if defined(CONFIG_DRM_I915_DEBUG_GUC)
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#define CRASH_BUFFER_SIZE SZ_2M
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#define DEBUG_BUFFER_SIZE SZ_16M
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#define CAPTURE_BUFFER_SIZE SZ_4M
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#elif defined(CONFIG_DRM_I915_DEBUG_GEM)
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#define CRASH_BUFFER_SIZE SZ_1M
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#define DEBUG_BUFFER_SIZE SZ_2M
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#define CAPTURE_BUFFER_SIZE SZ_1M
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#else
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#define CRASH_BUFFER_SIZE SZ_8K
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#define DEBUG_BUFFER_SIZE SZ_64K
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#define CAPTURE_BUFFER_SIZE SZ_16K
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#endif
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/*
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* While we're using plain log level in i915, GuC controls are much more...
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* "elaborate"? We have a couple of bits for verbosity, separate bit for actual
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* log enabling, and separate bit for default logging - which "conveniently"
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* ignores the enable bit.
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*/
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#define GUC_LOG_LEVEL_DISABLED 0
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#define GUC_LOG_LEVEL_NON_VERBOSE 1
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#define GUC_LOG_LEVEL_IS_ENABLED(x) ((x) > GUC_LOG_LEVEL_DISABLED)
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#define GUC_LOG_LEVEL_IS_VERBOSE(x) ((x) > GUC_LOG_LEVEL_NON_VERBOSE)
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#define GUC_LOG_LEVEL_TO_VERBOSITY(x) ({ \
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typeof(x) _x = (x); \
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GUC_LOG_LEVEL_IS_VERBOSE(_x) ? _x - 2 : 0; \
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})
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#define GUC_VERBOSITY_TO_LOG_LEVEL(x) ((x) + 2)
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#define GUC_LOG_LEVEL_MAX GUC_VERBOSITY_TO_LOG_LEVEL(GUC_LOG_VERBOSITY_MAX)
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struct intel_guc_log {
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u32 level;
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struct i915_vma *vma;
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struct {
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void *buf_addr;
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bool started;
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struct work_struct flush_work;
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struct rchan *channel;
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struct mutex lock;
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u32 full_count;
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} relay;
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/* logging related stats */
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struct {
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u32 sampled_overflow;
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u32 overflow;
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u32 flush;
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} stats[GUC_MAX_LOG_BUFFER];
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};
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void intel_guc_log_init_early(struct intel_guc_log *log);
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int intel_guc_log_create(struct intel_guc_log *log);
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void intel_guc_log_destroy(struct intel_guc_log *log);
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int intel_guc_log_set_level(struct intel_guc_log *log, u32 level);
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bool intel_guc_log_relay_created(const struct intel_guc_log *log);
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int intel_guc_log_relay_open(struct intel_guc_log *log);
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int intel_guc_log_relay_start(struct intel_guc_log *log);
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void intel_guc_log_relay_flush(struct intel_guc_log *log);
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void intel_guc_log_relay_close(struct intel_guc_log *log);
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void intel_guc_log_handle_flush_event(struct intel_guc_log *log);
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static inline u32 intel_guc_log_get_level(struct intel_guc_log *log)
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{
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return log->level;
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}
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void intel_guc_log_info(struct intel_guc_log *log, struct drm_printer *p);
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int intel_guc_log_dump(struct intel_guc_log *log, struct drm_printer *p,
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bool dump_load_err);
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#endif
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