forked from Qortal/Brooklyn
84ba5b15ac
* Enhance GPIO addon for Noctua Fans for the Qortector upcoming case. This will put PWM signal to real-time. * Fixed RDP not letting a user login if not logged out on Cinnamon release (reported by Crowetic) * Update i2c sensor db * Fixed DRM broadcast over HDMI 2+ * Ease up DHCP security only to prevent Brooklyn blocking routers. * Add possibility to add extra memory for Cinnamon Desktop Release * Fix error message of Software Render mode on Cinnamon Desktop * Add proper offset for HD screens for pixel array *Fixed HDMI jitter for videocore4 GPU * Enable all radios (including Bluetooth)
160 lines
5.3 KiB
C
160 lines
5.3 KiB
C
/*
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Copyright (c) 2013, Raspberry Pi Foundation
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Copyright (c) 2013, RISC OS Open Ltd
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the copyright holder nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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.macro myfunc fname
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.func fname
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.global fname
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fname:
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.endm
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.macro preload_leading_step1 backwards, ptr, base
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/* If the destination is already 16-byte aligned, then we need to preload
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* between 0 and prefetch_distance (inclusive) cache lines ahead so there
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* are no gaps when the inner loop starts.
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*/
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.if backwards
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sub ptr, base, #1
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bic ptr, ptr, #31
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.else
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bic ptr, base, #31
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.endif
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.set OFFSET, 0
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.rept prefetch_distance+1
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pld [ptr, #OFFSET]
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.if backwards
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.set OFFSET, OFFSET-32
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.else
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.set OFFSET, OFFSET+32
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.endif
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.endr
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.endm
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.macro preload_leading_step2 backwards, ptr, base, leading_bytes, tmp
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/* However, if the destination is not 16-byte aligned, we may need to
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* preload one more cache line than that. The question we need to ask is:
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* are the leading bytes more than the amount by which the source
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* pointer will be rounded down for preloading, and if so, by how many
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* cache lines?
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*/
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.if backwards
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/* Here we compare against how many bytes we are into the
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* cache line, counting down from the highest such address.
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* Effectively, we want to calculate
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* leading_bytes = dst&15
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* cacheline_offset = 31-((src-leading_bytes-1)&31)
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* extra_needed = leading_bytes - cacheline_offset
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* and test if extra_needed is <= 0, or rearranging:
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* leading_bytes + (src-leading_bytes-1)&31 <= 31
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*/
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mov tmp, base, lsl #32-5
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sbc tmp, tmp, leading_bytes, lsl #32-5
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adds tmp, tmp, leading_bytes, lsl #32-5
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bcc 61f
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pld [ptr, #-32*(prefetch_distance+1)]
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.else
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/* Effectively, we want to calculate
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* leading_bytes = (-dst)&15
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* cacheline_offset = (src+leading_bytes)&31
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* extra_needed = leading_bytes - cacheline_offset
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* and test if extra_needed is <= 0.
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*/
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mov tmp, base, lsl #32-5
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add tmp, tmp, leading_bytes, lsl #32-5
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rsbs tmp, tmp, leading_bytes, lsl #32-5
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bls 61f
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pld [ptr, #32*(prefetch_distance+1)]
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.endif
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61:
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.endm
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.macro preload_trailing backwards, base, remain, tmp
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/* We need either 0, 1 or 2 extra preloads */
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.if backwards
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rsb tmp, base, #0
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mov tmp, tmp, lsl #32-5
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.else
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mov tmp, base, lsl #32-5
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.endif
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adds tmp, tmp, remain, lsl #32-5
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adceqs tmp, tmp, #0
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/* The instruction above has two effects: ensures Z is only
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* set if C was clear (so Z indicates that both shifted quantities
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* were 0), and clears C if Z was set (so C indicates that the sum
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* of the shifted quantities was greater and not equal to 32) */
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beq 82f
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.if backwards
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sub tmp, base, #1
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bic tmp, tmp, #31
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.else
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bic tmp, base, #31
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.endif
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bcc 81f
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.if backwards
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pld [tmp, #-32*(prefetch_distance+1)]
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81:
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pld [tmp, #-32*prefetch_distance]
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.else
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pld [tmp, #32*(prefetch_distance+2)]
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81:
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pld [tmp, #32*(prefetch_distance+1)]
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.endif
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82:
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.endm
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.macro preload_all backwards, narrow_case, shift, base, remain, tmp0, tmp1
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.if backwards
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sub tmp0, base, #1
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bic tmp0, tmp0, #31
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pld [tmp0]
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sub tmp1, base, remain, lsl #shift
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.else
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bic tmp0, base, #31
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pld [tmp0]
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add tmp1, base, remain, lsl #shift
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sub tmp1, tmp1, #1
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.endif
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bic tmp1, tmp1, #31
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cmp tmp1, tmp0
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beq 92f
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.if narrow_case
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/* In this case, all the data fits in either 1 or 2 cache lines */
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pld [tmp1]
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.else
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91:
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.if backwards
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sub tmp0, tmp0, #32
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.else
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add tmp0, tmp0, #32
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.endif
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cmp tmp0, tmp1
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pld [tmp0]
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bne 91b
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.endif
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92:
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.endm
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